Ultrasound Variable-Gain Amplifier MAX2035

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1 19-63; Rev 1; 2/9 Ultrasound Variable-Gain Amplifier General Description The 8-channel variable-gain amplifier (VGA) is designed for high linearity, high dynamic range, and low-noise performance targeting ultrasound imaging and Doppler applications. Each amplifier features differential inputs and outputs and a total gain range of typically db. In addition, the VGAs offer very low output-referred noise performance suitable for interfacing with 1-bit ADCs. The VGA is optimized for less than ±.db absolute gain error to ensure minimal channel-to-channel ultrasound beamforming focus error. The device s differential outputs are designed to directly drive ultrasound ADCs through an external passive anti-aliasing filter. A switchable clamp is also provided at each amplifier s outputs to limit the output signals, thereby preventing ADC overdrive or saturation. Dynamic performance of the device is optimized to reduce distortion to support second-harmonic imaging. The device achieves a second-harmonic distortion specification of -62dBc at V OUT = 1.V P-P and f IN = MHz, and an ultrasound-specific* two-tone third-order intermodulation distortion specification of -2dBc at V OUT = 1.V P-P and f IN = MHz. The operates from a +.V power supply, consuming only 127mW/channel. The device is available in a 1-pin TQFP package with an exposed pad. Electrical performance is guaranteed over a C to +7 C temperature range. Ultrasound Imaging Applications Sonar Functional Diagram Features 8-Channel Configuration High Integration for Ultrasound Imaging Applications Pin Compatible with the MAX236 Ultrasound VGA Plus CW Doppler Beamformer Maximum Gain, Gain Range, and Output-Referred Noise Optimized for Interfacing with 1-Bit ADCs Maximum Gain of 39.dB Total Gain Range of db 6nV/ Hz Ultra-Low Output-Referred Noise at MHz Pin-for-Pin 12-Bit Compatibility Supported By MAX237/MAX238 ±.db Absolute Gain Error Switchable Output VGA Clamp Eliminating ADC Overdrive Fully Differential VGA Outputs for Direct ADC Drive Variable Gain Range Achieves db Dynamic Range -62dBc HD2 at VOUT = 1.V P-P and f IN = MHz Two-Tone Ultrasound-Specific* IMD3 of -2dBc at V OUT = 1.VP-P and fin = MHz 127mW Consumption per Channel *See the Ultrasound-Specific IMD3 Specification in the Applications Information section. Ordering Information VG_CTL+ VG_CTL- VGIN1+ VGIN8+ VGOUT8- VGIN1- VGIN8- VGA VGA V CC V REF -1.dB TO +39.dB Ω Ω Ω Ω VG_CLAMP_MODE VGOUT1+ VGOUT8+ VGOUT1- PART TEMP RANGE PIN-PACKAGE CCQ-D C to +7 C 1 TQFP-EP CCQ-TD C to +7 C 1 TQFP-EP CCQ+D C to +7 C 1 TQFP-EP CCQ+TD C to +7 C 1 TQFP-EP EP = Exposed pad. +Denotes a lead(pb)-free/rohs-compliant package. -Denotes a package containing lead(pb). T = Tape and reel. D = Dry packing. PD BIAS CIRCUITRY EXT_RES Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at , or visit Maxim s website at

2 ABSOLUTE MAXIMUM RATINGS V CC, V REF to...-.3v to +.V Any Other Pins to...-.3v to (V CC +.3V) VGA Differential Input Voltage (VGIN_+ - VGIN_-)...8.V P-P Analog Gain-Control Input Differential Voltage (VG_CTL+ - VG_CTL-)...8.V P-P Continuous Power Dissipation (T A = +7 C) 1-Pin TQFP (derated 4.mW/ C above +7 C) mW Operating Temperature Range... C to +7 C Junction Temperature...+1 C θ JC (Note 1)...+2 C/W θ JA (Note 1) C/W Storage Temperature Range...-4 C to +1 C Lead Temperature (soldering, 1s)...+3 C Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD1-7, using a fourlayer board. For detailed information on package thermal considerations, refer to Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (Figure 2, V CC = V REF = 4.7V to.2v, V CM = (3/)V REF, V =, PD =, no RF signals applied, capacitance to at each of the VGA differential outputs is 6pF, differential capacitance across the VGA outputs is 1pF, R L = 1kΩ, T A = C to +7 C. Typical values are at V CC = V REF = V, T A = +2 C, unless otherwise noted.) (Note 2) PARAMETER SYMBOL CONDTIONS MIN TYP MAX UNITS Supply Voltage Range V CC V V CC External Reference Voltage Range Total Power-Supply Current V REF (Note 3) V Refers to V CC supply PD = current plus V REF current PD = V CC Supply Current I VCC ma V REF Current I REF 12 1 ma Current Consumption per Amplifier Channel Refers to V CC supply current ma Differential Analog Control Minimum gain +2 Voltage Range Maximum gain -2 ma V P-P Differential Analog Control Common-Mode Voltage Analog Control Input Source/Sink Current V CM V 4. ma LOGIC INPUTS CMOS Input-High Voltage V IH 2.3 V CMOS Input-Low Voltage V IL.8 V 2

3 AC ELECTRICAL CHARACTERISTICS (Figure 2, V CC = V REF = 4.7V to.2v, V CM = (3/)V REF, V =, PD =, no RF signals applied, capacitance to at each of the VGA differential outputs is 6pF, differential capacitance across the VGA outputs is 1pF, R L = 1kΩ, T A = C to +7 C. Typical values are at V CC = V REF = V, T A = +2 C, unless otherwise noted.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Large-Signal Bandwidth f -3dB 3dB bandwidth, V OUT = 1.V P-P, gain = 2dB Differential output capacitance is 1pF, capacitance to at each single-ended outp ut i s 6p F, R L = 1kΩ No capacitive load, R L = 1kΩ Differential Input Resistance R IN Ω Input Effective Capacitance C IN f RF = 1MHz, each input to ground 1 pf Differential Output Resistance R OUT 1 Ω Maximum Gain 39. db Minimum Gain -1. db Gain Range db Absolute Gain Error T A = +2 C, -2.V < V G_CTL < -1.8V, V REF = V ±.6 T A = +2 C, -1.8V < VG_CTL < +1.2V, V RE F = V ±. T A = + 2 C, + 1.2V < V G_CTL < +2.V, V REF = V ±1.2 VGA Gain Response Time db gain change to within 1dB final value 1 µs Input-Referred Noise Output-Referred Noise Second Harmonic Third-Order Intermodulation Distortion HD2 IMD3 VG_CTL set for maximum gain, no input signal VG_CTL set for +2dB of gain No input signal 6 V OUT = 1.V P-P, 1kHz offset MHz db 2 nv/ Hz 12 VG_CLAMP_MODE = 1, VG_CTL set for +2dB of gain, f RF = MHz, V OUT = 1.V P-P VG_CLAMP_MODE = 1, VG_CTL set for +2dB of gain, f RF = 1MHz, V OUT = 1.V P-P -62 VG_CLT set for +2dB of gain, f RF1 = MHz, f RF2 =.1MHz, V OUT = 1.V P-P, V REF = V (Note 4) nv/ Hz dbc -4-2 dbc 3

4 AC ELECTRICAL CHARACTERISTICS (continued) (Figure 2, V CC = V REF = 4.7V to.2v, V CM = (3/)V REF, V =, PD =, no RF signals applied, capacitance to at each of the VGA differential outputs is 6pF, differential capacitance across the VGA outputs is 1pF, R L = 1kΩ, T A = C to +7 C. Typical values are at V CC = V REF = V, T A = +2 C, unless otherwise noted.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Channel-to-Channel Crosstalk Maximum Output Voltage at Clamp ON Maximum Output Voltage at Clamp OFF V OUT = 1V P-P differential, f RF = 1MHz, VG_CTL set for +2dB of gain VG_CLAMP_MODE =, VG_CTL set for +2dB of gain, 3mV P-P differential input VG_CLAMP_MODE = 1, VG_CTL set for +2dB of gain, 3mV P-P differential input -8 db Note 2: Specifications at T A = +2 C and T A = +7 C are guaranteed by production test. Specifications at T A = C are guaranteed by design and characterization. Note 3: Noise performance of the device is dependent on the noise contribution from the supply to V REF. Use a low-noise supply for V REF. V CC and V REF can be connected together to share the same supply voltage if the supply for V CC exhibits low noise. Note 4: See the Ultrasound-Specific IMD3 Specification section V P-P d i ffer enti al V P-P d i ffer enti al Typical Operating Characteristics (Figure 2, V CC = V REF = 4.7V to.2v, V =, PD =, VG_CLAMP_MODE = 1, f RF = MHz, capacitance to at each of the VGA differential outputs is 6pF, differential capacitance across the VGA outputs is 1pF, R L = 1kΩ, T A = C to +7 C. Typical values are at V CC = V REF = V, V CM = 3.V, T A = +2 C, unless otherwise noted.) OVERDRIVE PHASE DELAY (ns) OVERDRIVE PHASE DELAY. V IN1 = 3mV P-P DIFFERENTIAL 4. V IN2 = 87.mV P-P DIFFERENTIAL 4. GAIN = 2dB toc1 PSMR (dbc) POWER-SUPPLY MODULATION RATIO V OUT = 1.V P-P DIFFERENTIAL V MOD = mv P-P, f CARRIER = MHz, GAIN = 2dB FREQUENCY (khz) toc2 IMD3 (dbc) TWO-TONE ULTRASOUND-SPECIFIC IMD3 vs. GAIN GAIN = 2dB f = 1MHz f = 2MHz, MHz toc3 4

5 Typical Operating Characteristics (continued) (Figure 2, V CC = V REF = 4.7V to.2v, V =, PD =, VG_CLAMP_MODE = 1, f RF = MHz, capacitance to at each of the VGA differential outputs is 6pF, differential capacitance across the VGA outputs is 1pF, R L = 1kΩ, T A = C to +7 C. Typical values are at V CC = V REF = V, V CM = 3.V, T A = +2 C, unless otherwise noted.) HD2 (dbc) SECOND-HARMONIC DISTORTION vs. GAIN f = 2MHz f = 12MHz f = MHz toc4 HD3 (dbc) THIRD-HARMONIC DISTORTION vs. GAIN f = 12MHz f = 2MHz f = MHz toc OVERLOAD RECOVERY TIME toc6 f = MHz DIFFERENTIAL INPUT 2mV/div OVERLOAD RECOVERY TIME toc7 f = MHz DIFFERENTIAL INPUT 2mV/div DIFFERENTIAL OUTPUT mv/div DIFFERENTIAL OUTPUT mv/div OUTPUT OVERLOAD TO 1V P-P OUTPUT OVERLOAD TO 1mV P-P CHANNEL-TO-CHANNEL CROSSTALK vs. GAIN V OUT = 1.V P-P DIFFERENTIAL f = 1MHz, ADJACENT CHANNELS toc CHANNEL-TO-CHANNEL CROSSTALK GAIN = 2dB, ADJACENT CHANNELS toc9 CROSSTALK (db) CROSSTALK (db)

6 Typical Operating Characteristics (continued) (Figure 2, V CC = V REF = 4.7V to.2v, V =, PD =, VG_CLAMP_MODE = 1, f RF = MHz, capacitance to at each of the VGA differential outputs is 6pF, differential capacitance across the VGA outputs is 1pF, R L = 1kΩ, T A = C to +7 C. Typical values are at V CC = V REF = V, V CM = 3.V, T A = +2 C, unless otherwise noted.) OUTPUT-REFERRED NOISE VOLTAGE (nv/ Hz) OUTPUT-REFERRED NOISE VOLTAGE vs. GAIN f = MHz LARGE-SIGNAL BANDWIDTH V OUT = 1.V P-P DIFFERENTIAL VG_CTL = -.8V P-P DIFFERENTIAL toc1 toc GAIN vs. DIFFERENTIAL ANALOG CONTROL VOLTAGE (VG_CTL) f = MHz VG_CTL (V P-P DIFFERENTIAL) LARGE-SIGNAL BANDWIDTH 3 V OUT = 1.V P-P DIFFERENTIAL 2 VG_CTL = +.2V P-P DIFFERENTIAL toc11 toc LARGE-SIGNAL BANDWIDTH LARGE-SIGNAL BANDWIDTH V OUT = 1.V P-P DIFFERENTIAL VG_CTL = -2V P-P DIFFERENTIAL V OUT = 1.V P-P DIFFERENTIAL VG_CTL = +1.2V P-P DIFFERENTIAL toc12 toc LARGE-SIGNAL BANDWIDTH V OUT = 1.V P-P DIFFERENTIAL VG_CTL = +1.7V P-P DIFFERENTIAL toc LARGE-SIGNAL BANDWIDTH VG_CTL = +2V P-P DIFFERENTIAL toc17 HARMONIC DISTORTION (dbc) HARMONIC DISTORTION vs. DIFFERENTIAL OUTPUT VOLTAGE f = MHz, GAIN = 2dB THIRD HARMONIC SECOND HARMONIC DIFFERENTIAL OUTPUT VOLTAGE (V P-P ) toc18 6

7 Typical Operating Characteristics (continued) (Figure 2, V CC = V REF = 4.7V to.2v, V =, PD =, VG_CLAMP_MODE = 1, f RF = MHz, capacitance to at each of the VGA differential outputs is 6pF, differential capacitance across the VGA outputs is 1pF, R L = 1kΩ, T A = C to +7 C. Typical values are at V CC = V REF = V, V CM = 3.V, T A = +2 C, unless otherwise noted.) HARMONIC DISTORTION (dbc) HARMONIC DISTORTION vs. DIFFERENTIAL OUTPUT LOAD RESISTANCE -4-4 f = MHz, GAIN = 2dB THIRD HARMONIC SECOND HARMONIC DIFFERENTIAL OUTPUT LOAD (Ω) toc19 HARMONIC DISTORTION (dbc) HARMONIC DISTORTION vs. DIFFERENTIAL OUTPUT LOAD CAPACITANCE -4-4 f = MHz, GAIN = 2dB THIRD HARMONIC SECOND HARMONIC DIFFERENTIAL OUTPUT LOAD (pf) toc2 HARMONIC DISTORTION (dbc) HARMONIC DISTORTION GAIN = 2dB THIRD HARMONIC SECOND HARMONIC toc21 IMD3 (dbc) OFFSET VOLTAGE (mv) TWO-TONE ULTRASOUND-SPECIFIC IMD3 GAIN = 2dB OUTPUT COMMON-MODE OFFSET VOLTAGE vs. GAIN toc22 toc24 % OF UNITS ZOUT (Ω) GAIN ERROR HISTOGRAM SAMPLE SIZE = 188 UNITS f IN_ = MHz, GAIN = 2dB GAIN ERROR (db) DIFFERENTIAL OUTPUT IMPEDANCE MAGNITUDE toc23 toc2 7

8 PIN NAME FUNCTION 1, 2,, 6, 7, 1, 11, 12, 19, 2, 21, 24, 2, 26, 29, 3, 31, 34, 3, 36, 41, 43, 44, 4, 47, 48, 1,, 8, 9, 64, 6, 66, 69, 73, 76, 79, 8, 81, 83, 84, 8, 88 92, 96, 97, 98 Ground 3 VGIN3- VGA Channel 3 Inverting Differential Input 4 VGIN3+ VGA Channel 3 Noninverting Differential Input 8 VGIN4- VGA Channel 4 Inverting Differential Input 9 VGIN4+ VGA Channel 4 Noninverting Differential Input 13 EXT_C1 External Compensation. Connect a 4.7µF capacitor to ground. 14 EXT_C2 External Compensation. Connect a 4.7µF capacitor to ground. 1 EXT_C3 External Compensation. Connect a 4.7µF capacitor to ground. 16, 39, 42, 46, 4, 72, 82, 87 V CC Pin Description V Power Supply. Bypass each V CC supply to ground with.1µf capacitors as close to the pins as possible. 17 VGIN- VGA Channel Inverting Differential Input 18 VGIN+ VGA Channel Noninverting Differential Input 22 VGIN6- VGA Channel 6 Inverting Differential Input 23 VGIN6+ VGA Channel 6 Noninverting Differential Input 27 VGIN7- VGA Channel 7 Inverting Differential Input 28 VGIN7+ VGA Channel 7 Noninverting Differential Input 32 VGIN8- VGA Channel 8 Inverting Differential Input 33 VGIN8+ VGA Channel 8 Noninverting Differential Input 37, 93 VREF V Reference Supply. Bypass to with a.1µf capacitor as close to the pins as possible. Note that noise performance of the device is dependent on the noise contribution from the supply to V REF. Use a low-noise supply for V REF. V CC and V REF can be connected together to share the same supply voltage if the supply for V CC exhibits low noise. 38 EXT_RES External Resistor. Connect a 7.kΩ resistor to ground. 4 PD Power-Down Switch. Drive PD high to set the device in power-down mode. Drive PD low for normal operation. 49 VGOUT8+ VGA Channel 8 Noninverting Differential Output VGOUT8- VGA Channel 8 Inverting Differential Output 2 VGOUT7+ VGA Channel 7 Noninverting Differential Output 3 VGOUT7- VGA Channel 7 Inverting Differential Output 6 VGOUT6+ VGA Channel 6 Noninverting Differential Output 7 VGOUT6- VGA Channel 6 Inverting Differential Output 6 VGOUT+ VGA Channel Noninverting Differential Output 8

9 PIN NAME FUNCTION 61 VGOUT- VGA Channel Inverting Differential Output 62 VG_CTL- VGA Analog Gain-Control Inverting Input 63 VG_CTL+ VGA Analog Gain-Control Noninverting Input 67 VGOUT4+ VGA Channel 4 Noninverting Differential Output 68 VGOUT4- VGA Channel 4 Inverting Differential Output 7 VGOUT3+ VGA Channel 3 Noninverting Differential Output 71 VGOUT3- VGA Channel 3 Inverting Differential Output 74 VGOUT2+ VGA Channel 2 Noninverting Differential Output 7 VGOUT2- VGA Channel 2 Inverting Differential Output 77 VGOUT1+ VGA Channel 1 Noninverting Differential Output 78 VGOUT1- VGA Channel 1 Inverting Differential Output 86 V G_C LAMP _M OD E Pin Description (continued) V GA C l am p M od e E nab l e. D r i ve V G _C LAM P _M OD E l ow to enab l e V GA cl am p i ng. V G A outp ut w i l l b e cl am p ed at typ i cal l y 2.2V P - P d i ffer enti al. D r i ve V G_C LAM P _M O D E hi g h to d i sab l e V G A cl am p m od e. 94 VGIN1- VGA Channel 1 Inverting Differential Input 9 VGIN1+ VGA Channel 1 Noninverting Differential Input 99 VGIN2- VGA Channel 2 Inverting Differential Input 1 VGIN2+ VGA Channel 2 Noninverting Differential Input EP Exposed Pad. Internally connected to. Solder the exposed pad to the ground plane using multiple vias. Detailed Description The s VGAs are optimized for high linearity, high dynamic range, and low output-noise performance, making this component ideal for ultrasoundimaging applications. The VGA paths also exhibit a channel-to-channel crosstalk of -8dB at 1MHz and an absolute gain error of less than ±.db for minimal channel-to-channel focusing error in an ultrasound system. Each VGA path includes circuitry for adjusting analog gain, an output buffer with differential output ports (VGOUT_+, VGOUT_-) for driving ADCs, and differential input ports (VGIN_+, VGIN_-) that are ideal for directly interfacing to the MAX234 quad LNA. See the Functional Diagram for details. The VGA has an adjustable gain range from -1.dB to +39.dB, achieving a total dynamic range of typically db. The VGA gain can be adjusted with the differential gain-control input VG_CTL+ and VG_CTL-. Set the differential gain-control input voltage at -2V for maximum gain and +2V for minimum gain. The differential analog control common-mode voltage is typically 3.V. VGA Clamp A clamp is provided to limit the VGA output signals to avoid overdriving the ADC or to prevent ADC saturation. Set VG_CLAMP_MODE low to clamp the VGA differential outputs at 2.2V P-P. Set the VG_CLAMP_MODE high to disable the clamp. Power Down The device can also be powered down with PD. Set PD to logic-high for power-down mode. In power-down mode, the device draws a total supply current of 27mA. Set PD to a logic-low for normal operation Overload Recovery The device is also optimized for quick overload recovery for operation under the large input signal conditions that are typically found in ultrasound input buffer imaging applications. See the Typical Operating Characteristics for an illustration of the rapid recovery time from a transmit-related overload. 9

10 Applications Information External Compensation External compensation is required for bypassing internal biasing circuitry. Connect, as close as possible, individual 4.7µF capacitors from each pin EXT_C1, EXT_C2, and EXT_C3 (pin 13, 14, 1) to ground. External Bias Resistor An external resistor at EXT_RES is required to set the bias for the internal biasing circuitry. Connect, as close as possible, a 7.kΩ resistor from EXT_RES (pin 38) to ground. Analog Input and Output Coupling In typical applications, the is being driven from a low-noise amplifier (such as the MAX234) and is typically driving a discrete differential anti-alias filter into an ADC (such as the MAX1434 octal ADC). The differential input impedance of the is typically 2Ω. The differential outputs are capable of driving a differential load resistance of 1kΩ. The output impedance is 1Ω differential. The differential outputs have a common-mode bias of approximately 3V. AC-couple these differential outputs if the next stage has a different common-mode input range. Ultrasound-Specific IMD3 Specification Unlike typical communications specs, the two input tones are not equal in magnitude for the ultrasoundspecific IMD3 two-tone specification. In this measurement, f 1 represents reflections from tissue and f 2 represents reflections from blood. The latter reflections are typically 2dB lower in magnitude, and hence the measurement is defined with one input tone 2dB lower than the other. The IMD3 product of interest (f 1 - (f 2 - f 1 )) presents itself as an undesired Doppler error signal in ultrasound applications. See Figure 1. PCB Layout The pin configuration of the is optimized to facilitate a very compact physical layout of the device and its associated discrete components. A typical application for this device might incorporate several devices in close proximity to handle multiple channels of signal processing. The exposed pad (EP) of the s TQFP-EP package provides a low thermal-resistance path to the die. It is important that the PCB on which the is mounted be designed to conduct heat from the EP. In addition, provide the EP with a low-inductance path to electrical ground. The EP MUST be soldered to a ground plane on the PCB, either directly or through an array of plated via holes. ULTRASOUND IMD3-2dB f 1 - (f 2 - f 1 ) f 1 f 2 f 2 + (f 2 - f 1 ) Figure 1. Ultrasound IMD3 Measurement Technique 1

11 +V MAX234 SINGLE CHANNEL Z IN CONTROL D2, D1, D VG_CTL+ SINGLE CHANNEL VG_CTL- V IN 18nF 1nF 1nF 1nF VGOUT_+ VGOUT_- VGIN_+ VGIN_- VGA Ω Ω 1nF 1nF TO A SINGLE CHANNEL OF MAX1434 ADC -V 1nF Figure 2. Typical per-channel Ultrasound-Imaging Application Pin Configuration TOP VIEW VGIN8-26 VGIN7-27 VGIN VGIN VGIN1- VGIN2- VGOUT8- VREF EXT_RES VCC VGIN1+ VGIN PD 4 41 VCC VCC VGOUT8+ VREF VCC VG_CLAMP_MODE VCC VGOUT VGOUT VGOUT2- VGIN VGOUT2+ VGIN V CC VGOUT3- VGOUT3+ VGIN4- VGIN VGOUT4- VGOUT EXT_C1 EXT_C2 EXT_C VG_CTL+ VG_CTL- VGOUT- V CC 16 6 VGOUT+ VGIN- VGIN VGOUT6-2 6 VGOUT6+ VGIN6- VGIN *EP V CC VGOUT7- VGOUT7+ *EP = EXPOSED PAD TQFP (14mm x 14mm) 11

12 Chip Information PROCESS: Silicon Complementary Bipolar Package Information For the latest package outline information and land patterns, go to PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 1 TQFP-EP C1E

13 REVISION NUMBER REVISION DATE DESCRIPTION Revision History PAGES CHANGED 1/6 Initial release 1 2/9 Updated various sections 1 7, 9, 12 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 12 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.

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