FULLY- DEPLETED SOI CMOS CIRCUITS AND TECHNOLOGY FOR ULTRALOW- POWER APPLICATIONS
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1 FULLY- DEPLETED SOI CMOS CIRCUITS AND TECHNOLOGY FOR ULTRALOW- POWER APPLICATIONS Takayasu Sakurai University of Tokyo Akira Matsuzawa Tokyo Institute of Technology and Takakuni Douseki NTT Corporation
2 CONTENTS List of Contributors...xi Preface...xiii 1. Introduction Why SOI? What is SOI? Structure Advantages of SOI History of the Development of SOI Technology Partially-Depleted (PD) and Fully-Depleted (FD) SOI MOSFETs, and Future MOSFETs Summary...19 References FD-SOI Device and Process Technologies Introduction FD-SOI Devices Basic Features of SOI Devices Operating Modes of SOI MOSFETs Basic Characteristics of FD- and PD-SOI MOSFETs...32 v
3 2.3 Theoretical Basis of FD-SOI Device Operation: DC Operation Subthreshold Characteristics Post-threshold Characteristics Short-Channel Effects FD-SOI CMOS Process Technology Fabrication Process for FD-SOI CMOS Devices Problems and Solutions in FD-SOI Process Technology Summary...76 References Ultralow-Power Circuit Design with FD-SOI Devices Introduction Ultralow-Power Short-Range Wireless Systems Key Design Factor for Ultralow-Power LSIs Ultralow-Voltage Digital-Circuit Design Key Technologies Estimation of Energy Reduction Robustness of Ultralow-Voltage Operation Suppression of Floating-Body Effects Suppression of Threshold-Voltage Fluctuations due to Operating Temperature Prospects and Issues in Low-Voltage Analog Circuits Prospects Issues Technology Scaling, Analog Performance, and Performance Trend for Electrical Systems Technology Scaling and Analog Performance Performance Trend of Electrical Systems Low-Voltage Analog Circuit Basic Amplifier Switches Use of Passive Components vi
4 3.9 Fully-Depleted SOI Devices for Ultralow-Power Analog Circuits Transconductance (g m ) On-Conductance (G on ) of CMOS Analog Switch RF Characteristics of FD-SOI Devices Future Direction of RF and Mixed Signal Systems Summary References V MTCMOS/SOI Digital Circuits Introduction MTCMOS/SOI Circuits Combinational Circuits Sequential Circuits Adder Carry Look-Ahead Adder Carry Select Adder Multiplier Booth-Encoder and Wallace-Tree Multiplier Wave-Pipelined Multiplier Memory Design of Ultralow-Voltage Memory Cell MTCMOS/SOI SRAM Scheme Multi-V t h Memory Cell Multi-V t h Readout Circuit Frequency Divider CMOS Frequency Divider ED-MOS Frequency Divider ED-CMOS Frequency Divider CPU Summary References vii
5 V MTCMOS/SOI Analog/ RF Circuits Introduction RF Building Blocks Piezoelectric Oscillators Voltage Reference Generator Transmit/Receive Switches Low-Noise Amplifiers (LNAs) Power Amplifiers (PAs) Mixers and Image-Rejection Receiver Voltage-Controlled Oscillator (VCO) Limiting Amplifiers gm-c Filters A/D and D/A Converters Cyclic A/D Converter Sigma-Delta A/D Converter Current-Steering D/A Converter DC-DC Converter Design of DC-DC Converter Switched-Capacitor (SC)-Type Converter Buck Converter Applicable Zones for SC-Type and Buck Converters On-chip Distributed Power Supplies for Ultralow-Power LSIs I/O and ESD-Protection Circuitry for Ultralow-Power LSIs Standard Interface Trends Problems with I/O Circuits for 0.5-V/3.3-V Conversion Guidelines for Design of Interface Circuits Performance of I/O Circuits ESD Protection with FD-SOI Devices Design and Layout Requirements for ESD Protection Summary References viii
6 6. SPICE Model for SOI MOSFETs Introduction SPICE Model for SOI MOSFETs Parameter Extraction Example of SOI MOSFET Simulation Summary References Applications Introduction V Bluetooth RF Transceiver and Receiver Transceiver Receiver Solar-Powered, Radio-Controlled Watch Batteryless Short-Range Wireless System Transmitter Receiver Summary References Prospects for FD-SOI Technology Introduction Evolution of Nanoscale FD-SOI Devices Device and Substrate Technologies for Ultrathin-Body SOI MOSFETs Ultrathin-Body SOI MOSFETs SOI Wafer Technologies for Future MOSFETs Design of FD-SOI MOSFETs in Sub-100-nm Regime Power-Aware Electronics and Role of FD-SOI Technology Summary References Index ix
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