Index. l l-czochralski approach, 69

Size: px
Start display at page:

Download "Index. l l-czochralski approach, 69"

Transcription

1 Index l l-czochralski approach, D interconnection routing, 68 2-D microcantilevers, 327 2G strained Si MOSFET, D integration, 68 3D integration of Nanowires, D MEMS, D microbeams, D microcantilevers, 377 3D structure, 142 3D Volmer-Weber type growth, T-SRAM, 145 A Accumulation-mode pi-gate transistor, 180 Acoustic phonon confinement, 172 Acoustic phonon-dominated scattering, 309 Ambipolar transport, 224 Anodization process, 51 Anti-reflection coating, 363 B Back bias, 164 Ballistic mobility, 314 Ballistic mobility, 242 Ballistic transport, 227, 230 Ballisticity, 125, 128 Beyond-CMOS devices, 123 Biaxially strained devices, 283 Biaxially strained triple gate devices, 278 Bio particles, 319 Biochip, 351 Bioliquid cell, 351 Biosensors, 347 Bolometers, 383 Boltzmann transport equation, 219 Bovine serum albumin, 352 C Capacitance plateau, 325 Capacitor-less 1T-DRAM, 134 Carbon nanotube field-effect transistors, 216 Carbon nanotubes, 216 Centroid of the inversion charge, 158 Channel doping, 156 Charge centroid, 329, 332 CMOS circuits, 111 CMOS ICs, 1 CMOS technologies, 92 CMOS technology, 4 CMOS-MEMS, 357 CNT structures, 133 Coaxially-gated CNTFET, 221 Compliance approach, 48 Confinement effective mass, 170 Contact etch-stop layer, 165 Coulomb, 283 blockade, 253 blockade oscillations, 254 blockade phenomena, 252 Coulomb scattering,

2 444 Index C (cont.) Coupled MOS-SET, 257 CPW line, 106, 113 CPW transmission line, 106 Cut-off frequencies, 105 Cut-off frequency, 99 D Deep Reactive Ion Etching, 356 Density of state, 202 Deoxidation, 60 DG mode, 332 DG-FinDRAMs, 134 DG-MOSFET, 229 DGSOI, 174 DGSOI devices, 178 DIBL, 190 Digital substrate noise, 110, 111 Discretized Hamiltonian depends, 178 Dopant fluctuations, 169 Double etch scheme, 147 Double gate transistors, 417 Double-gate MOSFET, 128 Drain Induced Barrier Lowering, 158 DRAM, 327 DRIE, 356 Drift-diffusion mobility, 315 Dynamic performance, 161 Dynamic Threshold MOS, 271 E Effective mobility, 328 Effective oxide thickness, 25, 287 Electron conduction band tunneling, 221 Electron-phonon interaction, 239 Electrostatic Integrity, 191 Electrostatics, 156, 162 Epitaxial lateral overgrowth, 21 Equivalent oxide thickness, 324 EVB tunneling, 295 Excimer laser crystallization, 69 Extrinsic diffusivity coefficient, 10 Extrinsic transconductance, 98 F Fast Coupled Mode Space, 203 FD SOI MOSFET, 324 FD-SOI devices, 311 FD-SOI MOSFET, 269 FDSOI transistor, 159 Fermi Golden Rule, 182 Ferro-electric FET, 202 Film thickness, 159, 163 FinFET, 19, 96, 99, 134, 299 tri-gate, 274 FinFlash, 135 Finite element analysis simulations, 367 FinTFTs, 69 Flash lamp annealing, 10 Floating body cells, 134 Floating body effects, 256 Front-gate split C-V measurements, 325 Full potential of SOI technology, 169 Fully Depleted, 268 Fully-depleted SOI MOSFET, 323 G GAA transistors, 308 GAA-Gate All Around, 128 Gate induced floating body effect, 273 Gate workfunction, 157, 158 Gate-to-channel split, 308 Gate-to-channel tunneling current, 333 GeOI photodetectors, 18 GeOI substrates, 11 Germanium on Quartz, 22 Germanium on sapphire, 22 Germanium-on-insulator, 1 GHz range, 92 Global effective mobility, 319 Global straining technique, 303 GR fluctuations, 288 Graded-Channel SOI MOSFET, 270 Graphene, 194 Ground-plane, 154 H Hafnium dioxide, 6 Harmonic distortion, 113 High resistivity silicon, 92 High-k, 311 High-k gate dielectric, 92 High-k gate stack, 311 High-k layer, 304 Hole mobility, 178 I I-MOS, 202 Inelastic scattering, 246 Interlayer dielectrics, 68 Intra-subband acoustic phonons, 219 Inversion-layer centroid, 331

3 Index 445 Inversion-mode pi-gate MOSFET, 189 Ion beam induced epitaxial crystallisation, 8 Irreversible plastic, 49 J Junctionless gated resistor, 186 Junctionless pi-gate device, 189 Junctionless transistor, 186 Model of Gibson and Ashby, 50 Modulated Barrier Resonant Tunneling effect, 202 MOS-SET, 257 Multi-bridge-channel MOSFET, 128 Multi-channel thin film MOSFET, 123 Multi-gate MOSFET, 126 Multiple Gate Field Effect Transistors, 277 Multi-Users Multi-Chips, 357 K Kubo-Greenwood formula, 170 L Lab-on-chip, 351 Lateral crystallisation proceeds, 20 Lattice mismatches, 47 Lectron backscattered diffraction, 76 Lift-off process, 72 Lightly doped drain, 95 Lim-Fossum model, 326 Line edge roughness, 147 Line width roughness, 147 Linear kink effect, 273 Longitudinal confinement, 207 Lorentzian fluctuations Back-Gate-Induced, 287 Linear Kink Effect, 287 Low Schottky barrier contacts, 96 Low-field mobility mobility, 247 Low-temperature direct wafer bonding, 32 LPCVD, 72 LPCVD-deposition, 108 LPE germanium, 18 M Mathiessen rule, 318 Matthiessen-rule-like expression, 314 Meier-Wingreen formalism, 240 Metal-induced lateral crystallization, 68 Metallic SET, 257 Metal-Oxide-Semiconductor Field-Effect-Transistors, 287 Metal-Oxide-Semiconductor Single Electron Transistor, 251 Metamorphic growth, 48 Micro-Electro-Mechanical Systems, 356 Microfluidic biochips, 345 Microheater, 371 Midgap interface state density, 5 MOCVD, 10 N Nano-biosensors, 361 Nanochip, 344 Nano-interdigitated arrays, 358 Nanoribbons, 70, 76, 195 Nanotubes armchair-type, 218 zigzag-type, 218 Nanowire, 251, 252, 343 Nanowire FET, 238 Nanowire field effect transistors, 251 Nanowire-nFET, 124 NEMS, 377 nida capacitance sensors, 358 nida-gate, 359 nida-gate MOSFET, 358 Nitrogen radical activated samples, 35 Noise Generation-Recombination, 288 McWhorter, 291 Nyquist, 288 Non volatile SRAM, 136 Non-equilibrium Green s function, 217 Non-translational invariant movement, 207 Nuclear Reaction Analysis, 8 Null transverse field condition, 157 NW FET, 343, 345 NW sensors, 344 O Orientation effects, 175 Oswald Ripening Mechanism, 40 P Paramorphic approach, 48 Partially Depleted, 268 PECVD, 17 Performance, 173 PH-limited, 247 Phonon scattering, 193 Phonon scattering, 172, 173

4 446 Index P (cont.) Phonon scattering rate, 173 Piezoresistor, 385 PIN diode, 363 Plasma Enhanced Chemical Vapor Deposition, 365 Polysilicon microheater, 369 Porosification, 52, 56 Porous silicon oxidation, 49 Protein BSA molecules, 344 PS heterostructures, 54 Pseudomorphic growth, 48 Pseudo-MOSFET, 82 Pseudosubstrate, 49, 60 Q QG-Quadruple Gate, 128 QM darkspace, 328 QM effect, 326, 327 QM effective gate dielectric thickening, 327 QM modes, 326 Quantum confinement, 157 Quantum effects, 170 Quantum-mechanical effects, 324 R Radio frequency, 92 Random Dopant Fluctuation, 163 Reactive Ion Etching, 360 Remote Coulomb scattering, 311, 314 Remote-charge scattering, 237 Resonant tunneling effect, 209 Resonant tunneling -FET, 202 Reversible elastic, 49 RF applications, 112 RF FinFET, 101 RF performance, 99, 100 RMS roughness, 24 Roughness RMS, 242 S Scalability, 162 SCE, 97 Schottky barrier, 202 Schottky barrier MOSFET, 97, 98 Schottky barrier CNTFET, 222 Schottky contacts, 126 Schottky-like source and drain contacts, 216 Screen printing, 367 Self-aligned tungsten gate process, 6 Self-assembled nanoporous materials, 69 Self-consistent Born approximation, 5 Self-consistent three-dimensional Non-Equilibrium Green Function quantum simulator, 202 Semiconductor nanowires, 69 Series resistance, 159 SG mode, 332 SG MOSFET, 105 Short channel effect, 141 Short channel effects, 158, 169, 253, 307 Short time anneal, 4, 38 Short-Channel Effect, 190 Short-channel effects, 99, 134, 191, 323 Silicon nanowire, 25, 138 Silicon SET, 239, 257, 245 Silicon-on-Nothing, 364 Silicon-on-sapphire, 22 Single dopant, 251, 261 Single dopant effects, 252 Single electron effects, 255 Single gate SOI, 127 Single gate transistor, 134 Single particle Monte Carlo method, 170 SiOC hard mask, 147 Six-band k p model, 170 Small slope switches, 132 Smart-cut process, 23 Smart-Cut SOI, 85 SOI and Germanium on Insulator substrates, 38 SOI fully depleted, 308 SOI Gate-all-Around, 211 SOI MOSFET, 262 SOI nanowire transistor, 344 SOI NW FET, 344 SOI PIN photodetector, 363 SOI RF-MEMS, 357 SOI-CMOS-MEMS, 356 SOI-nanowires transistors, 345 Solid-phase crystallization, 67, 68 SONOS, 136 Source/drain engineering, 133 S-parameters, 102 Spin-on-dopant, 10 Spreading Resistance analysis, 13 SR scattering, 174 SRAM, 123, 146, 150 SR-limited, 238, 247 SR-limited mobility, 243 Stability diagram, 257 Static noise margin, 163 Sticking/unsticking, 52 Strained MOSFET, 96

5 Index 447 Strained silicon on insulator, 123 Strained-SOI, 166 Stress memorization technique, 166 Subband modulation, 170 Subband modulation effect, 174 Subband spatial fluctuations, 248 Subthreshold slope, 196, 272 Super lateral growth, 69 Super-cell, 30 Supersaturation, 70 Surface roughness, 109, 172 Surface-roughness scattering, 238 Suspended-Gate FET, 202 System-on-a-chip, 357 System-on-chip, 91, 92 Systems-on-chip, 110 T TCAD simulations, 320 TeraHertz sensors, 356 Thermal coefficients of expansion, 11 Thermally induced decomposition, 75 Threshold voltage, 143, 155 Thru-Line-Reflect method, 107 Top-down approach, 343 Transconductance, 198, 216, 267 Transferred germanium layer, 44 Transferred layer, 13 Transport anisotropy, 177 Transport boosters, 164 Trigate MOSFET, 196 Tunnel barriers, 253 Tunnel FET, 133 Tunnel-FET, 202 U Ultrashallow junctions, 187 Ultra-thin body, 96 Ultrathin buried oxide, 155 Ultra-thin FDSOI, 125 Ultrathin SOI, 170, 178 Ultra-thin SOI devices, 172 Uncooled infrared, 356 Uncooled IR sensors, 356 Underlap geometry, 356 Uniaxially strained devices, 252, 259 UTB SOI, 283 UTB SOI MOSFET, 324, 336, 327 V Vapor-liquid-solid catalytic growth, 67, 69 Variability, 163 VLS growth, 79 Voltage Controlled Oscillators, 371 Voltage-Doping Transformation, 190 Volume inversion, 170 W Wavefunction confinement, 180 Wheatstone bridge, 374 Wheatstone structure, 387 Wigner current, 231 Wigner Monte Carlo simulation, 217 Wigner-Boltzmann equation, 220

CONTENTS. 2.2 Schrodinger's Wave Equation 31. PART I Semiconductor Material Properties. 2.3 Applications of Schrodinger's Wave Equation 34

CONTENTS. 2.2 Schrodinger's Wave Equation 31. PART I Semiconductor Material Properties. 2.3 Applications of Schrodinger's Wave Equation 34 CONTENTS Preface x Prologue Semiconductors and the Integrated Circuit xvii PART I Semiconductor Material Properties CHAPTER 1 The Crystal Structure of Solids 1 1.0 Preview 1 1.1 Semiconductor Materials

More information

Alternatives to standard MOSFETs. What problems are we really trying to solve?

Alternatives to standard MOSFETs. What problems are we really trying to solve? Alternatives to standard MOSFETs A number of alternative FET schemes have been proposed, with an eye toward scaling up to the 10 nm node. Modifications to the standard MOSFET include: Silicon-in-insulator

More information

Semiconductor Physics and Devices

Semiconductor Physics and Devices Metal-Semiconductor and Semiconductor Heterojunctions The Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) is one of two major types of transistors. The MOSFET is used in digital circuit, because

More information

PHYSICS OF SEMICONDUCTOR DEVICES

PHYSICS OF SEMICONDUCTOR DEVICES PHYSICS OF SEMICONDUCTOR DEVICES PHYSICS OF SEMICONDUCTOR DEVICES by J. P. Colinge Department of Electrical and Computer Engineering University of California, Davis C. A. Colinge Department of Electrical

More information

Parameter Optimization Of GAA Nano Wire FET Using Taguchi Method

Parameter Optimization Of GAA Nano Wire FET Using Taguchi Method Parameter Optimization Of GAA Nano Wire FET Using Taguchi Method S.P. Venu Madhava Rao E.V.L.N Rangacharyulu K.Lal Kishore Professor, SNIST Professor, PSMCET Registrar, JNTUH Abstract As the process technology

More information

Session 3: Solid State Devices. Silicon on Insulator

Session 3: Solid State Devices. Silicon on Insulator Session 3: Solid State Devices Silicon on Insulator 1 Outline A B C D E F G H I J 2 Outline Ref: Taurand Ning 3 SOI Technology SOl materials: SIMOX, BESOl, and Smart Cut SIMOX : Synthesis by IMplanted

More information

Chapter 3: Basics Semiconductor Devices and Processing 2006/9/27 1. Topics

Chapter 3: Basics Semiconductor Devices and Processing 2006/9/27 1. Topics Chapter 3: Basics Semiconductor Devices and Processing 2006/9/27 1 Topics What is semiconductor Basic semiconductor devices Basics of IC processing CMOS technologies 2006/9/27 2 1 What is Semiconductor

More information

Nanowire Transistors. Physics of Devices and Materials in One Dimension

Nanowire Transistors. Physics of Devices and Materials in One Dimension Nanowire Transistors Physics of Devices and Materials in One Dimension From quantum mechanical concepts to practical circuit applications, this book presents a self-contained and up-to-date account of

More information

Semiconductor Devices

Semiconductor Devices Semiconductor Devices Modelling and Technology Source Electrons Gate Holes Drain Insulator Nandita DasGupta Amitava DasGupta SEMICONDUCTOR DEVICES Modelling and Technology NANDITA DASGUPTA Professor Department

More information

Chapter 3 Basics Semiconductor Devices and Processing

Chapter 3 Basics Semiconductor Devices and Processing Chapter 3 Basics Semiconductor Devices and Processing 1 Objectives Identify at least two semiconductor materials from the periodic table of elements List n-type and p-type dopants Describe a diode and

More information

International Journal of Scientific & Engineering Research, Volume 6, Issue 2, February-2015 ISSN

International Journal of Scientific & Engineering Research, Volume 6, Issue 2, February-2015 ISSN Performance Evaluation and Comparison of Ultra-thin Bulk (UTB), Partially Depleted and Fully Depleted SOI MOSFET using Silvaco TCAD Tool Seema Verma1, Pooja Srivastava2, Juhi Dave3, Mukta Jain4, Priya

More information

MOSFET short channel effects

MOSFET short channel effects MOSFET short channel effects overview Five different short channel effects can be distinguished: velocity saturation drain induced barrier lowering (DIBL) impact ionization surface scattering hot electrons

More information

Index. Cambridge University Press Fundamentals of Modern VLSI Devices: Second Edition Yuan Taur and Tak H. Ning.

Index. Cambridge University Press Fundamentals of Modern VLSI Devices: Second Edition Yuan Taur and Tak H. Ning. abrupt junction, 38 acceptor, 17 acceptor level, 18 9 access transistor, 477 8, 496 accumulation, 76 7 accumulation layer, 250 charge density, 250 resistance, 274 5 sheet resistivity, 251 ac equivalent

More information

FUNDAMENTALS OF MODERN VLSI DEVICES

FUNDAMENTALS OF MODERN VLSI DEVICES 19-13- FUNDAMENTALS OF MODERN VLSI DEVICES YUAN TAUR TAK H. MING CAMBRIDGE UNIVERSITY PRESS Physical Constants and Unit Conversions List of Symbols Preface page xi xiii xxi 1 INTRODUCTION I 1.1 Evolution

More information

MEMS in ECE at CMU. Gary K. Fedder

MEMS in ECE at CMU. Gary K. Fedder MEMS in ECE at CMU Gary K. Fedder Department of Electrical and Computer Engineering and The Robotics Institute Carnegie Mellon University Pittsburgh, PA 15213-3890 fedder@ece.cmu.edu http://www.ece.cmu.edu/~mems

More information

Integrated diodes. The forward voltage drop only slightly depends on the forward current. ELEKTRONIKOS ĮTAISAI

Integrated diodes. The forward voltage drop only slightly depends on the forward current. ELEKTRONIKOS ĮTAISAI 1 Integrated diodes pn junctions of transistor structures can be used as integrated diodes. The choice of the junction is limited by the considerations of switching speed and breakdown voltage. The forward

More information

Transistor was first invented by William.B.Shockley, Walter Brattain and John Bardeen of Bell Labratories. In 1961, first IC was introduced.

Transistor was first invented by William.B.Shockley, Walter Brattain and John Bardeen of Bell Labratories. In 1961, first IC was introduced. Unit 1 Basic MOS Technology Transistor was first invented by William.B.Shockley, Walter Brattain and John Bardeen of Bell Labratories. In 1961, first IC was introduced. Levels of Integration:- i) SSI:-

More information

Fin-Shaped Field Effect Transistor (FinFET) Min Ku Kim 03/07/2018

Fin-Shaped Field Effect Transistor (FinFET) Min Ku Kim 03/07/2018 Fin-Shaped Field Effect Transistor (FinFET) Min Ku Kim 03/07/2018 ECE 658 Sp 2018 Semiconductor Materials and Device Characterizations OUTLINE Background FinFET Future Roadmap Keeping up w/ Moore s Law

More information

420 Intro to VLSI Design

420 Intro to VLSI Design Dept of Electrical and Computer Engineering 420 Intro to VLSI Design Lecture 0: Course Introduction and Overview Valencia M. Joyner Spring 2005 Getting Started Syllabus About the Instructor Labs, Problem

More information

ITRS MOSFET Scaling Trends, Challenges, and Key Technology Innovations

ITRS MOSFET Scaling Trends, Challenges, and Key Technology Innovations Workshop on Frontiers of Extreme Computing Santa Cruz, CA October 24, 2005 ITRS MOSFET Scaling Trends, Challenges, and Key Technology Innovations Peter M. Zeitzoff Outline Introduction MOSFET scaling and

More information

FinFET vs. FD-SOI Key Advantages & Disadvantages

FinFET vs. FD-SOI Key Advantages & Disadvantages FinFET vs. FD-SOI Key Advantages & Disadvantages Amiad Conley Technical Marketing Manager Process Diagnostics & Control, Applied Materials ChipEx-2014, Apr 2014 1 Moore s Law The number of transistors

More information

Performance Evaluation of MISISFET- TCAD Simulation

Performance Evaluation of MISISFET- TCAD Simulation Performance Evaluation of MISISFET- TCAD Simulation Tarun Chaudhary Gargi Khanna Rajeevan Chandel ABSTRACT A novel device n-misisfet with a dielectric stack instead of the single insulator of n-mosfet

More information

Power MOSFET Zheng Yang (ERF 3017,

Power MOSFET Zheng Yang (ERF 3017, ECE442 Power Semiconductor Devices and Integrated Circuits Power MOSFET Zheng Yang (ERF 3017, email: yangzhen@uic.edu) Evolution of low-voltage (

More information

Low Energy Communication: NanoPhotonic & Electrical. Prof. Eli Yablonovitch EECS Dept. UC Berkeley

Low Energy Communication: NanoPhotonic & Electrical. Prof. Eli Yablonovitch EECS Dept. UC Berkeley Low Energy Communication: NanoPhotonic & Electrical Prof. Eli Yablonovitch EECS Dept. UC Berkeley What is the energy cost of reading out your flash memory? Read the current going through a resistor, in

More information

Lecture 020 ECE4430 Review II (1/5/04) Page 020-1

Lecture 020 ECE4430 Review II (1/5/04) Page 020-1 Lecture 020 ECE4430 Review II (1/5/04) Page 020-1 LECTURE 020 ECE 4430 REVIEW II (READING: GHLM - Chap. 2) Objective The objective of this presentation is: 1.) Identify the prerequisite material as taught

More information

CHAPTER 3 TWO DIMENSIONAL ANALYTICAL MODELING FOR THRESHOLD VOLTAGE

CHAPTER 3 TWO DIMENSIONAL ANALYTICAL MODELING FOR THRESHOLD VOLTAGE 49 CHAPTER 3 TWO DIMENSIONAL ANALYTICAL MODELING FOR THRESHOLD VOLTAGE 3.1 INTRODUCTION A qualitative notion of threshold voltage V th is the gate-source voltage at which an inversion channel forms, which

More information

Lecture 020 ECE4430 Review II (1/5/04) Page 020-1

Lecture 020 ECE4430 Review II (1/5/04) Page 020-1 Lecture 020 ECE4430 Review II (1/5/04) Page 020-1 LECTURE 020 ECE 4430 REVIEW II (READING: GHLM - Chap. 2) Objective The objective of this presentation is: 1.) Identify the prerequisite material as taught

More information

Silicon on Insulator (SOI) Spring 2018 EE 532 Tao Chen

Silicon on Insulator (SOI) Spring 2018 EE 532 Tao Chen Silicon on Insulator (SOI) Spring 2018 EE 532 Tao Chen What is Silicon on Insulator (SOI)? SOI silicon on insulator, refers to placing a thin layer of silicon on top of an insulator such as SiO2. The devices

More information

INTRODUCTION TO MOS TECHNOLOGY

INTRODUCTION TO MOS TECHNOLOGY INTRODUCTION TO MOS TECHNOLOGY 1. The MOS transistor The most basic element in the design of a large scale integrated circuit is the transistor. For the processes we will discuss, the type of transistor

More information

ECE520 VLSI Design. Lecture 2: Basic MOS Physics. Payman Zarkesh-Ha

ECE520 VLSI Design. Lecture 2: Basic MOS Physics. Payman Zarkesh-Ha ECE520 VLSI Design Lecture 2: Basic MOS Physics Payman Zarkesh-Ha Office: ECE Bldg. 230B Office hours: Wednesday 2:00-3:00PM or by appointment E-mail: pzarkesh@unm.edu Slide: 1 Review of Last Lecture Semiconductor

More information

Lecture #29. Moore s Law

Lecture #29. Moore s Law Lecture #29 ANNOUNCEMENTS HW#15 will be for extra credit Quiz #6 (Thursday 5/8) will include MOSFET C-V No late Projects will be accepted after Thursday 5/8 The last Coffee Hour will be held this Thursday

More information

Research Needs for Device Sciences Modeling and Simulation (May 6, 2005)

Research Needs for Device Sciences Modeling and Simulation (May 6, 2005) Research Needs for Device Sciences Modeling and Simulation (May 6, 2005) SRC Device Sciences 2005 Modeling and Simulation Task Force Contributing organizations: Axcelis, Freescale, IBM, Intel, LSI, SRC,

More information

Drain. Drain. [Intel: bulk-si MOSFETs]

Drain. Drain. [Intel: bulk-si MOSFETs] 1 Introduction For more than 40 years, the evolution and growth of very-large-scale integration (VLSI) silicon-based integrated circuits (ICs) have followed from the continual shrinking, or scaling, of

More information

Advanced PDK and Technologies accessible through ASCENT

Advanced PDK and Technologies accessible through ASCENT Advanced PDK and Technologies accessible through ASCENT MOS-AK Dresden, Sept. 3, 2018 L. Perniola*, O. Rozeau*, O. Faynot*, T. Poiroux*, P. Roseingrave^ olivier.faynot@cea.fr *Cea-Leti, Grenoble France;

More information

A BRIEF STUDY ON CHALLENGES OF MOSFET AND EVOLUTION OF FINFETS

A BRIEF STUDY ON CHALLENGES OF MOSFET AND EVOLUTION OF FINFETS A BRIEF STUDY ON CHALLENGES OF MOSFET AND EVOLUTION OF FINFETS ABSTRACT J.Shailaja 1, Y.Priya 2 1 ECE Department, Sphoorthy Engineering College (India) 2 ECE,Sphoorthy Engineering College, (India) The

More information

SRM INSTITUTE OF SCIENCE AND TECHNOLOGY (DEEMED UNIVERSITY)

SRM INSTITUTE OF SCIENCE AND TECHNOLOGY (DEEMED UNIVERSITY) SRM INSTITUTE OF SCIENCE AND TECHNOLOGY (DEEMED UNIVERSITY) QUESTION BANK I YEAR B.Tech (II Semester) ELECTRONIC DEVICES (COMMON FOR EC102, EE104, IC108, BM106) UNIT-I PART-A 1. What are intrinsic and

More information

Design & Simulation of Multi Gate Piezoelectric FET Devices for Sensing Applications

Design & Simulation of Multi Gate Piezoelectric FET Devices for Sensing Applications Design & Simulation of Multi Gate Piezoelectric FET Devices for Sensing Applications Sunita Malik 1, Manoj Kumar Duhan 2 Electronics & Communication Engineering Department, Deenbandhu Chhotu Ram University

More information

ISSN: [Soni* et al., 6(4): April, 2017] Impact Factor: 4.116

ISSN: [Soni* et al., 6(4): April, 2017] Impact Factor: 4.116 IJESRT INTERNATIONAL JOURNAL OF ENGINEERING SCIENCES & RESEARCH TECHNOLOGY A COMPARITIVELY ANALISIS OF VARIOUS CMOS FINFET STRUCTURE Ragini Soni*, Mrs. Jyotsna Sagar * M.Tech Student (VLSI ) Asst. Professor,

More information

Characterization of Variability in Deeply-Scaled Fully Depleted SOI Devices

Characterization of Variability in Deeply-Scaled Fully Depleted SOI Devices Characterization of Variability in Deeply-Scaled Fully Depleted SOI Devices Aikaterini Papadopoulou Electrical Engineering and Computer Sciences University of California at Berkeley Technical Report No.

More information

value of W max for the device. The at band voltage is -0.9 V. Problem 5: An Al-gate n-channel MOS capacitor has a doping of N a = cm ;3. The oxi

value of W max for the device. The at band voltage is -0.9 V. Problem 5: An Al-gate n-channel MOS capacitor has a doping of N a = cm ;3. The oxi Prof. Jasprit Singh Fall 2001 EECS 320 Homework 10 This homework is due on December 6 Problem 1: An n-type In 0:53 Ga 0:47 As epitaxial layer doped at 10 16 cm ;3 is to be used as a channel in a FET. A

More information

Lecture 33 - The Short Metal-Oxide-Semiconductor Field-Effect Transistor (cont.) April 30, 2007

Lecture 33 - The Short Metal-Oxide-Semiconductor Field-Effect Transistor (cont.) April 30, 2007 6.720J/3.43J - Integrated Microelectronic Devices - Spring 2007 Lecture 33-1 Lecture 33 - The Short Metal-Oxide-Semiconductor Field-Effect Transistor (cont.) April 30, 2007 Contents: 1. MOSFET scaling

More information

EE 5611 Introduction to Microelectronic Technologies Fall Thursday, September 04, 2014 Lecture 02

EE 5611 Introduction to Microelectronic Technologies Fall Thursday, September 04, 2014 Lecture 02 EE 5611 Introduction to Microelectronic Technologies Fall 2014 Thursday, September 04, 2014 Lecture 02 1 Lecture Outline Review on semiconductor materials Review on microelectronic devices Example of microelectronic

More information

Nanotechnology, the infrastructure, and IBM s research projects

Nanotechnology, the infrastructure, and IBM s research projects Nanotechnology, the infrastructure, and IBM s research projects Dr. Paul Seidler Coordinator Nanotechnology Center, IBM Research - Zurich Nanotechnology is the understanding and control of matter at dimensions

More information

45nm Bulk CMOS Within-Die Variations. Courtesy of C. Spanos (UC Berkeley) Lecture 11. Process-induced Variability I: Random

45nm Bulk CMOS Within-Die Variations. Courtesy of C. Spanos (UC Berkeley) Lecture 11. Process-induced Variability I: Random 45nm Bulk CMOS Within-Die Variations. Courtesy of C. Spanos (UC Berkeley) Lecture 11 Process-induced Variability I: Random Random Variability Sources and Characterization Comparisons of Different MOSFET

More information

Challenges for Nanoscale MOSFETs and Emerging Nanoelectronics

Challenges for Nanoscale MOSFETs and Emerging Nanoelectronics TRANSACTIONS ON ELECTRICAL AND ELECTRONIC MATERIALS Vol. 11, No. 3, pp. 93-105, June 25, 2010 Invited Paper pissn: 1229-7607 eissn: 2092-7592 DOI: 10.4313/TEEM.2010.11.3.093 Challenges for Nanoscale MOSFETs

More information

Index. 1-π model, 370 1/f noise, 57, π model, 373 β-ratio, 425

Index. 1-π model, 370 1/f noise, 57, π model, 373 β-ratio, 425 Index 1-π model, 370 1/f noise, 57, 155 2-π model, 373 β-ratio, 425 A Ac symmetry test, 93 Acoustic phonons, 18 Admittance parameters, 209 All-around gate, 397, 410 Analytic potential model, 432, 447 Analytical

More information

NAME: Last First Signature

NAME: Last First Signature UNIVERSITY OF CALIFORNIA, BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences EE 130: IC Devices Spring 2003 FINAL EXAMINATION NAME: Last First Signature STUDENT

More information

Eigen # Hole s Wavefunctions, E-k and Equi-Energy Contours from a P-FinFET. Lecture 5

Eigen # Hole s Wavefunctions, E-k and Equi-Energy Contours from a P-FinFET. Lecture 5 Eigen # Gate Gate Hole s Wavefunctions, E-k and Equi-Energy Contours from a P-FinFET Lecture 5 Thin-Body MOSFET Carrier Transport quantum confinement effects low-field mobility: Orientation and Si Thickness

More information

EECS130 Integrated Circuit Devices

EECS130 Integrated Circuit Devices EECS130 Integrated Circuit Devices Professor Ali Javey 11/6/2007 MOSFETs Lecture 6 BJTs- Lecture 1 Reading Assignment: Chapter 10 More Scalable Device Structures Vertical Scaling is important. For example,

More information

EE4800 CMOS Digital IC Design & Analysis. Lecture 1 Introduction Zhuo Feng

EE4800 CMOS Digital IC Design & Analysis. Lecture 1 Introduction Zhuo Feng EE4800 CMOS Digital IC Design & Analysis Lecture 1 Introduction Zhuo Feng 1.1 Prof. Zhuo Feng Office: EERC 730 Phone: 487-3116 Email: zhuofeng@mtu.edu Class Website http://www.ece.mtu.edu/~zhuofeng/ee4800fall2010.html

More information

Quantum Condensed Matter Physics Lecture 16

Quantum Condensed Matter Physics Lecture 16 Quantum Condensed Matter Physics Lecture 16 David Ritchie QCMP Lent/Easter 2018 http://www.sp.phy.cam.ac.uk/drp2/home 16.1 Quantum Condensed Matter Physics 1. Classical and Semi-classical models for electrons

More information

ECE 5745 Complex Digital ASIC Design Topic 2: CMOS Devices

ECE 5745 Complex Digital ASIC Design Topic 2: CMOS Devices ECE 5745 Complex Digital ASIC Design Topic 2: CMOS Devices Christopher Batten School of Electrical and Computer Engineering Cornell University http://www.csl.cornell.edu/courses/ece5950 Simple Transistor

More information

ECE 340 Lecture 37 : Metal- Insulator-Semiconductor FET Class Outline:

ECE 340 Lecture 37 : Metal- Insulator-Semiconductor FET Class Outline: ECE 340 Lecture 37 : Metal- Insulator-Semiconductor FET Class Outline: Metal-Semiconductor Junctions MOSFET Basic Operation MOS Capacitor Things you should know when you leave Key Questions What is the

More information

MSE 410/ECE 340: Electrical Properties of Materials Fall 2016 Micron School of Materials Science and Engineering Boise State University

MSE 410/ECE 340: Electrical Properties of Materials Fall 2016 Micron School of Materials Science and Engineering Boise State University MSE 410/ECE 340: Electrical Properties of Materials Fall 2016 Micron School of Materials Science and Engineering Boise State University Practice Final Exam 1 Read the questions carefully Label all figures

More information

Characterization of SOI MOSFETs by means of charge-pumping

Characterization of SOI MOSFETs by means of charge-pumping Paper Characterization of SOI MOSFETs by means of charge-pumping Grzegorz Głuszko, Sławomir Szostak, Heinrich Gottlob, Max Lemme, and Lidia Łukasiak Abstract This paper presents the results of charge-pumping

More information

Final Exam Topics. IC Technology Advancement. Microelectronics Technology in the 21 st Century. Intel s 90 nm CMOS Technology. 14 nm CMOS Transistors

Final Exam Topics. IC Technology Advancement. Microelectronics Technology in the 21 st Century. Intel s 90 nm CMOS Technology. 14 nm CMOS Transistors ANNOUNCEMENTS Final Exam: When: Wednesday 12/10 12:30-3:30PM Where: 10 Evans (last names beginning A-R) 60 Evans (last names beginning S-Z) Comprehensive coverage of course material Closed book; 3 sheets

More information

FinFET Devices and Technologies

FinFET Devices and Technologies FinFET Devices and Technologies Jack C. Lee The University of Texas at Austin NCCAVS PAG Seminar 9/25/14 Material Opportunities for Semiconductors 1 Why FinFETs? Planar MOSFETs cannot scale beyond 22nm

More information

Gallium nitride (GaN)

Gallium nitride (GaN) 80 Technology focus: GaN power electronics Vertical, CMOS and dual-gate approaches to gallium nitride power electronics US research company HRL Laboratories has published a number of papers concerning

More information

Comparative Study of Silicon and Germanium Doping-less Tunnel Field Effect Transistors

Comparative Study of Silicon and Germanium Doping-less Tunnel Field Effect Transistors IJSTE - International Journal of Science Technology & Engineering Volume 2 Issue 5 November 2015 ISSN (online): 2349-784X Comparative Study of Silicon and Germanium Doping-less Tunnel Field Effect Transistors

More information

The Art of ANALOG LAYOUT Second Edition

The Art of ANALOG LAYOUT Second Edition The Art of ANALOG LAYOUT Second Edition Alan Hastings 3 EARSON Pearson Education International Contents Preface to the Second Edition xvii Preface to the First Edition xix Acknowledgments xxi 1 Device

More information

ECE 440 Lecture 39 : MOSFET-II

ECE 440 Lecture 39 : MOSFET-II ECE 440 Lecture 39 : MOSFETII Class Outline: MOSFET Qualitative Effective Mobility MOSFET Quantitative Things you should know when you leave Key Questions How does a MOSFET work? Why does the channel mobility

More information

Three Terminal Devices

Three Terminal Devices Three Terminal Devices - field effect transistor (FET) - bipolar junction transistor (BJT) - foundation on which modern electronics is built - active devices - devices described completely by considering

More information

Organic Electronics. Information: Information: 0331a/ 0442/

Organic Electronics. Information: Information:  0331a/ 0442/ Organic Electronics (Course Number 300442 ) Spring 2006 Organic Field Effect Transistors Instructor: Dr. Dietmar Knipp Information: Information: http://www.faculty.iubremen.de/course/c30 http://www.faculty.iubremen.de/course/c30

More information

Semiconductor Physics and Devices

Semiconductor Physics and Devices Nonideal Effect The experimental characteristics of MOSFETs deviate to some degree from the ideal relations that have been theoretically derived. Semiconductor Physics and Devices Chapter 11. MOSFET: Additional

More information

Basic Fabrication Steps

Basic Fabrication Steps Basic Fabrication Steps and Layout Somayyeh Koohi Department of Computer Engineering Adapted with modifications from lecture notes prepared by author Outline Fabrication steps Transistor structures Transistor

More information

Investigating the Electronic Behavior of Nano-materials From Charge Transport Properties to System Response

Investigating the Electronic Behavior of Nano-materials From Charge Transport Properties to System Response Investigating the Electronic Behavior of Nano-materials From Charge Transport Properties to System Response Amit Verma Assistant Professor Department of Electrical Engineering & Computer Science Texas

More information

INTRODUCTION: Basic operating principle of a MOSFET:

INTRODUCTION: Basic operating principle of a MOSFET: INTRODUCTION: Along with the Junction Field Effect Transistor (JFET), there is another type of Field Effect Transistor available whose Gate input is electrically insulated from the main current carrying

More information

Design cycle for MEMS

Design cycle for MEMS Design cycle for MEMS Design cycle for ICs IC Process Selection nmos CMOS BiCMOS ECL for logic for I/O and driver circuit for critical high speed parts of the system The Real Estate of a Wafer MOS Transistor

More information

An introduction to Depletion-mode MOSFETs By Linden Harrison

An introduction to Depletion-mode MOSFETs By Linden Harrison An introduction to Depletion-mode MOSFETs By Linden Harrison Since the mid-nineteen seventies the enhancement-mode MOSFET has been the subject of almost continuous global research, development, and refinement

More information

Semiconductor Devices

Semiconductor Devices Semiconductor Devices - 2014 Lecture Course Part of SS Module PY4P03 Dr. P. Stamenov School of Physics and CRANN, Trinity College, Dublin 2, Ireland Hilary Term, TCD 3 th of Feb 14 MOSFET Unmodified Channel

More information

Fundamentals of Power Semiconductor Devices

Fundamentals of Power Semiconductor Devices В. Jayant Baliga Fundamentals of Power Semiconductor Devices 4y Spri ringer Contents Preface vii Chapter 1 Introduction 1 1.1 Ideal and Typical Power Switching Waveforms 3 1.2 Ideal and Typical Power Device

More information

Silicon Photonics Technology Platform To Advance The Development Of Optical Interconnects

Silicon Photonics Technology Platform To Advance The Development Of Optical Interconnects Silicon Photonics Technology Platform To Advance The Development Of Optical Interconnects By Mieke Van Bavel, science editor, imec, Belgium; Joris Van Campenhout, imec, Belgium; Wim Bogaerts, imec s associated

More information

Design Simulation and Analysis of NMOS Characteristics for Varying Oxide Thickness

Design Simulation and Analysis of NMOS Characteristics for Varying Oxide Thickness MIT International Journal of Electronics and Communication Engineering, Vol. 4, No. 2, August 2014, pp. 81 85 81 Design Simulation and Analysis of NMOS Characteristics for Varying Oxide Thickness Alpana

More information

UNIT-4. Microwave Engineering

UNIT-4. Microwave Engineering UNIT-4 Microwave Engineering Microwave Solid State Devices Two problems with conventional transistors at higher frequencies are: 1. Stray capacitance and inductance. - remedy is interdigital design. 2.Transit

More information

DESIGN OF 20 nm FinFET STRUCTURE WITH ROUND FIN CORNERS USING SIDE SURFACE SLOPE VARIATION

DESIGN OF 20 nm FinFET STRUCTURE WITH ROUND FIN CORNERS USING SIDE SURFACE SLOPE VARIATION Journal of Electron Devices, Vol. 18, 2013, pp. 1537-1542 JED [ISSN: 1682-3427 ] DESIGN OF 20 nm FinFET STRUCTURE WITH ROUND FIN CORNERS USING SIDE SURFACE SLOPE VARIATION Suman Lata Tripathi and R. A.

More information

ELECTRONIC DEVICES AND CIRCUITS

ELECTRONIC DEVICES AND CIRCUITS ELECTRONIC DEVICES AND CIRCUITS 1. At room temperature the current in an intrinsic semiconductor is due to A. holes B. electrons C. ions D. holes and electrons 2. Work function is the maximum energy required

More information

+1 (479)

+1 (479) Introduction to VLSI Design http://csce.uark.edu +1 (479) 575-6043 yrpeng@uark.edu Invention of the Transistor Vacuum tubes ruled in first half of 20th century Large, expensive, power-hungry, unreliable

More information

Fundamentals of CMOS Image Sensors

Fundamentals of CMOS Image Sensors CHAPTER 2 Fundamentals of CMOS Image Sensors Mixed-Signal IC Design for Image Sensor 2-1 Outline Photoelectric Effect Photodetectors CMOS Image Sensor(CIS) Array Architecture CIS Peripherals Design Considerations

More information

International Association of Scientific Innovation and Research (IASIR) (An Association Unifying the Sciences, Engineering, and Applied Research)

International Association of Scientific Innovation and Research (IASIR) (An Association Unifying the Sciences, Engineering, and Applied Research) International Association of Scientific Innovation and Research (IASIR) (An Association Unifying the Sciences, Engineering, and Applied Research) International Journal of Emerging Technologies in Computational

More information

444 Index. F Fermi potential, 146 FGMOS transistor, 20 23, 57, 83, 84, 98, 205, 208, 213, 215, 216, 241, 242, 251, 280, 311, 318, 332, 354, 407

444 Index. F Fermi potential, 146 FGMOS transistor, 20 23, 57, 83, 84, 98, 205, 208, 213, 215, 216, 241, 242, 251, 280, 311, 318, 332, 354, 407 Index A Accuracy active resistor structures, 46, 323, 328, 329, 341, 344, 360 computational circuits, 171 differential amplifiers, 30, 31 exponential circuits, 285, 291, 292 multifunctional structures,

More information

Notes. (Subject Code: 7EC5)

Notes. (Subject Code: 7EC5) COMPUCOM INSTITUTE OF TECHNOLOGY & MANAGEMENT, JAIPUR (DEPARTMENT OF ELECTRONICS & COMMUNICATION) Notes VLSI DESIGN NOTES (Subject Code: 7EC5) Prepared By: MANVENDRA SINGH Class: B. Tech. IV Year, VII

More information

THRESHOLD VOLTAGE CONTROL SCHEMES

THRESHOLD VOLTAGE CONTROL SCHEMES THRESHOLD VOLTAGE CONTROL SCHEMES IN FINFETS V. Narendar 1, Ramanuj Mishra 2, Sanjeev Rai 3, Nayana R 4 and R. A. Mishra 5 Department of Electronics & Communication Engineering, MNNIT-Allahabad Allahabad-211004,

More information

VLSI Design. Introduction

VLSI Design. Introduction Tassadaq Hussain VLSI Design Introduction Outcome of this course Problem Aims Objectives Outcomes Data Collection Theoretical Model Mathematical Model Validate Development Analysis and Observation Pseudo

More information

Solid State Devices- Part- II. Module- IV

Solid State Devices- Part- II. Module- IV Solid State Devices- Part- II Module- IV MOS Capacitor Two terminal MOS device MOS = Metal- Oxide- Semiconductor MOS capacitor - the heart of the MOSFET The MOS capacitor is used to induce charge at the

More information

2.8 - CMOS TECHNOLOGY

2.8 - CMOS TECHNOLOGY CMOS Technology (6/7/00) Page 1 2.8 - CMOS TECHNOLOGY INTRODUCTION Objective The objective of this presentation is: 1.) Illustrate the fabrication sequence for a typical MOS transistor 2.) Show the physical

More information

Key Questions. ECE 340 Lecture 39 : Introduction to the BJT-II 4/28/14. Class Outline: Fabrication of BJTs BJT Operation

Key Questions. ECE 340 Lecture 39 : Introduction to the BJT-II 4/28/14. Class Outline: Fabrication of BJTs BJT Operation Things you should know when you leave ECE 340 Lecture 39 : Introduction to the BJT-II Fabrication of BJTs Class Outline: Key Questions What elements make up the base current? What do the carrier distributions

More information

MOSFET & IC Basics - GATE Problems (Part - I)

MOSFET & IC Basics - GATE Problems (Part - I) MOSFET & IC Basics - GATE Problems (Part - I) 1. Channel current is reduced on application of a more positive voltage to the GATE of the depletion mode n channel MOSFET. (True/False) [GATE 1994: 1 Mark]

More information

FOR SEMICONDUCTORS 2009 EDITION

FOR SEMICONDUCTORS 2009 EDITION INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS 2009 EDITION PROCESS INTEGRATION, DEVICES, AND STRUCTURES THE ITRS IS DEVISED AND INTENDED FOR TECHNOLOGY ASSESSMENT ONLY AND IS WITHOUT REGARD TO ANY

More information

In this lecture we will begin a new topic namely the Metal-Oxide-Semiconductor Field Effect Transistor.

In this lecture we will begin a new topic namely the Metal-Oxide-Semiconductor Field Effect Transistor. Solid State Devices Dr. S. Karmalkar Department of Electronics and Communication Engineering Indian Institute of Technology, Madras Lecture - 38 MOS Field Effect Transistor In this lecture we will begin

More information

3D SOI elements for System-on-Chip applications

3D SOI elements for System-on-Chip applications Advanced Materials Research Online: 2011-07-04 ISSN: 1662-8985, Vol. 276, pp 137-144 doi:10.4028/www.scientific.net/amr.276.137 2011 Trans Tech Publications, Switzerland 3D SOI elements for System-on-Chip

More information

CMOS Digital Integrated Circuits Lec 2 Fabrication of MOSFETs

CMOS Digital Integrated Circuits Lec 2 Fabrication of MOSFETs CMOS Digital Integrated Circuits Lec 2 Fabrication of MOSFETs 1 CMOS Digital Integrated Circuits 3 rd Edition Categories of Materials Materials can be categorized into three main groups regarding their

More information

Reg. No. : Question Paper Code : B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER Second Semester

Reg. No. : Question Paper Code : B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER Second Semester WK 5 Reg. No. : Question Paper Code : 27184 B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2015. Time : Three hours Second Semester Electronics and Communication Engineering EC 6201 ELECTRONIC DEVICES

More information

APPLICATION TRAINING GUIDE

APPLICATION TRAINING GUIDE APPLICATION TRAINING GUIDE Basic Semiconductor Theory Semiconductor is an appropriate name for the device because it perfectly describes the material from which it's made -- not quite a conductor, and

More information

Towards a Reconfigurable Nanocomputer Platform

Towards a Reconfigurable Nanocomputer Platform Towards a Reconfigurable Nanocomputer Platform Paul Beckett School of Electrical and Computer Engineering RMIT University Melbourne, Australia 1 The Nanoscale Cambrian Explosion Disparity: Widerangeof

More information

UNIT-VI FIELD EFFECT TRANSISTOR. 1. Explain about the Field Effect Transistor and also mention types of FET s.

UNIT-VI FIELD EFFECT TRANSISTOR. 1. Explain about the Field Effect Transistor and also mention types of FET s. UNIT-I FIELD EFFECT TRANSISTOR 1. Explain about the Field Effect Transistor and also mention types of FET s. The Field Effect Transistor, or simply FET however, uses the voltage that is applied to their

More information

EFFECT OF STRUCTURAL AND DOPING PARAMETER VARIATIONS ON NQS DELAY, INTRINSIC GAIN AND NF IN JUNCTIONLESS FETS

EFFECT OF STRUCTURAL AND DOPING PARAMETER VARIATIONS ON NQS DELAY, INTRINSIC GAIN AND NF IN JUNCTIONLESS FETS EFFECT OF STRUCTURAL AND DOPING PARAMETER VARIATIONS ON NQS DELAY, INTRINSIC GAIN AND NF IN JUNCTIONLESS FETS B. Lakshmi 1 and R. Srinivasan 2 1 School of Electronics Engineering, VIT University, Chennai,

More information

64 Channel Flip-Chip Mounted Selectively Oxidized GaAs VCSEL Array

64 Channel Flip-Chip Mounted Selectively Oxidized GaAs VCSEL Array 64 Channel Flip-Chip Mounted Selectively Oxidized GaAs VCSEL Array 69 64 Channel Flip-Chip Mounted Selectively Oxidized GaAs VCSEL Array Roland Jäger and Christian Jung We have designed and fabricated

More information

Prepared by: Dr. Rishi Prakash, Dept of Electronics and Communication Engineering Page 1 of 5

Prepared by: Dr. Rishi Prakash, Dept of Electronics and Communication Engineering Page 1 of 5 Microwave tunnel diode Some anomalous phenomena were observed in diode which do not follows the classical diode equation. This anomalous phenomena was explained by quantum tunnelling theory. The tunnelling

More information

SUPPLEMENTARY INFORMATION

SUPPLEMENTARY INFORMATION SUPPLEMENTARY INFORMATION doi:10.1038/nature11293 1. Formation of (111)B polar surface on Si(111) for selective-area growth of InGaAs nanowires on Si. Conventional III-V nanowires (NWs) tend to grow in

More information

EECS130 Integrated Circuit Devices

EECS130 Integrated Circuit Devices EECS130 Integrated Circuit Devices Professor Ali Javey 11/01/2007 MOSFETs Lecture 5 Announcements HW7 set is due now HW8 is assigned, but will not be collected/graded. MOSFET Technology Scaling Technology

More information