Typical Performance 1. 2 OIP3 _ measured with two tones at an output of 11 dbm per tone separated by 1 MHz. Absolute Maximum Ratings

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1 Device Features OIP3 = MHz Gain = MHz Output P1 d = MHz 50 Ω Cascadable Patented Over Voltage Protection Circuit Lead-free/RoHS-compliant SOT-89 SMT package Product Description erex s T05VG2 is a high performance and a high dynamic range amplifier in a low cost surface mount package(sot-89) with a RoHS -compliant, that incorporates reliable heterojunction-bipolar-transistor (HT) devices fabricated with InGaP GaAs technology. This device is designed for use where high linearity is required and features high OIP3 and P1 with low consumption current (85mA) and requires a few external matching components such as a DC blocking capacitors on the In/Output pin, a bypass capacitor and a RF choke for the out port. All devices are 100% RF/DC tested. Applications ase station Infrastructure/RFID Commercial/Industrial/Military wireless system Application Circuits RF In DC lock RF Choke T05VG2 DC lock ypass Vcc RF Out Typical Performance 1 Parameter Frequency Unit MHz Gain d S d S d OIP dm P1d dm Noise Figure d 1 Device performance _ measured on a erex evaluation board at 25 C, 50 Ω system. 2 OIP3 _ measured with two tones at an output of 11 dm per tone separated by 1 MHz. Absolute Maximum Ratings Min. Typical Max. Unit andwidth MHz I (Vc = 5V) ma V C 5.0 V R TH 50 C/W Parameter Rating Unit Operating Case Temperature -40 to +85 C Storage Temperature -55 to +155 C Junction Temperature +220 C Operating Voltage Supply Current Input RF Power V ma dm *Operation of this device above any of these parameters may result in permanent damage. *external matching circuit: refer to the page 5 to 11. 1

2 V-I Characteristics erex SOT89 Evaluation oard erex Evaluation oard *Dielectric constant _ 4.2 *RF pattern width 52mil *31mil thick FR4 PC Typical Device Data S-parameters (Vc=5V, Ic=90mA, T=25 C) 2

3 S-Parameter (Vdevice = 5.0V, Icc = 88mA, T = 25 C, calibrated to device leads) Freq S11 S11 S21 S21 S12 S12 S22 S22 [MHz] [Mag] [Ang] [Mag] [Ang] [Mag] [Ang] [Mag] [Ang] WCDMA 6FA dc 3

4 WCDMA 6FA dc ACLR 4

5 RFin C4 C6 Application Circuit: 1900 MHz Schematic Diagram OM Tolerance T05VG2 L1 L2 C7 C1 C2 C5 +5V C3 RFout Note: C1 100pF ± 5% C2 1000pF ± 5% C3 10uF ± 20% C4 56pF ± 5% C5 56pF ± 5% C6 2.7pF ± 5% C7 1.8pF ± 5% L1 39nH ±5% L2 1.5nH ±5% 10uF 1. PC: 31mil thick FR pf 100pF 2. Distance between the center of the shunt cap(c6) and the input pin of T05VG2 _ 0.8mm. 56pF 2.7pF T05VG2 T013 39nH 1.5nH 56pF 1.8pF 3. Distance between the center of the series inductor(l2) and the output pin of T05VG2 _ 3.5mm. 4. Distance between the center of the shunt cap(c7) and the output pin of T05VG2 _ 9.0mm. Typical Performance 5

6 6

7 RFin C4 Application Circuit: 2100 MHz Schematic Diagram OM Tolerance C6 T05VG2 L1 L2 C7 C1 C2 C5 +5V C3 RFout Note: C1 100pF ± 5% C2 1000pF ± 5% C3 10uF ± 20% C4 56pF ± 5% C5 56pF ± 5% C6 2.2pF ± 5% C7 1.5pF ± 5% L1 47nH ±5% L2 1nH ±5% 10uF 1. PC: 31mil thick FR pf 100pF 2. Distance between the center of the shunt cap(c6) and the input pin of T05VG2 _ 0.7mm. 56pF 2.2pF T05VG2 T013 47nH 1nH 56pF 1.5pF 3. Distance between the center of the series inductor (L2) and the output pin of T05VG2 _ 3.5mm. 4. Distance between the center of the shunt cap(c7) and the output pin of T05VG2 _ 9.5mm. Typical Performance 7

8 8

9 RFin C4 L2 C6 Application Circuit: 2450MHz Schematic Diagram OM Tolerance T05VG2 L1 L3 C7 C1 C2 C5 +5V C3 RFout Note: 1. PC: 31mil thick FR4. C1 100pF ± 5% C2 1000pF ± 5% C3 10uF ± 20% C4 100pF ± 5% C5 1pF ± 5% C6 1.5pF ± 5% C7 0.5pF ± 5% L1 39nH ±5% L2 2.7nH ±5% L3 1nH ±5% 100pF 2.7nH 1.5pF T05VG2 T013 39nH 1nH 10uF 1000 pf 100pF 1pF 0.5pF 2. Distance between the center of the series inductor (L2) and the input pin of T05VG2 _ 2.5mm. 3. Distance between the center of the shunt cap(c6) and the input pin of T05VG2 _ 0.5mm. 4. Distance between the center of the series inductor (L3) and the output pin of T05VG2 _ 3.5mm. 5. Distance between the center of the shunt cap(c7) and the output pin of T05VG2 _ 5.5mm. Typical Performance 9

10 10

11 Application Circuit: 3500MHz Schematic Diagram OM Tolerance RFin C4 C7 C6 T05VG2 L1 C8 C1 C2 C5 +5V C3 RFout C1 100pF ± 5% C2 1000pF ± 5% C3 10uF ± 20% C4 22pF ± 5% C5 22pF ± 5% C6 0.5pF ± 5% C7 0.75pF ±5% C8 0.5pF ±5% L1 33nH ±5% Note: 10uF 1000 pf 100pF 1. PC: 31mil thick FR4. 2. Distance between the center of the series cap(c6) and the input pin of T05VG2 _ 2.5mm. 22pF 0.75pF 0.5pF T05VG2 T013 33nH 0.5pF 22pF 3. Distance between the center of the shunt cap(c7) and the input pin of T05VG2 _ 7.1mm. 4. Distance between the center of the shunt cap(c8) and the output pin of T05VG2 _ 7.7mm. Typical Performance 11

12 12

13 Package Outline Dimension Suggested PC Land Pattern and PAD Layout PC Land Pattern PC Mounting Ø Note : All dimension are in millimeters PC lay out _ on erex website 13

14 Package Marking Tape & Reel SOT89 Packaging information: Tape Width (mm): 12 Reel Size (inches): 7 YY = Year, WW = Working Week, XX = Wafer No. Device Cavity Pitch (mm): 8 Devices Per Reel: 1000 Lead plating finish 100% Tin Matte finish (All erex products undergoes a 1 hour, 150 degree C, Anneal bake to eliminate thin whisker growth concerns.) MSL / ESD Rating ESD Rating: Value: Test: Standard: Class 1 Passes <1000V Human ody Model (HM) JEDEC Standard JESD22-A114 MSL Rating: Standard: Level 1 at +265 C convection reflow JEDEC Standard J-STD-020 NATO CAGE code: 2 N 9 6 F 14

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