UV Nanoimprint Stepper Technology: Status and Roadmap. S.V. Sreenivasan Sematech Litho Forum May 14 th, 2008

Transcription

1 UV Nanoimprint Stepper Technology: Status and Roadmap S.V. Sreenivasan Sematech Litho Forum May 14 th, 2008

2 Overview Introduction Stepper technology status: Patterning and CD Control Through Etch Alignment and Overlay Defect Control Throughput Stepper roadmap Summary

3 Step & Flash Imprint Lithography (S-FIL) High resolution fused silica template, coated with release layer Template Step 1: Dispense drops Planarization layer Substrate Imprint fluid dispenser Low viscosity fluid (Si-containing for S-FIL, Organic for S-FIL/R) Step 2: Lower template and fill pattern Step 3: Polymerize imprint fluid with UV exposure Template very low imprint pressure < 1/20 atmosphere at room temp Planarization layer Substrate Same Process Used for Step & Repeat and Whole Substrate Patterning Planarization layer Substrate Step 4: Separate template from substrate Template Planarization layer Substrate Step & Repeat

4 Applications Summary S-FIL is an enabling technology for manufacture of nano-scale features below 50nm Low cost Technology extendable to less than 10nm Opportunity from multiple and diverse markets High brightness LED s, hard disk drives; relaxed overlay requirements; whole substrate patterning Semiconductors; tight overlay requirement; stepper

5 Overview Introduction Stepper technology status: Patterning and CD Control Through Etch Alignment and Overlay Defect Control Throughput Stepper roadmap Summary

6 Imprint Resolution: 32nm Half Pitch VSB PG

7 CD Budget for Imprint Lithography (Proposed) CDU T = {(CDU M ) 2 + (CDU I ) 2 + (CDU E ) 2 } ½ Table: CDU Budget Elements (in nm 3σ) HP CDU T CDU M CDU E CDU I 32nm 3.2nm 2.5nm 1.75nm 1nm 22nm 2.2nm 1.75nm 1nm 0.9nm To achieve the CDU E of < 1nm, 3σ (for 22nm half-pitch, see Table 1), the total residual layer variation should be <5nm, 3σ

8 Drop Dispense Approach Can handle pattern density variations Compensate for systematic process variations Can achieve tight control over residual layer variation More drops for denser pattern areas Feature Height of 75nm for 30nm features RLT = 10nm mean

9 Transfer and Residual Layer Thickness Measurements 1 nm adhesion layer thickness measurement Ultra-thin adhesion layer Residual layer mean <20nm and thickness variation to < 6 nm TIR MII Metrosol Mean: 1.09nm Sigma: 0.05nm Max: 1.22nm Min: 0.94nm x, y (mm) Residual Layer Thickness (nm) Average Std Dev Min Max Range Residual layer thickness fully populated wafer Position # nm HP

10 Etch: Critical Dimension and Line Edge Roughness At imprint CD = 36.2 ± 1.1 nm LER = 2.9 nm Descum CD = 34.6 ± 1.4 nm LER = 2.5 nm Hardmask etch CD = 34.7 ± 1.0 nm LER = 2.8 nm O2 strip CD = 36.7 ± 1.4 nm LER = 2.9 nm Critical dimension is maintained at ~36 nm at the end of the process. Line edge roughness (LER) is maintained at ~2.9 nm.

11 Overview Introduction Stepper technology status: Patterning and CD Control Through Etch Alignment and Overlay Defect Control Throughput Stepper roadmap Summary

12 Alignment and Overlay Alignment is achieved using matched Moiré fringe patterns on both template and substrate based on a technique originally developed for X-ray proximity printing at MIT Imprint fluid lubricates movement and dampens vibration Align mechanics Template Substrate <100nm Magnification mechanics Substrate Template d(phase) Target Acquisition Resolution Test dx(nm)-template

13 Field-To-Field Alignment System One of Eight Interferometric Moiré Alignment Technique (i-mat) Cameras Imprint Mask Alignment Marks Imprint area Wafer Technology originally developed for proximity x-ray (Moon, Smith et al., JVST, 1998)

14 Representative Alignment Data (From Four Corners) Four corner alignment data over the wafer represents basic machine precision in X, Y, Theta, MagX, MagY and Ortho directions: 5nm 3sigma in X 6nm 3sigma in Y

15 Multi-Machine Mix-and-Match Overlay Results Mix and match overlay performance with two different 193nm scanners has been demonstrated Overlay metrology performed using an industry standard KT overlay tool. 32 fields per wafer, 81 positions per field Achieved sub 20nm, 3σ results Challenges to move to sub- 10nm overlay appear to be engineering related.

16 Matched Machine Overlay Results ~15nm (μ+3σ) Matched machine overlay (MMO) (μ+3σ) of 11nm in X and 15nm in Y ~100 overlay metrology marks per field

17 Imprint to Photo Overlay Budget Components J Other Process Distortions (CMP, Film Depositions, Etc.) G Template/Mask Pattern Generation Distortion E Thermal In-Plane Template Distortions A X- Y- Alignment Noise (Machine Noise) D B Full Mix-and-Match Process Overlay (FM&MPO) Mix-and-Match, Multi- Template/Mask Overlay (M&MMTO) Single Machine Overlay (SMO) Field Alignment Accuracy MagX, MagY, Ortho Noise (Mag Actuator Noise) H Distortion Due to Tool to Tool Template/Mask Chuck Shape Difference F Thermal In-Plane Wafer Distortions C i-mat Moiré Alignment Metrology Noise I Distortion Due to Imprio to Photo Tool Wafer Chuck Shape Difference Temperature Control Machine Precision K Photo Tool Lens & Scan Speed Matching Distortion

18 Overview Introduction Stepper technology status: Patterning and CD Control Alignment and Overlay Defect Control Throughput Stepper roadmap Summary

19 S-FIL Defectivity 1. Template Fab Defects Template 4. Bubbles 2. Material Contaminants 3. Front Side Particles Planarization layer Substrate 5. Back Side Particles Template Planarization layer Substrate Planarization layer Substrate 6. Improper Release Template Planarization layer Substrate 7. Post-Imprint Fall-On Particles

20 Defect Inspection of nm HP Patterns Imprint mask processes, inspection technology, and imprint technology are all at the leading edge at 32nm HP Very challenging to quantify imprint-specific defectivity at 32nm HP Early results are very promising 300 mm wafers imprinted with an imprint mask containing nm halfpitch features and 26 x 32 mm field Field: 16 X 13 cell array Cell: containing inspected Line Blocks

21 KT-eS32 Inspection Results Total Defects Captured by KT - es32 False counts removed Imprinted 300 mm wafer 5 fields were inspected with a KT-eS32 35 nm pixel 416,000 Line-Block features were inspected < 0.1% of the Line Blocks were found to have defects Feature Area Open Area Missing Lines Line Break Write Error Line Shift Line Collapse

22 Random Defects Defects captured only once in the five inspected fields < 0.002% Line Blocks had random defects The Feature Area defects are not truly random, these were only captured once The line collapse defect is probably due to post-imprint contamination by fluid. The source of the Line Shift defect is unknown. Line Shift Feature Area Random Defects Captured by KT- es32 Line Collapse Line Shift Defect Missing Lines

23 E-beam Die-to-Database Inspection NanoGeometry Research Inc. Acc. Voltage: V Probe current: 500pA to 10nA Resolution: 3 nm to 20 nm Sampling rate: 200 M pixel/sec Inspection Rate: 1mm 2 /115sec (at 12 nm) Wafer size: 300 mm and 200 mm Actual Inspection Sequence 1. Capture Feature Image Example 2. Outline Feature with a Contour 3. Overlay the GDS 4. Measure the Contour vs. GDS Bias 5. Compare Bias to Process Window Verifiers Corner Rounding

24 Die-database Mask Inspection GDS Layout SEM with GDS Layout 40 nm Metal 1

25 Inspection Results: Programmed Defects SEM GDS Overlay

26 Overview Introduction Stepper technology status: Patterning and CD Control Alignment and Overlay Defect Control Throughput Stepper roadmap Summary

27 Throughput Risk: Fast Fluid Fill For HVM, need fluid fill of < 1 second/field for > fields per wafer Keys to Fast Fluid Fill Low viscosity imprint resist (monomer) Small drop volume: Pico liter sized drops Template contact geometry control GDS based volume targeting Inclined template geometry creates fluid wave-front to avoid air trapping between liquid drops 6pl drop Contact geometry control Fluid fill direction

28 GDS Based Drop Targeting and Fluid Front Control Medium Pattern Density Region Low Pattern Density Region High Pattern Density Region

29 GDS Based Volume and Fluid Front Control No fluid front control Fluid front control Drop Pattern Grid GDS-II Based Grid GDS-II Based Mask Design 1: High Pattern Density Variance Mask Design 2: Low Pattern Density Variance > GDS based volume compensation and fluid front control are both needed This data collected for 6 pl minimum drop volume and for 25nm mean residual layer

30 Throughput Summary & Next Steps Need to improve filling time be a factor of 4X to achieve targeted CoO Several promising options have been identified and are being implemented For e.g. Smaller drops of liquid Better understanding of drop placement optimization Improved control over fluid front geometry Lowered viscosity Cost structure of technology allows the clustering of multiple imprint modules

31 Overview Introduction Stepper technology status: Patterning and CD Control Alignment and Overlay Defect Control Throughput Stepper roadmap Summary

32 Imprint Litho Technology Roadmap for Semiconductors (ILTRS) Imprio 300 4wph / 35nm O/L Imprio 3XX 4wph / 20nm O/L HVM 20wph / 15nm O/L HVM Cluster 80wph / 7nm O/L 32, 28nm Development & Integration 22nm Process Development 32, 28, 22nm Process Development & Integration 32, 28, 22nm Manufacturing 16nm Process Development 28, 22, 16nm Mfg

33 Cost of Ownership Advanced Lithography Alternatives Immersion and EUV Source: ASML Investor Day 2007 Imprint Source: Molecular Imprints * * industry consensus input

34 Technology Status for CMOS Imprint for sub 32nm HP Current 2008 Planned 2010 Imprint Mask VSB Resolution <32nm <28nm <22nm Image Placement 4nm 2nm 2nm Inspection 20nm but slow 7nm 5nm Repair 30nm 7nm 5nm Overlay 193 nm mix & match 20nm 10nm 7nm Throughput Prototyping 5wph 5wph 5wph Manufacturing 10wph feasibility 20wph 80wph Projected 2012 Defects Imprint Mask <0.1cm-2 <0.01cm-2 <0.01cm-2 Imprint <1cm-2 <0.1cm-2 <0.01cm-2 Imprint Mask use before clean 10 3 imprints 10 5 imprints 10 6 imprints

35 Overview Introduction Stepper technology status: Patterning and CD Control Alignment and Overlay Defect Control Throughput Stepper roadmap Summary

36 Stepper Technology Summary Patterning and CD Control Through Etch Sub-20nm half-pitch (GB) 32nm half-pitch (VSB) LWR of ~2.5nm 3σ demonstrated Sub-20nm thin uniform residual layer for etch Tight CD control through etch demonstrated for 42nm and 32nm patterning Alignment and Overlay Alignment of ~ 5nm (μ+3σ) MMO of <15nm (μ+3σ), feasibility of 11nm (μ+3σ) demonstrated M&M of ~20nm (μ+3σ) Defect Control Achieving <1 def/cm-2 at 70nm pixel size Low imprint-specific defectivity at 32nm half-pitch Throughput 4X improvement needed in fluid filling to meet 20 wph CoO target is <50% of 193i DPT

37 37 Molecular Imprints HDD Roadmap Molecular Imprints HDD Platforms PLATFORM Imprio 1100 R&D 60dph single-sided sided system (with automation) Imprio HD2200 Pilot 180dph double-sided system, (with automation) HVM Production dph >350dph double-sided system (2-4 4 module cluster tool with automation)

38 Imprio HD2200 Pre-Clean Room Assembly Line

39 Conclusions Sub-32nm lithography choices are quickly narrowing Imprint emerging as a leading solution that is: Cost effective Extendible Leveraging optical infrastructure: masks, mix-and-match, integration Hard disk patterned media will provide extensive high volume manufacturing experience in the near future MII stepper roadmap includes high throughput HVM tools starting in late 2009

40 Acknowledgements