Innovative Embedded Technologies to Enable Thinner IoT/Wearable/Mobile Devices

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Douglas Kennedy
5 years ago
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1 Innovative Embedded Technologies to Enable Thinner IoT/Wearable/Mobile Devices Jensen Tsai Deputy Director, SPIL

2 Building a Smarter World Wearable Internet of Things Building a Smarter World Mobile Devices Automotive 2

3 Embedded Technologies Embedded Die SBT Antenna in SiP Embedded Trace SBT Die on CAP FC-MISBGA Two Side PKG Molded WLCSP Partition EMI Coating Fan-Out WLP 3

4 Embedded Technologies Embedded Die SBT Antenna in SiP Embedded Trace SBT Die on CAP FC-MISBGA Two Side PKG Molded WLCSP Partition EMI Coating Fan-Out WLP 4

5 Module Miniaturization MCU + BLE COB Size : 18x12mm MCU + WiFi COB Size : 22x19mm 1 Antenna in SiP 2 3 Die on CAP EMI Coating 6.5*6.5mm 4 Two Side PKG 10*10mm BLE Locker BLE Toy irhytm WiFi Plug WiFi Air Conditioner WiFi Bulb 5 Hearing Aid Swimming Band Hand Band WiFi Speaker WiFi Sensor Hub

2013/Dec Application : BLE (2.4GHz), HVM > 10 M Units, Yield > 99.

6 1 Antenna in SiP Modules SMT Sub. Baking SMT (Comp & Ant) De-flux Cleaning D/B & W/B D/B (DB1 & DB2) W/B (WB1 & WB2) MD Status : MP from 2013/Dec Application : BLE (2.4GHz), HVM > 10 M Units, Yield > 99.5% MK, FS & SF Laser Marking Singulation FT QUAL Test Result Test Item TCT Hast uhast TST HTSL Cycles Pre-Con 300/ Result Pass Pass Pass Pass Pass Pass Status : Mass Production

shielding wall One-piece metal frame assembly, having 2 function devices (antenna & EMI partition

7 1 Antenna in Package with EMI Shield One-Piece metal frame is assembled by SMT Sputter coating Arrange support pin out of package to optimize design area in package Singulation EMI partition shielding wall One-piece metal frame assembly, having 2 function devices (antenna & EMI partition shielding wall ) after sinulation. Antenna routing on substrate Antenna Frame Status : Qualification 7

Status : Mass Production Cycles Pre-Con 300/500 1000 1500 2000

8 2 Stack Die on Passives SMT (Passives Attach) D/B & W/B MD Singulation QUAL Test Result Test Item TCT Hast uhast TST HTSL Status : Mass Production Cycles Pre-Con 300/ Result Pass Pass Pass Pass Pass Pass 8

3 EMI Coating Process Flow Prior Assembly Singulation F/C RLC X tal Pre-baking Baking F/C RLC X tal Molding Sputter Coating Sputtering machine : LINCO SERIES Coating Material : SUS+Cu+ SUS Min Top Cu

9 3 EMI Coating Process Flow Prior Assembly Singulation F/C RLC X tal Pre-baking Baking F/C RLC X tal Molding Sputter Coating Sputtering machine : LINCO SERIES Coating Material : SUS+Cu+ SUS Min Top Cu Thickness : 2um min. Top SUS Thickness : 0.1um min. PMC Laser Marking VM F/C RLC X tal Saw QUAL Test Result Test Item TCT uhast HTSL Pre-Con Cycles 500x 1000x Result Pass Pass Pass Pass Pass Pass F/C RLC X tal Status : Mass Production 9

Qualification Application : (1) Multi-Band RF

EMI sensitivity SiP Modules (AP + PMIC + 802.

.) Advantage: (1) Light & Compact Module Size

10 3 Partition EMI Coating EMI Metal Frame Shielding EMI Coating w/ Partition Status : Qualification Application : (1) Multi-Band RF SiP Modules (CDMA / LTE / Dual Band WiFi) (2) EMI sensitivity SiP Modules (AP + PMIC ac,..) Advantage: (1) Light & Compact Module Size (2) Flexible Shielding Design (3) Miniaturization, higher performance, lower cost and higher integration 10

5mm, function : RGB Converter Passive : 115 ea RGB Converter Top Side Bottom Side LCD Driver (DC/DC Booster) Pre-con TCT TCT MSL3 /260

11 4 Double Side Package for PMIC Module PKG Information: - PKG size: 16*14mm - Top side WLCSP : 5.97mm*4.82mm, function : PMIC QFN : 3 mm *3 mm, function : LCD Driver Passive : 48 ea - Bottom side WLCSP : 4.5 mm *4.5mm, function : RGB Converter Passive : 115 ea RGB Converter Top Side Bottom Side LCD Driver (DC/DC Booster) Pre-con TCT TCT MSL3 /260 (-55C~115 C) (-55C~115 C) HAST (130 C, 85%RH) HTST (150 ) (w/o precon) HTST (150 ) (w/o precon) Reflow 3X 500X 1000X 96hrs 500hrs 1000hrs Pass Pass Pass Pass Pass Pass Status : Qualification 11

12 Embedded Technologies Embedded Die SBT Antenna in SiP Embedded Trace SBT Die on CAP FC-MISBGA Two Side PKG Molded WLCSP Partition EMI Coating Fan-Out WLP 12

13 TDK PMIC modules with EDS PMIC Modules for smart phone Key process : EDS (Embedded Die Substrate) 13 13

55MM Substrate vendor: IBIDEN / Kinsus /TDK Lid adhesion By solder paste No any abnormal be found by X-Ray IPQC & RT Status All acceptable! STATION IN Q'TY DEF.

14 EDS (Embedded Die Substrate, for PMIC) Base Information: Package size / IO: 5.8*5.8/145 Max package height: 1.4mm Capacitor: 0603_2P/X5R/10UF/6.3V/+/-20%_T=0.55MM 0603_2P/X5R/4.7UF/10V/+/-10%_T=0.55MM 0402_2P/X5R/1UF/16V/+/-10%_T=0.55MM Substrate vendor: IBIDEN / Kinsus /TDK Lid adhesion By solder paste No any abnormal be found by X-Ray IPQC & RT Status All acceptable! STATION IN Q'TY DEF. Q'TY OUT Q'TY YIELD ( PCS ) ( PCS ) ( PCS ) ( % ) SMT % LASER MARKING % SINGULATION % OS % FINAL VISUAL % Major Concern : Mass Production Yield Loss No delam be found by X-section 14

15 Embedded Technologies Embedded Die SBT Antenna in SiP Embedded Trace SBT Die on CAP FC-MISBGA Two Side PKG Molded WLCSP Partition EMI Coating Fan-Out WLP 15

16 4000 IO Count Flip Chip Package Segment (Sweet Spot) FO-PoP HBW-PoP 3000 FO-PoP / HBW-PoP / PoP (High I/O density & Low PKG profile) Large FCBGA 2000 PoP Si Interposer / FO-MCM + FCBGA Large FCBGA (High I/O density) FCBGA Si Interposer FO-MCM + FCBGA 1000 IC IC Si Interposer Substrate FCCSP FO-SD FC-ETS FC-MISBGA PKG Size (mm) 16 3x3 7x7 11x11 19x19 27x27 35x35 15x15 23x23 31x31 40x40 45x45 50x50 55x55 60x60 65x65

17 Embedded Trace Substrate (ETS) L/S < 20/20 um CORE Normal Sub. 4 PP Embedded Sub. Source: 17

2L FC-ETS L/S=15/15 um Package Information: PKG type: FC-ETS (MUF) PKG size:

15 mm Bump pitch: 110 um Bump Height: 58 um (Cu 33/SiAg 25) Mold cavity : 0.

25mm IO count: 488 SAT Void Free (MUF) X-Section X-ray top view Reliability Test:

18 2L FC-ETS L/S=15/15 um Package Information: PKG type: FC-ETS (MUF) PKG size: 12x12x 0.75 mm Die size: 6.6x6.2x0.15 mm Bump pitch: 110 um Bump Height: 58 um (Cu 33/SiAg 25) Mold cavity : 0.45 mm Substrate thickness: mm w/ 2L ETS Ball pitch/ diameter: 0.4mm /0.25mm IO count: 488 SAT Void Free (MUF) X-Section X-ray top view Reliability Test: O/S Yield >99% Pre-con MSL2aa/3 /260 HTST (150 ) TCT (-65~150 ) HAST Reflow 3X 1000hrs 1000X 192hrs PASS PASS PASS PASS Status : Mass Production 18

3L FC-ETS with fine pitch L/S=8/10 um Pkg

188 mm w/ 3L ETS Ball pitch/ diameter: 0.4mm /0.

>99.5% Pre-con MSL2aa/3 /260 HTST (150 ) TCT

PASS PASS PASS PASS Status : Qualification 65um

19 3L FC-ETS with fine pitch L/S=8/10 um Pkg Information: PKG type: FC-ETS (CUF & MUF) PKG size: 14x14x 0.9 mm Die size: 11x11x0.1 mm Bump pitch: 65um/80 um Bump Height: 58 um (Cu 35/Ni 3/SiAg 25) Mold cavity : 0.45 mm Substrate thickness: mm w/ 3L ETS Ball pitch/ diameter: 0.4mm /0.25mm IO count: 976 Reliability Test: O/S Yield >99.5% Pre-con MSL2aa/3 /260 HTST (150 ) TCT (-65~150 ) HAST Reflow 3X 1000hrs 1000X 192hrs PASS PASS PASS PASS Status : Qualification 65um pitch / 1 escape X-ray top view X-Section Void Free (CUF) 80um pitch / 2 escape SAT Void Free (MUF) 19

20 Embedded Technologies Embedded Die SBT Antenna in SiP Embedded Trace SBT Die on CAP FC-MISBGA Two Side PKG Molded WLCSP Partition EMI Coating Fan-Out WLP 20

MIS Substrate (Lower cost, Small form factor)

plating rather than laser drilling Embedded trace,

Window Image Pre-treatment Cu plating transfer Dry

and (2nd (For (Cu (1st OSP top ball plating) Cu

21 MIS Substrate (Lower cost, Small form factor) Substrate via is formed by photolithography and Cu plating rather than laser drilling Embedded trace, L/S >= 10/10um NPL design Topside View Bottom View Window Image Pre-treatment Cu plating transfer Dry Metal Film Molding Etching/Detach Carrier Stripping and (2nd (For (Cu (1st OSP top ball plating) Cu coating layer) trace) pad) Mold Compound (Cu trace + Pre-Mold) 21

12 mm Trace Line/Space: 20/20um Ball pitch: 0.4 mm Ball Size: 0.

22 1L FC-MISBGA Readiness L/S=20/20 um Base Information: PKG type: FC-MISBGA (MUF) PKG size: 12*12 mm 2 Die size: 6.2*6.8 mm 2 Bump pitch: 55/110um Bump Height: 58 um (Cu pillar) Wafer thickness : 150 um Mold cavity : 0.45mm Substrate thickness: 0.12 mm Trace Line/Space: 20/20um Ball pitch: 0.4 mm Ball Size: 0.25 mm IO count: 400 Reliability Test: X-Section X-ray top view SAT Pre-con MSL2a /260 TCT (-65~150 ) HAST HTSL Post reflow 3X 500X 1000X 192hrs 1000hrs PASS PASS PASS PASS PASS Status : Mass Production Confidenti

2L FC-MISBGA Readiness L/S=15/15 um Base Information: Package size: 12*12 mm Max. Package thickness: 0.

45mm Die size: 7*5 mm Die thickness : 8mil (200um) Bump pitch : 150um with 2 escaping traces Trace Line/Space:

4mm In-line Process Quality: Sample Process Checking Item Criteria Result Size Non-wetting Not allow 100% Pass Die

23 2L FC-MISBGA Readiness L/S=15/15 um Base Information: Package size: 12*12 mm Max. Package thickness: 0.9mm Mold thickness: 0.45mm Die size: 7*5 mm Die thickness : 8mil (200um) Bump pitch : 150um with 2 escaping traces Trace Line/Space: 15/15um Ball stand off height: 0.18mm Substrate thickness: 0.11mm Ball size /ball pitch : 0.25 / 0.4mm In-line Process Quality: Sample Process Checking Item Criteria Result Size Non-wetting Not allow 100% Pass Die Bond Accuracy ±15um 100% Pass <250um Incomplete fill 100% Pass Molding <1% die area De-lamination Not allow 100% Pass X-ray top view X-ray top view X-Section Shadow Moire SPEC: <100um, Actual: <60um Crying (+) Smiling (-) Status : Mass Production 23

24 Embedded Technologies Embedded Die SBT Antenna in SiP Embedded Trace SBT Die on CAP FC-MISBGA Two Side PKG Molded WLCSP Partition EMI Coating Fan-Out WLP 24

5 Sides mwlcsp vs WLCSP mwlcsp Construction Mold Compound 500um 330um mwlcsp WLCSP 6 Sides mwlcsp vs WLCSP Backside lamination Backside lamination Mold Compound mwlcsp with Backside

25 5 Sides mwlcsp vs WLCSP mwlcsp Construction Mold Compound 500um 330um mwlcsp WLCSP 6 Sides mwlcsp vs WLCSP Backside lamination Backside lamination Mold Compound mwlcsp with Backside lamination Mold Compound on Sidewall and Ball Side WLCSP with Backside lamination C: 10um D: 70um Mold Compound Solder Ball Silicon C RDL Trace Molding PSV2 PSV1 Solder Ball SiN UBM D 25

mwlcsp Purpose BSL (optional) Side view Top view

(same wafer sort as WLCSP) Process Flow UBM & BP

26 mwlcsp Purpose BSL (optional) Side view Top view Sidewall crack check by FIB Die Mold Compound Solder Ball Advantage : Enhance board level TC Decrease ELK stress Zero side wall crack dppm (same wafer sort as WLCSP) Process Flow UBM & BP LG + ½ Die Saw Molding 100% Wafer Probing Grinding SG &TR 26

27 mwlcsp Brief Process Flow Molding Wafer Scribe Line (80um) BSL Die (1 st Saw) Die Die (2 nd Saw) Die 45 EMC Sidewall (1 st Saw) Grinding EMC Sidewall 27 Wafer form, top side molding After singulation, EMC left at side wall

28 Key Challenges of mwlcsp Topside Mold Thickness Warpage post Grinding Die Mold Solder Ball Solder Ball Clean 4 Singulation Blade/Laser Saw Before Clean After Clean Die Laser Die tape 28

29 SMT mwlcsp Confirmation SMT SMT Confirmation:=> Good wetting Ball Package information: - Die size: 7x7mm - Die thickness: 200um - Ball Pitch/Size/Height: 0.4mm / 250um /190um After reflow process (Sample size, 120pcs) Left side Right side Center Center BLR SMT X-section result: SMT has Good wetting (no bridge & no non-wetting) 29 Status : Small Volume Mass Production

30 Embedded Technologies Embedded Die SBT Antenna in SiP Embedded Trace SBT Die on CAP FC-MISBGA Two Side PKG Molded WLCSP Partition EMI Coating Fan-Out WLP 30

Fan-Out Solutions Die #1 Die #2 & Its Potential Applications I/O Density Ultra High RDL L/S(um) 0.

High performance computing 2. Networking 3.

High End AP/BB High 10 FO-MCM 2L MIP (FCCSP) Memory Application: (DRAM, mlpdram.

31 Fan-Out Solutions Die #1 Die #2 & Its Potential Applications I/O Density Ultra High RDL L/S(um) FO-MCM Heat Spreader PKG Solution 2.5D (COWOS) Application High-End Application: 1. High performance computing 2. Networking 3. Data servers 2 FO-PoP Heat Spreader HBW-PoP Mobile Application: 1. Smart Phone & Tablet 2. High End AP/BB High 10 FO-MCM 2L MIP (FCCSP) Memory Application: (DRAM, mlpdram...) Low >10 >15 FO-SD 1L FC-MIS Low Pin Count Application: (PMIC/RF...) Middle variability FO-SIP SIP Module IoT/Wearable Application: 1. Connectivity 2. PMIC Module Various FO technologies to fulfill potential product applications

4 mm 200 PSV1 RDL PSV2 Die 360um MC DIE SOLDER BALL POD: 0.

32 12 FO-SD (Single Die) 1 RDL Layer L/S=10/10 um Basic Information Chip Dimension 5.64 x 4.1mm Package Dimension 7.4 x 5.8mm Die/Mold THK (um) 360/405 (POD: 0.65mm) Application PMIC RDL Ball Size Ball Pitch I/O Count Layer 1L L/S 10/ mm 0.4 mm 200 PSV1 RDL PSV2 Die 360um MC DIE SOLDER BALL POD: 0.65mm 360 um Compound 405um 405 um 650 um Reliability Result: TEST LEVEL PACAKGE Level TEST ITEM SAMPLE SIZE RESULT PRECON 90pcs PASS HTSL (1000 Hrs.) 45pcs PASS uhast (196 Hrs.) 45pcs PASS TCB 1000 CYCLE 45pcs PASS Status : Qualification 32

33 12 FO-SD (Single Die) 1 RDL Layer L/S=10/10 um Drop Test (1500G, 0.5 ms, 30 drops) SAC_Q(Cyclomax): Sn4Ag0.5Cu0.05Ni3Bi0.007Ge TCT (-40 ~125, 500 cycles) SAC_Q 33 TEST LEVEL Board Level TEST ITEM SAMPLE SIZE Results First Failure Drop Test 30 units PASS 157x TCT > units PASS 703x

FO-MCM(Multi-Chip Module) for AP/DDR L/S=2/2 um 5 Basic

62mm w/ BGA ball) Two top die 11x8mm,11x4.

MUF 2/2 RDL1 5/5 RDL2 Via 10/10 RDL3 No delam.

Confidential Condition Criteria S/S Precon Level 3 / 260

34 FO-MCM(Multi-Chip Module) for AP/DDR L/S=2/2 um 5 Basic Information: 15x14mm package ( THK 0.62mm w/ BGA ball) Two top die 11x8mm,11x4.5mm I/O: 1188 Application: Tablet BB Top Die u-bump MUF MUF 2/2 RDL1 5/5 RDL2 Via 10/10 RDL3 No delam. issue & Pass RA test Status : Engineering Confidential Condition Criteria S/S Precon Level 3 / /40 PASS TCB -55 C ~ 125 C, 1000X 25/25 PASS HTS 150 C, 1000Hrs 10/10 PASS uhast 130 C / 85%, 96Hrs 15/15 PASS

35 FO_SiP Concept z-height 0.8mm Multi Chips Module w/ EMI Shielding 800um DSC (0201 & 01005) > 50pcs CSP die Sidewall EMI EMI MUF UBM RDL1 RDL2 RDL3 PSV1 PSV2 PSV3 PSV MUF BP 35 No delam. issue & Pass RA test Status : Engineering

36 Summary Embedded Die SBT Antenna in SiP Embedded Trace SBT Die on CAP Various embedded Building technologies a Smarter World fulfilling product applications!! FC-MISBGA Two Side PKG Molded WLCSP Partition EMI Coating Fan-Out WLP 36

37 Solution Providing Innovative Leader Contact Information:

Challenges of Ultra-thin LGA Package for Fingerprint Sensors

Challenges of Ultra-thin LGA Package for Fingerprint Sensors Jensen Tsai Deputy Director, SPIL Outline Background Package Features & Challenges Challenges & Solutions Mold Clearance Low Wire Loop Height