CD40174BMS. CMOS Hex D -Type Flip-Flop. Features. Pinout. Applications. Functional Diagram. Description. December 1992

Transcription

1 SEMICONDUCTOR CD17BMS December 199 CMOS Hex D -Type Flip-Flop Features Pinout High Voltage Type (V Rating) 5V, and 15V Parametric Ratings CD17BMS TOP VIEW Standardized, Symmetrical Output Characteristics 1% Tested for Quiescent Current at V Maximum Input Current of 1µA at 1V Over Full Package Temperature Range, 1nA at 1V and +5 o C Noise Margin (Over full Package Temperature Range): - 1V at = 5V - V at = -.5V at = 15V Meets All Requirements of JEDEC Tentative Standard No. 13A, Standard Specifications for Description of B Series CMOS Devices EAR Q1 D1 D Q D3 Q3 VSS Q D D5 Q5 D Q OCK Applications Shift Registers Buffer/Storage Registers Pattern Generators Functional Diagram D1 3 F/F1 Q1 Description D F/F 5 Q CD17BMS consists of six identical D -Type flip-flops having independent DATA inputs. The OCK and EAR inputs are common to all six units. Data is transferred to the Q outputs on the positive going transition of the clock pulse. All six flip-flops are simultaneously reset by a low level on the EAR input. The CD17BMS is supplied in these 1 lead outline packages: Braze Seal DIP HT D3 D 11 D5 13 F/F3 F/F F/F5 7 Q3 1 Q 1 Q5 Frit Seal DIP Ceramic Flatpack H1E HW D5 1 OCK 9 EAR 1 F/F 15 Q VSS = = 1 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures. Copyright Harris Corporation File Number 3359

2 Specifications CD17BMS Absolute Maximum Ratings DC Supply Voltage Range, () V to +V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs V to +.5V DC Input Current, Any One Input ±1mA Operating Temperature Range to +15 o C Package Types D, F, K, H Storage Temperature Range (TSTG) o C to +15 o C Lead Temperature (During Soldering) o C At Distance 1/1 ± 1/3 Inch (1.59mm ±.79mm) from case for 1s Maximum Reliability Information Thermal Resistance θ ja θ jc Ceramic DIP and FRIT Package..... o C/W o C/W Flatpack Package o C/W o C/W Maximum Package Power Dissipation (PD) at +15 o C For TA = to +1 o C (Package Type D, F, K) mW For TA = +1 o C to +15 o C (Package Type D, F, K).....Derate Linearity at 1mW/ o C to mw Device Dissipation per Output Transistor mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature o C TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A PARAMETER SYMBOL CONDITIONS (NOTE 1) SUBGROUPS TEMPERATURE MIN MAX UNITS Supply Current IDD = V, VIN = or GND 1 +5 o C - µa +15 o C - µa = 1V, VIN = or GND 3 - µa Input Leakage Current IIL VIN = or GND = 1 +5 o C -1 - na +15 o C -1 - na = 1V na Input Leakage Current IIH VIN = or GND = 1 +5 o C - 1 na +15 o C - 1 na = 1V 3-1 na Output Voltage VOL15 = 15V, No Load 1,, 3 +5 o C, +15 o C, - 5 mv Output Voltage VOH15 = 15V, No Load (Note 3) 1,, 3 +5 o C, +15 o C, V Output Current (Sink) IOL5 = 5V, VOUT =.V 1 +5 o C.53 - ma Output Current (Sink) IOL1 =, VOUT =.5V 1 +5 o C 1. - ma Output Current (Sink) IOL15 = 15V, VOUT = 1.5V 1 +5 o C ma Output Current (Source) IOH5A = 5V, VOUT =.V 1 +5 o C ma Output Current (Source) IOH5B = 5V, VOUT =.5V 1 +5 o C ma Output Current (Source) IOH1 =, VOUT = 9.5V 1 +5 o C ma Output Current (Source) IOH15 = 15V, VOUT = 13.5V 1 +5 o C ma N Threshold Voltage VNTH =, ISS = -1µA 1 +5 o C V P Threshold Voltage VPTH VSS = V, IDD = 1µA 1 +5 o C.7. V Functional F =.V, VIN = or GND 7 +5 o C VOH > VOL < V = V, VIN = or GND 7 +5 o C / / = 1V, VIN = or GND A +15 o C = 3V, VIN = or GND B Input Voltage Low (Note ) VIL5 = 5V, VOH >.5V, VOL <.5V 1,, 3 +5 o C, +15 o C, V Input Voltage High (Note ) Input Voltage Low (Note ) Input Voltage High (Note ) NOTES: VIH5 VIL15 VIH15 = 5V, VOH >.5V, VOL <.5V = 15V, VOH > 13.5V, VOL < 1.5V = 15V, VOH > 13.5V, VOL < 1.5V 1. All voltages referenced to device GND, 1% testing being implemented.. Go/No Go test with limits applied to inputs. 1,, 3 +5 o C, +15 o C, V 1,, 3 +5 o C, +15 o C, - V 1,, 3 +5 o C, +15 o C, 11 - V 3. For accuracy, voltage is measured differentially to. Limit is.5v max

3 Specifications CD17BMS TABLE. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A PARAMETER SYMBOL CONDITIONS (Note 1, ) SUBGROUPS TEMPERATURE MIN MAX UNITS Propagation Delay TPHL1 = 5V, VIN = or GND 9 +5 o C - 3 ns Clock to Output TPLH1 1, o C, - 5 ns Propagation Delay TPHL = 5V, VIN = or GND 9 +5 o C - ns EAR to Output 1, o C, - 7 ns Transition Time TTHL = 5V, VIN = or GND 9 +5 o C - ns TTLH 1, o C, - 7 ns Maximum Clock Input F = 5V, VIN = or GND 9 +5 o C MHz Frequency 1, o C, 3.5/ MHz NOTES: 1. = 5pF, RL = K, Input TR, TF < ns.. and +15 o C limits guaranteed, 1% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS Supply Current IDD = 5V, VIN = or GND 1,, +5 o C - 1 µa +15 o C - 3 µa =, VIN = or GND 1,, +5 o C - µa +15 o C - µa = 15V, VIN = or GND 1,, +5 o C - µa +15 o C - 1 µa Output Voltage VOL = 5V, No Load 1, +5 o C, +15 o C, Output Voltage VOL =, No Load 1, +5 o C, +15 o C, Output Voltage VOH = 5V, No Load 1, +5 o C, +15 o C, Output Voltage VOH =, No Load 1, +5 o C, +15 o C, - 5 mv - 5 mv.95 - V V Output Current (Sink) IOL5B = 5V, VOUT =.V 1, +15 o C.3 - ma. - ma Output Current (Sink) IOL1 =, VOUT =.5V 1, +15 o C.9 - ma 1. - ma Output Current (Sink) IOL15 = 15V, VOUT = 1.5V 1, +15 o C. - ma. - ma Output Current (Source) IOH5A = 5V, VOUT =.V 1, +15 o C ma - -. ma Output Current (Source) IOH5B = 5V, VOUT =.5V 1, +15 o C ma - -. ma Output Current (Source) IOH1 =, VOUT = 9.5V 1, +15 o C ma ma 7-13

4 Specifications CD17BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS Output Current (Source) IOH15 =15V, VOUT = 13.5V 1, +15 o C - -. ma - -. ma Input Voltage Low VIL =, VOH > 9V, VOL < 1V Input Voltage High VIH =, VOH > 9V, VOL < 1V 1, +5 o C, +15 o C, 1, +5 o C, +15 o C, - 3 V +7 - V Propagation Delay Clock to Output TPHL1 TPLH1 = 1,, 3 +5 o C - 1 ns = 15V 1,, 3 +5 o C - 1 ns Propagation Delay EAR to Output TPHL = 1,, 3 +5 o C - 1 ns = 15V 1,, 3 +5 o C - ns Transition Time TTHL TTLH = 1,, 3 +5 o C - 1 ns = 15V 1,, 3 +5 o C - ns Maximum Clock Input Frequency Minimum Data Setup Time F = 1,, 3 +5 o C - MHz = 15V 1,, 3 +5 o C - MHz TS = 5V 1,, 3 +5 o C - ns = 1,, 3 +5 o C - ns = 15V 1,, 3 +5 o C - 1 ns Minimum Data Hold Time TH = 5V 1,, 3 +5 o C - ns = 1,, 3 +5 o C - ns = 15V 1,, 3 +5 o C - 3 ns Minimum Clock Pulse Width TW = 5V 1,, 3 +5 o C - 13 ns = 1,, 3 +5 o C - ns Maximum Clock Rise and Fall Time TR TF = 15V 1,, 3 +5 o C - ns = 5V 1,, 3, +5 o C 15 - µs = 1,, 3, +5 o C 15 - µs = 15V 1,, 3, +5 o C 15 - µs Minimum EAR Removal Time TREM = 5V 1,, 3 +5 o C - ns = 1,, 3 +5 o C - ns = 15V 1,, 3 +5 o C - ns Minimum EAR Pulse Width TW = 5V 1,, 3 +5 o C - 1 ns = 1,, 3 +5 o C - 5 ns = 15V 1,, 3 +5 o C - ns Input Capacitance CIN EAR 1, +5 o C - pf All others 1, +5 o C pf NOTES: 1. All voltages referenced to device GND.. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. = 5pF, RL = K, Input TR, TF < ns.. If more than one unit is cascaded, TR should be made less than or equal to the sumof the transition time and the fixed propagation delay of the output of the driving stage for the estimated capacitive load

5 Specifications CD17BMS TABLE. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS Supply Current IDD = V, VIN = or GND 1, +5 o C µa N Threshold Voltage VNTH =, ISS = -1µA 1, +5 o C V N Threshold Voltage Delta VTN =, ISS = -1µA 1, +5 o C - ±1 V P Threshold Voltage VTP VSS = V, IDD = 1µA 1, +5 o C.. V P Threshold Voltage Delta VTP VSS = V, IDD = 1µA 1, +5 o C - ±1 V Functional F = 1V, VIN = or GND 1 +5 o C VOH > = 3V, VIN = or GND / VOL < / V Propagation Delay Time TPHL TPLH = 5V 1,, 3, +5 o C x +5 o C Limit ns NOTES: 1. All voltages referenced to device GND.. = 5pF, RL = K, Input TR, TF < ns. 3. See Table for +5 o C limit.. Read and Record TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +5 O C PARAMETER SYMBOL DELTA LIMIT Supply Current - MSI-1 IDD ±.µa Output Current (Sink) IOL5 ± % x Pre-Test Reading Output Current (Source) IOH5A ± % x Pre-Test Reading TABLE. APPLICABLE SUBGROUPS CONFORMANCE GROUP MIL-STD-3 METHOD GROUP A SUBGROUPS READ AND RECORD Initial Test (Pre Burn-In) 1% 5 1, 7, 9 IDD, IOL5, IOH5A Interim Test 1 (Post Burn-In) 1% 5 1, 7, 9 IDD, IOL5, IOH5A Interim Test (Post Burn-In) 1% 5 1, 7, 9 IDD, IOL5, IOH5A PDA (Note 1) 1% 5 1, 7, 9, Deltas Interim Test 3 (Post Burn-In) 1% 5 1, 7, 9 IDD, IOL5, IOH5A PDA (Note 1) 1% 5 1, 7, 9, Deltas Final Test 1% 5, 3, A, B, 1, 11 Group A Sample 55 1,, 3, 7, A, B, 9, 1, 11 Group B Subgroup B-5 Sample 55 1,, 3, 7, A, B, 9, 1, 11, Deltas Subgroups 1,, 3, 9, 1, 11 Subgroup B- Sample 55 1, 7, 9 Group D Sample 55 1,, 3, A, B, 9 Subgroups 1, 3 NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and. TABLE 7. TOTAL DOSE IRRADIATION CONFORMANCE GROUPS MIL-STD-3 METHOD TEST READ AND RECORD PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD Group E Subgroup 55 1, 7, 9 Table 1, 9 Table 7-13

6 Specifications CD17BMS TABLE. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION OPEN GROUND 9V ± -.5V 5kHz 5kHz Static Burn-In 1 (Note 1), 5, 7, 1, 1, 15 1, 3,,,, 9, 11, 13, 1 1 Static Burn-In (Note 1) Dynamic Burn-In (Note 1) Irradiation (Note ), 5, 7, 1, 1, 15 1, 3,,, 9, 11, 13, 1, 1-1, 1, 5, 7, 1, 1, ,,, 11, 13, 1, 5, 7, 1, 1, 15 1, 3,,, 9, 11, 13, 1, 1 NOTE: 1. Each pin except and GND will have a series resistor of 1K ± 5%, = 1V ±.5V. Each pin except and GND will have a series resistor of 7K ± 5%; Group E, Subgroup, sample size is dice/wafer, failures, = ±.5V Logic Diagram D 3 (,, 11, 13, 1) p n p p n p Q (5, 7, 1, 1, 15) n n R* 1 K* 9 * All inputs (terms 1, 3,,, 9, 11, 13, 1) protected by COS/MOS protection network VSS FIGURE 1. 1 OF FLIP-FLOPS TRUTH TABLE FOR 1 OF FLIP-FLOPS INPUTS OUTPUT OCK DATA EAR Q X 1 NC X X 1 = High Level = Low Level X = Don t Care NC = No Change 7-139

7 CD17BMS Typical Performance Curves TRANSITION TIME (fthl, ftlh) (ns) AMBIENT TEMPERATURE (T A ) = +5 o C SUPPLY VOLTAGE () = 5V 15V OUTPUT LOW (SINK) CURRENT (IOL) (ma) AMBIENT TEMPERATURE (T A ) = +5 o C GATE-TO-SOURCE VOLTAGE (VGS) = 15V 5V 1 LOAD CAPACITANCE () (pf) FIGURE. TYPICAL TRANSITION TIME AS A FUNCTION OF LOAD CAPACITANCE DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 3. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS OUTPUT LOW (SINK) CURRENT (IOL) (ma) AMBIENT TEMPERATURE (T A ) = +5 o C 15. GATE-TO-SOURCE VOLTAGE (VGS) = 15V V DRAIN-TO-SOURCE VOLTAGE (VDS) (V) DRAIN-TO-SOURCE VOLTAGE (VDS) (V) AMBIENT TEMPERATURE (T A ) = +5 o C GATE-TO-SOURCE VOLTAGE (VGS) = -5V - -15V OUTPUT HIGH (SOURCE) CURRENT (IOH) (ma) FIGURE. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) AMBIENT TEMPERATURE (T A ) = +5 o C GATE-TO-SOURCE VOLTAGE (VGS) = -5V -15V - FIGURE. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS OUTPUT HIGH (SOURCE) CURRENT (IOH) (ma) FIGURE 5. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS POWER DISSIPATION PER FLIP-FLOP (PD) (µw) AMBIENT TEMPERATURE (T A ) = +5 o C SUPPLY VOLTAGE () = 15V OCK INPUT FREQUENCY (f) (khz) FIGURE 7. TYPICAL DYNAMIC POWER DISSIPATION AS A FUNCTION OF OCK FREQUENCY 5V = 5pF = 15pF 7-139

8 Typical Performance Curves (Continued) PROPAGATION DELAY TIME (tphl, tplh) (ns) CD17BMS AMBIENT TEMPERATURE (T A ) = +5 o C SUPPLY VOLTAGE () = 5V LOAD CAPACITANCE () (pf) FIGURE. TYPICAL PROPAGATION DELAY TIME (OCK TO OUTPUT) AS A FUNCTION OF LOAD CAPACITANCE 15V Waveform Pad Layout tr OCK INPUT DATA INPUT tsu(lh)* OUTPUT th(hl)* ttlh tf th(lh)* tsu(hl)* tthl 9% 5% 1% 5% 9% 5% 1% tplh tphl trem *(LH) OR (HL) OPTIONAL EAR 5% FIGURE 9. DEFINITION OF SETUP, HOLD, PROPAGATION DELAY, AND REMOVAL TIMES DIMENSIONS AND PAD LAYOUT FOR CD17BMSH The photographs and dimensions of each CMOS chip represent a chip when it is part of the wafer. When the wafer is separated into individual chips, the angle of cleavage may vary with respect to the chip face for different chips. The actual dimensions of the isolated chip, therefore, may differ slightly from the nominal dimensions shown. The user should consider a tolerance of -3 mils to +1 mils applicable to the nominal dimensions shown. Dimension in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (1-3 inch). METALLIZATION: Thickness: 11kÅ 1kÅ, AL. PASSIVATION: 1.kÅ - 15.kÅ, Silane BOND PADS:. inches X. inches MIN DIE THICKNESS:.19 inches -.1 inches