DATASHEET CD4504BMS. Pinout. Features. Functional Diagram. Description. CMOS Hex Voltage Level Shifter for TTL-to-CMOS or CMOS-to-CMOS Operation

Size: px

Start display at page:

Download "DATASHEET CD4504BMS. Pinout. Features. Functional Diagram. Description. CMOS Hex Voltage Level Shifter for TTL-to-CMOS or CMOS-to-CMOS Operation"

Vernon Ward
6 years ago
Views:

1 DATASHEET CD454BMS CMOS Hex Voltage Level Shifter for TTL-to-CMOS or CMOS-to-CMOS Operation FN3336 Rev. Features Pinout High Voltage Type (2V Rating) Independence of Power Supply Sequence Considerations - can Exceed - Input Signals can Exceed Both and AOUT 1 2 CD454BMS TOP VIEW FOUT Up and Down Level Shifting Capability Shiftable Input Threshold for Either CMOS or TTL Compatibility AIN BOUT BIN FIN SELECT EOUT 1% Tested for Quiescent Current at 2V 5V, 1V and 15V Parametric Ratings Standardized Symmetrical Output Characteristics COUT CIN EIN DOUT DIN Maximum Input Current of 1 A at 18V Over Full Package Temperature Range; 1nA at 18V and +25 o C Meets All Requirements of JEDEC Tentative Standard No. 13B, Standard Specifications for Description of B Series CMOS Devices Functional Diagram Description CD454BMS hex voltage level shifter consists of six circuits which shift input signals from the logic level to the logic level. To shift TTL signals to CMOS logic levels, the SELECT input is at the HIGH logic state. When the SELECT input is at a LOW logic state, each circuit translates signals from one CMOS level to another. The CD454BMS is supplied in these 16-lead outline packages: * IN (3, 5, 7, 9, 11, 14) * SELECT 13 TTL/CMOS MODE SELECT LEVEL SHIFTER OUT (2, 4, 6, 1, 12, 15) = PIN 1 = PIN 16 = PIN 8 Frit Seal DIP Ceramic Flatpack H1F H6W * ALL INPUTS ARE PROTECTED BY CMOS PROTECTION NETWORK FN3336 Rev. Page 1 of 8

2 Absolute Maximum Ratings DC Supply Voltage Range, () V to +2V (Voltage Referenced to Terminals) Input Voltage Range, All Inputs V to +.5V DC Input Current, Any One Input 1mA Operating Temperature Range to +125 o C Package Types D, F, K, H Storage Temperature Range (TSTG) o C to +15 o C Lead Temperature (During Soldering) o C At Distance 1/16 1/32 Inch (1.59mm.79mm) from case for 1s Maximum Reliability Information Thermal Resistance ja jc Ceramic DIP and FRIT Package o C/W 2 o C/W Flatpack Package o C/W 2 o C/W Maximum Package Power Dissipation (PD) at +125 o C For TA = to +1 o C (Package Type D, F, K) mW For TA = +1 o C to +125 o C (Package Type D, F, K)..... Derate Linearity at 12mW/ o C to 2mW Device Dissipation per Output Transistor mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature o C TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A PARAMETER SYMBOL CONDITIONS (NOTE 1) SUBGROUPS TEMPERATURE MIN MAX UNITS Supply Current IDD = 2V, VIN = or GND o C - 2 A o C - 2 A = 18V, VIN = or GND 3-2 A Input Leakage Current IIL VIN = or GND = o C -1 - na o C -1 - na = 18V na Input Leakage Current IIH VIN = or GND = o C - 1 na o C - 1 na = 18V 3-1 na Output Voltage VOL15 = 15V, No Load 1, 2, o C, +125 o C, - 5 mv Output Voltage VOH15 = 15V, No Load (Note 3) 1, 2, o C, +125 o C, V Output Current (Sink) IOL5 = 5V, VOUT =.4V o C.53 - ma Output Current (Sink) IOL1 = 1V, VOUT =.5V o C ma Output Current (Sink) IOL15 = 15V, VOUT = 1.5V o C ma Output Current (Source) IOH5A = 5V, VOUT = 4.6V o C ma Output Current (Source) IOH5B = 5V, VOUT = 2.5V o C ma Output Current (Source) IOH1 = 1V, VOUT = 9.5V o C ma Output Current (Source) IOH15 = 15V, VOUT = 13.5V o C ma N Threshold Voltage VNTH = 1V, ISS = -1 A o C V P Threshold Voltage VPTH = V, IDD = 1 A o C V Functional F = 4.5V, = 2.8, VIN = or GND = 4.5V, = 3., VIN = or GND = 18V, = 18V, VIN = GND or = 18V, = 4.5V, VIN = or GND = 4.5V, = 18V, VIN = or GND = 2V, = 2V, VIN = GND or = 2V, = 4.5V, VIN = or GND = 4.5V, = 2V, VIN = or GND o C VOH > /2 8B 8A 8A 8A +125 o C +125 o C +125 o C o C o C o C VOL < /2 V FN3336 Rev. Page 2 of 8

3 (Note 2) TTL-CMOS (Note 2) TTL-CMOS (Note 2) CMOS-CMOS (Note 2)CMOS-CMOS (Note 2) CMOS-CMOS (Note 2) CMOS-CMOS TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) PARAMETER SYMBOL CONDITIONS (NOTE 1) VIL VIH VIL VIH = 15V, VOH > 13.5V, VOL < 1V = 15V, VOH > 13.5V, VOL < 1V = 1V, VOH > 9V, VOL < 1V = 1V, VOH > 9V, VOL < 1V VIL = 15V, VOH > 13.5V, VOL < 1.5V, = 1V VIH = 15V, VOH > 13.5V, VOL < 1.5V, = 1V 1. All voltages referenced to device GND, 1% testing being implemented. 2. Go/No Go test with limits applied to inputs. GROUP A SUBGROUPS TEMPERATURE MIN MAX UNITS 1, 2, o C, +125 o C, -.8 V 1, 2, o C, +125 o C, 2 - V 1, 2, o C, +125 o C, V 1, 2, o C, +125 o C, V 1, 2, o C, +125 o C, - 3 V 1, 2, o C, +125 o C, 7 - V 3. For accuracy, voltage is measured differentially to. Limit is.5v max. TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL CONDITIONS (NOTE 1, 2) TTL to CMOS > CMOS to CMOS > CMOS to CMOS > TTL to CMOS > CMOS to CMOS > CMOS to CMOS > Transition Time TPHL1 TPHL2 TPHL3 TPLH1 TPLH2 TPLH3 = 1V, VIN = or GND = 1V, VIN = or GND = 5V, VIN = or GND = 1V = 1V, VIN = or GND = 1V, VIN = or GND = 5V, VIN = or GND = 1V GROUP A SUBGROUPS TEMPERATURE MIN MAX UNITS o C - 28 ns 1, o C, ns o C - 24 ns 1, o C, ns o C - 55 ns 1, o C, ns o C - 28 ns 1, o C, ns o C - 24 ns 1, o C, ns o C - 4 ns 1, o C, - 54 ns TTHL All Modes o C - 2 ns TTLH 1, o C, - 27 ns 1. CL = 5pF, RL = 2K, Input TR, TF < 2ns. 2. and +125 o C limits guaranteed, 1% testing being implemented. FN3336 Rev. Page 3 of 8

4 TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS Supply Current IDD = 5V, VIN = or GND 1, 2, +25 o C - 1 A +125 o C - 3 A = 1V, VIN = or GND 1, 2, +25 o C - 2 A +125 o C - 6 A = 15V, VIN = or GND 1, 2, +25 o C - 2 A +125 o C - 12 A Output Voltage VOL = 5V, No Load 1, o C, +125 o C, - 5 mv Output Voltage VOL = 1V, No Load 1, o C, +125 o C, Output Voltage VOH = 5V, No Load 1, o C, +125 o C, Output Voltage VOH = 1V, No Load 1, o C, +125 o C, - 5 mv V V Output Current (Sink) IOL5 = 5V, VOUT =.4V 1, o C.36 - ma.64 - ma Output Current (Sink) IOL1 = 1V, VOUT =.5V 1, o C.9 - ma ma Output Current (Sink) IOL15 = 15V, VOUT = 1.5V 1, o C ma ma Output Current (Source) IOH5A = 5V, VOUT = 4.6V 1, o C ma ma Output Current (Source) IOH5B = 5V, VOUT = 2.5V 1, o C ma ma Output Current (Source) IOH1 = 1V, VOUT = 9.5V 1, o C ma ma Output Current (Source) IOH15 =15V, VOUT = 13.5V 1, o C ma ma TTL - CMOS TTL - CMOS CMOS - CMOS CMOS - CMOS TTL - CMOS, > CMOS - CMOS, > CMOS - CMOS, > TTL - CMOS, > VIL = 1V, VOH > 9V, VOL < 1V, VIH = 1V, VOH > 9V, VOL < 1V, VIL VIH = 15V, VOH > 13.5V, VOL < 1.5V, = 15V, VOH > 13.5V, VOL < 1.5V, 1, o C, +125 o C, 1, o C, +125 o C, 1, o C, +125 o C, 1, o C, +125 o C, -.8 V 2 - V V V TPHL1 = 15V, 1, 2, o C - 28 ns TPHL2 = 15V, 1, 2, o C - 24 ns = 15V, = 1V 1, 2, o C - 14 ns TPHL3 = 5V, = 15V 1, 2, o C - 55 ns = 1V, = 15V 1, 2, o C - 14 ns TPLH1 = 15V, 1, 2, o C - 28 ns FN3336 Rev. Page 4 of 8

5 TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE CMOS - CMOS, > CMOS - CMOS > Transition Time TPLH2 = 15V, 1, 2, o C - 24 ns = 15V, = 1V 1, 2, o C - 14 ns TPLH3 = 5V, = 15V 1, 2, o C - 4 ns = 1V, = 15V 1, 2, o C - 12 ns TTHL = 1V 1, 2, o C - 1 ns TTLH = 15V 1, 2, o C - 8 ns Input Capacitance CIN Any Input 1, o C pf 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 5pF, RL = 2K, Input TR, TF < 2ns. MIN MAX UNITS TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS Supply Current IDD = 2V, VIN = or GND 1, o C A N Threshold Voltage VNTH = 1V, ISS = -1 A 1, o C V N Threshold Voltage VTN = 1V, ISS = -1 A 1, o C - 1 V Delta P Threshold Voltage VTP = V, IDD = 1 A 1, o C V P Threshold Voltage VTP = V, IDD = 1 A 1, o C - 1 V Delta Functional F = 18V, VIN = or GND = 3V, VIN = or GND o C VOH > /2 Time TPHL TPLH 1. All voltages referenced to device GND. 2. CL = 5pF, RL = 2K, Input TR, TF < 2ns. VOL < /2 = 5V 1, 2, 3, o C x +25 o C Limit 3. See Table 2 for +25 o C limit. 4. Read and Record V ns TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25 o C PARAMETER SYMBOL DELTA LIMIT Supply Current - MSI-1 IDD.2 A Output Current (Sink) IOL5 2% x Pre-Test Reading Output Current (Source) IOH5A 2% x Pre-Test Reading TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUP MIL-STD-883 METHOD GROUP A SUBGROUPS READ AND RECORD Initial Test (Pre Burn-In) 1% 54 1, 7, 9 IDD, IOL5, IOH5A Interim Test 1 (Post Burn-In) 1% 54 1, 7, 9 IDD, IOL5, IOH5A Interim Test 2 (Post Burn-In) 1% 54 1, 7, 9 IDD, IOL5, IOH5A FN3336 Rev. Page 5 of 8

6 TABLE 6. APPLICABLE SUBGROUPS (Continued) CONFORMANCE GROUP MIL-STD-883 METHOD GROUP A SUBGROUPS READ AND RECORD PDA (Note 1) 1% 54 1, 7, 9, Deltas Interim Test 3 (Post Burn-In) 1% 54 1, 7, 9 IDD, IOL5, IOH5A PDA (Note 1) 1% 54 1, 7, 9, Deltas Final Test 1% 54 2, 3, 8A, 8B, 1, 11 Group A Sample 55 1, 2, 3, 7, 8A, 8B, 9, 1, 11 Group B Subgroup B-5 Sample 55 1, 2, 3, 7, 8A, 8B, 9, 1, 11, Deltas Subgroups 1, 2, 3, 9, 1, 11 Subgroup B-6 Sample 55 1, 7, 9 Group D Sample 55 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3 NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2. TABLE 7. TOTAL DOSE IRRADIATION CONFORMANCE GROUPS MIL-STD-883 METHOD TEST READ AND RECORD PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD Group E Subgroup , 7, 9 Table 4 1, 9 Table 4 TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION OPEN GROUND 9V -.5V 5kHz 25kHz Static Burn-In 1 (Note 1) Static Burn-In 2 (Note 1) Dynamic Burn- In (Note 1, 3) Irradiation (Note 2) 2, 4, 6, 1, 12, 15 3, 5, 7-9, 11, , 13 2, 4, 6, 1, 12, , 3, 5, 7, 9, 11, 13, , 2, 4, 6, 1, 12, 15 2, 4, 6, 1, 12, , 3, 5, 7, 9, 11, 13, 14, 16 3, 5, 7, 9, 11, Each pin except, and GND will have a series resistor of 1K 5%, = 18V.5V 2. Each pin except, and GND will have a series resistor of 47K 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, failures, = 1V.5V 3. Oscillator output to be /2. FN3336 Rev. Page 6 of 8

7 Typical Performance Characteristics 1/6 OUTPUT LOW (SINK) CURRENT (IOL) (ma) GATE-TO-SOURCE VOLTAGE (VGS) = 15V 1V 5V 1/6 OUTPUT LOW (SINK) CURRENT (IOL) (ma) GATE-TO-SOURCE VOLTAGE (VGS) = 15V 1V 5V DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 1. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 2. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) GATE-TO-SOURCE VOLTAGE (VGS) = -5V -1V -15V OUTPUT HIGH (SOURCE) CURRENT (IOH) (ma) DRAIN-TO-SOURCE VOLTAGE (VDS) (V) GATE-TO-SOURCE VOLTAGE (VGS) = -5V -1V -15V OUTPUT HIGH (SOURCE) CURRENT (IOH) (ma) FIGURE 3. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS FIGURE 4. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS INPUT SWITCHING VOLTAGE (VSWITCH) (V) VIN VOUT *VSWITCH 5% ENABLE = = 1V = 15V 2 *VSWITCH = INPUT VOLTAGE AT WHICH OUTPUT LEVEL IS 5% OF SUPPLY VOLTAGE () (V) INPUT SWITCHING VOLTAGE (VSWITCH) (V) VIN VOUT *VSWITCH 5% ENABLE = *VSWITCH = INPUT VOLTAGE AT WHICH OUTPUT LEVEL IS 5% OF - AMBIENT TEMPERATURE (T A ) = +25 o C SUPPLY VOLTAGE () (V) FIGURE 5. TYPICAL INPUT SWITCHING AS A FUNCTION OF HIGH LEVEL SUPPLY VOLTAGE (SELECT AT -CMOS MODE) FIGURE 6. TYPICAL INPUT SWITCHING AS A FUNCTION OF HIGH LEVEL SUPPLY VOLTAGE (SELECT AT -TTL MODE) FN3336 Rev. Page 7 of 8

8 Typical Performance Characteristics (Continued) SUPPLY VOLTAGE () (V) AMBIENT TEMPERATURE (T A ) = +25 o C CMOS MODE = RECOMMENDED OPERATING CONDITIONS TTL MODE = SUPPLY VOLTAGE () (V) FIGURE 7. HIGH LEVEL SUPPLY VOLTAGE vs LOW LEVEL SUPPLY VOLTAGE Chip Dimensions and Pad Layout Dimensions in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (1-3 inch). METALLIZATION: Thickness: 11kÅ 14kÅ, AL. PASSIVATION: 1.4kÅ kÅ, Silane BOND PADS:.4 inches X.4 inches MIN DIE THICKNESS:.198 inches inches Copyright Intersil Americas LLC All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see Intersil products are manufactured, assembled and tested utilizing ISO91 quality systems as noted in the quality certifications found at Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see FN3336 Rev. Page 8 of 8

DATASHEET CD4503BMS. Features. Applications. Functional Diagram. Pinout. CMOS Hex Buffer. FN3335 Rev 0.00 Page 1 of 8. December FN3335 Rev 0.

DATASHEET CD4503BMS. Features. Applications. Functional Diagram. Pinout. CMOS Hex Buffer. FN3335 Rev 0.00 Page 1 of 8. December FN3335 Rev 0. DATASHEET CD503BMS CMOS Hex Buffer CD503BMS is a hex noninverting buffer with 3 state outputs having high sink and source current capability. Two disable controls are provided, one of which controls four