DATASHEET CD4029BMS. Features. Description. Applications. Functional Diagram. Pinout. CMOS Presettable Up/Down Counter. FN3304 Rev 0.

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1 DATASHEET CD49BMS CMOS Presettable Up/Down Counter Features High-Voltage Type (V Rating) Medium Speed Operation: MHz (Typ.) at CL = 5pF and VDD - VSS = V Multi-Package Parallel Clocking for Synchronous High Speed Output Response or Ripple Clocking for Slow Clock Input Rise and Fall Times Preset Enable and Individual Jam Inputs Provided Binary or Decade Up/Down Counting BCD Outputs in Decade Mode % Tested for Maximum Quiescent Current at V 5V, V and 5V Parametric Ratings Standardized Symmetrical Output Characteristics Maximum Input Current of A at V Over Full Package-Temperature Range; na at V and +5 o C Noise Margin (Over Full Package Temperature Range): - V at VDD = 5V - V at VDD = V -.5V at VDD = 5V Meets All Requirements of JEDEC Tentative Standards No. 3B, Standard Specifications for Description of B Series CMOS Device s Applications Programmable Binary and Decade Counting/Frequency Synthesizers-BCD Output Analog to Digital and Digital to Analog Conversion Up/Down Binary Counting Difference Counting Magnitude and Sign Generation Up/Down Decade Counting Description FN334 Rev. CD49BMS consists of a four-stage binary or BCD-decade up/ down counter with provisions for look-ahead carry in both counting modes. The inputs consist of a single, CARRY-IN ( ),,,, and four individual JAM signals. Q,,, and a CARRY OUT signal are provided as outputs. A high signal allows information on the JAM INPUTS to preset the counter to any state asynchronously with the clock. A low on each JAM line, when the - signal is high, resets the counter to its zero count. The counter is advanced one count at the positive transition of the clock when the CARRY-IN and PRE-SET signals are low. Advancement is inhibited when the CARRY-IN or signals are high. The CARRY-OUT signal is normally high and goes low when the counter reaches its maximum count in the UP mode or the minimum count in the DOWN mode provided the CARRY-IN signal is low. The CARRY-IN signal in the low state can thus be considered a. The CARRY-IN terminal must be connected to VSS when not in use. Binary counting is accomplished when the input is high; the counter counts in the decade mode when the input is low. The counter counts up when the input is high, and down when the input is low. Multiple packages can be connected in either a parallelclocking or a ripple-clocking arrangement as shown in Figure 7. Parallel clocking provides synchronous control and hence faster response from all counting outputs. Ripple-clocking allows for longer clock input rise and fall times. The CD49BMS is supplied in these 6-lead outline packages: Braze Seal DIP H4X Frit Seal DIP HF Ceramic Flatpack H6W Pinout CD49BMS TOP VIEW 6 5 VDD Functional Diagram JAM INPUTS VDD 3 4 CARRY IN ( ) 5 6 Q JAM 4 JAM JAM 3 9 CARRY IN Q 5 6 JAM 4 BUFFERED OUTPUTS CARRY OUT VSS VSS CARRY OUT FN334 Rev. Page of

2 CD49BMS Absolute Maximum Ratings DC Supply Voltage Range, (VDD) V to +V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs V to VDD +.5V DC Input Current, Any One Input ma Operating Temperature Range to +5 o C Package Types D, F, K, H Storage Temperature Range (TSTG) o C to +5 o C Lead Temperature (During Soldering) o C At Distance /6 /3 Inch (.59mm.79mm) from case for s Maximum Reliability Information Thermal Resistance ja jc Ceramic DIP and FRIT Package..... o C/W o C/W Flatpack Package o C/W o C/W Maximum Package Power Dissipation (PD) at +5 o C For TA = to + o C (Package Type D, F, K) mW For TA = + o C to +5 o C (Package Type D, F, K)..... Derate Linearity at mw/ o C to mw Device Dissipation per Output Transistor mw For TA = Full Package Temperature Range (All Package Types) Junction Temperature o C TABLE. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A PARAMETER SYMBOL NDITIONS (NOTE ) SUBGROUPS TEMPERATURE MIN MAX UNITS Supply Current IDD VDD = V, VIN = VDD or GND +5 o C - A +5 o C - A VDD = V, VIN = VDD or GND 3 - A Input Leakage Current IIL VIN = VDD or GND VDD = +5 o C - - na +5 o C - - na VDD = V na Input Leakage Current IIH VIN = VDD or GND VDD = +5 o C - na +5 o C - na VDD = V 3 - na Output Voltage VOL5 VDD = 5V, No Load,, 3 +5 o C, +5 o C, - 5 mv Output Voltage VOH5 VDD = 5V, No Load (Note 3),, 3 +5 o C, +5 o C, V Output Current (Sink) IOL5 VDD = 5V, VOUT =.4V +5 o C.53 - ma Output Current (Sink) IOL VDD = V, VOUT =.5V +5 o C.4 - ma Output Current (Sink) IOL5 VDD = 5V, VOUT =.5V +5 o C ma Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V +5 o C ma Output Current (Source) IOH5B VDD = 5V, VOUT =.5V +5 o C - -. ma Output Current (Source) IOH VDD = V, VOUT = 9.5V +5 o C ma Output Current (Source) IOH5 VDD = 5V, VOUT = 3.5V +5 o C ma N Threshold Voltage VNTH VDD = V, ISS = - A +5 o C V P Threshold Voltage VPTH VSS = V, IDD = A +5 o C.7. V Functional F VDD =.V, VIN = VDD or GND 7 +5 o C VOH > VOL < V VDD = V, VIN = VDD or GND 7 +5 o C VDD/ VDD/ VDD = V, VIN = VDD or GND A +5 o C VDD = 3V, VIN = VDD or GND B Input Voltage Low (Note ) VIL VDD = 5V, VOH > 4.5V, VOL <.5V,, 3 +5 o C, +5 o C, -.5 V Input Voltage High (Note ) Input Voltage Low (Note ) Input Voltage High (Note ) NOTES: VIH VDD = 5V, VOH > 4.5V, VOL <.5V,, 3 +5 o C, +5 o C, V VIL VIH VDD = 5V, VOH > 3.5V, VOL <.5V VDD = 5V, VOH > 3.5V, VOL <.5V. All voltages referenced to device GND, % testing being implemented.. Go/No Go test with limits applied to inputs.,, 3 +5 o C, +5 o C, - 4 V,, 3 +5 o C, +5 o C, - V 3. For accuracy, voltage is measured differentially to VDD. Limit is.5v max. FN334 Rev. Page of

3 CD49BMS TABLE. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL NDITIONS (NOTE, ) Clock To Q Output Clock To Carry Out Preset Enable To Q Preset Enable To Carry- Out Carry-In To Carry-Out Transition Time Q Output TPHL TPLH TPHL TPLH TPHL3 TPLH3 TPHL4 TPLH4 TPHL5 TPLH5 GROUP A SUBGROUPS TEMPERATURE MIN MAX UNITS VDD = 5V, VIN = VDD or GND 9 +5 o C - 5 ns, +5 o C, ns VDD = 5V, VIN = VDD or GND 9 +5 o C - 56 ns, +5 o C, ns VDD = 5V, VIN = VDD or GND 9 +5 o C - 47 ns, +5 o C, ns VDD = 5V, VIN = VDD or GND 9 +5 o C - 64 ns, +5 o C, - 64 ns VDD = 5V, VIN = VDD or GND 9 +5 o C - 34 ns, +5 o C, ns TTHL VDD = 5V, VIN = VDD or GND 9 +5 o C - ns TTLH, +5 o C, - 7 ns Maximum Clock Input FCL VDD = 5V, VIN = VDD or GND 9 +5 o C - MHz Frequency, +5 o C,.4 - MHz NOTES:. VDD = 5V, CL = 5pF, RL = K. and +5 o C limits guaranteed, % testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL NDITIONS NOTES TEMPERATURE MIN MAX UNITS Supply Current IDD VDD = 5V, VIN = VDD or GND,, +5 o C - 5 A +5 o C - 5 A VDD = V, VIN = VDD or GND,, +5 o C - A +5 o C - 3 A VDD = 5V, VIN = VDD or GND,, +5 o C - A +5 o C - 6 A Output Voltage VOL VDD = 5V, No Load, +5 o C, +5 o C, - 5 mv Output Voltage VOL VDD = V, No Load, +5 o C, +5 o C, Output Voltage VOH VDD = 5V, No Load, +5 o C, +5 o C, Output Voltage VOH VDD = V, No Load, +5 o C, +5 o C, - 5 mv V V Output Current (Sink) IOL5 VDD = 5V, VOUT =.4V, +5 o C.36 - ma.64 - ma Output Current (Sink) IOL VDD = V, VOUT =.5V, +5 o C.9 - ma.6 - ma Output Current (Sink) IOL5 VDD = 5V, VOUT =.5V, +5 o C.4 - ma 4. - ma Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V, +5 o C ma ma FN334 Rev. Page 3 of

4 CD49BMS Output Current (Source) IOH5B VDD = 5V, VOUT =.5V, +5 o C ma - -. ma Output Current (Source) IOH VDD = V, VOUT = 9.5V, +5 o C ma ma Output Current (Source) IOH5 VDD =5V, VOUT = 3.5V, +5 o C ma ma Input Voltage Low VIL VDD = V, VOH > 9V, VOL < V, +5 o C, +5 o C, - 3 V Input Voltage High VIH VDD = V, VOH > 9V, VOL < V, +5 o C, +5 o C, Q Output Carry Output Preset Enable To Q Preset Enable To Carry- Out Carry In To Carry Out Transition Time Maximum Clock Input Frequency Minimum Data Setup Time Note 4 Clock Rise And Fall Time Note 5 Minimum Clock Pulse Width Minimum Carry In Setup Time Note 6 Minimum Carry Input Hold Time Note 6 Minimum Preset Enable Removal Time Note 4 TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) PARAMETER SYMBOL NDITIONS NOTES TEMPERATURE TPHL TPLH TPHL TPLH TPHL3 TPLH3 TPHL4 TPLH4 TPHL5 TPLH5 TTHL TTLH 7 - V VDD = V,, 3 +5 o C - 4 ns VDD = 5V,, 3 +5 o C - ns VDD = V,, 3 +5 o C - 6 ns VDD = 5V,, 3 +5 o C - 9 ns VDD = V,, 3 +5 o C - ns VDD = 5V,, 3 +5 o C - 6 ns VDD = V,, 3 +5 o C - 9 ns VDD = 5V,, 3 +5 o C - ns VDD = V,, 3 +5 o C - 4 ns VDD = 5V,, 3 +5 o C - ns VDD = V,, 3 +5 o C - ns VDD = 5V,, 3 +5 o C - ns FCL VDD = V,, 3 +5 o C 4 - MHz VDD = 5V,, 3 +5 o C MHz TS VDD = 5V,, 3 +5 o C - 34 ns VDD = V,, 3 +5 o C - 4 ns VDD = 5V,, 3 +5 o C - ns TRCL TFCL VDD = 5V,, 3 +5 o C - 5 s VDD = V,, 3 +5 o C - 5 s VDD = 5V,, 3 +5 o C - 5 s TW VDD = 5V,, 3 +5 o C - ns VDD = V,, 3 +5 o C - 9 ns VDD = 5V,, 3 +5 o C - 6 ns TS VDD = 5V,, 3 +5 o C - ns VDD = V,, 3 +5 o C - 7 ns VDD = 5V,, 3 +5 o C - 6 ns TH VDD = 5V,, 3 +5 o C - 5 ns VDD = V,, 3 +5 o C - 3 ns VDD = 5V,, 3 +5 o C - 5 ns TREM VDD = 5V,, 3 +5 o C - ns VDD = V,, 3 +5 o C - ns VDD = 5V,, 3 +5 o C - ns MIN MAX UNITS FN334 Rev. Page 4 of

5 CD49BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) PARAMETER SYMBOL NDITIONS NOTES TEMPERATURE Minimum Preset Enable TW VDD = 5V,, 3 +5 o C - 3 ns Pulse Width VDD = V,, 3 +5 o C - 7 ns VDD = 5V,, 3 +5 o C - 5 ns Input Capacitance N Any Input, +5 o C pf NOTES:. All voltages referenced to device GND.. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 5pF, RL = K, Input TR, TF < ns. 4. From Up/Down, Binary/Decode, Carry In, or Preset Enable Control Inputs to Clock Edge. 5. If more than one unit is cascaded in the parallel clocked application, tr CL should be made the sum of the fixed propagation delay at 5pF and the transition time of the carry output driving stage for the estimated capacitive load. This measurement was made with a decoupling capacitor (> F) between VDD and VSS. 6. From Carry In to Clock Edge. MIN MAX UNITS TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL NDITIONS NOTES TEMPERATURE MIN MAX UNITS Supply Current IDD VDD = V, VIN = VDD or GND, 4 +5 o C - 5 A N Threshold Voltage VNTH VDD = V, ISS = - A, 4 +5 o C V N Threshold Voltage VTN VDD = V, ISS = - A, 4 +5 o C - V Delta P Threshold Voltage VTP VSS = V, IDD = A, 4 +5 o C.. V P Threshold Voltage VTP VSS = V, IDD = A, 4 +5 o C - V Delta Functional F VDD = V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND +5 o C VOH > VDD/ Time TPHL TPLH NOTES:. All voltages referenced to device GND.. CL = 5pF, RL = K, Input TR, TF < ns 3. See Table for +5 o C limit. 4. Read and Record VOL < VDD/ VDD = 5V,, 3, 4 +5 o C -.35 x +5 o C Limit V ns TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +5 O C PARAMETER SYMBOL DELTA LIMIT Supply Current - MSI- IDD. A Output Current (Sink) IOL5 % x Pre-Test Reading Output Current (Source) IOH5A % x Pre-Test Reading TABLE 6. APPLICABLE SUBGROUPS NFORMANCE GROUP MIL-STD-3 METHOD GROUP A SUBGROUPS READ AND RERD Initial Test (Pre Burn-In) % 54, 7, 9 IDD, IOL5, IOH5A Interim Test (Post Burn-In) % 54, 7, 9 IDD, IOL5, IOH5A FN334 Rev. Page 5 of

6 CD49BMS NFORMANCE GROUP TABLE 6. APPLICABLE SUBGROUPS (Continued) MIL-STD-3 METHOD GROUP A SUBGROUPS READ AND RERD Interim Test (Post Burn-In) % 54, 7, 9 IDD, IOL5, IOH5A PDA (Note ) % 54, 7, 9, Deltas Interim Test 3 (Post Burn-In) % 54, 7, 9 IDD, IOL5, IOH5A PDA (Note ) % 54, 7, 9, Deltas Final Test % 54, 3, A, B,, Group A Sample 55,, 3, 7, A, B, 9,, Group B Subgroup B-5 Sample 55,, 3, 7, A, B, 9,,, Deltas Subgroups,, 3, 9,, Subgroup B-6 Sample 55, 7, 9 Group D Sample 55,, 3, A, B, 9 Subgroups, 3 NOTE:. 5% Parameteric, 3% Functional; Cumulative for Static and. TABLE 7. TOTAL DOSE IRRADIATION MIL-STD-3 TEST READ AND RERD NFORMANCE GROUPS METHOD PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD Group E Subgroup 55, 7, 9 Table 4, 9 Table 4 TABLE. BURN-IN AND IRRADIATION TEST NNECTIONS FUNCTION OPEN GROUND VDD 9V -.5V Static Burn-In Note Static Burn-In Note Dynamic Burn- In Note Irradiation Note NOTE:, 6, 7,, 4, 3-5, -,, 3, 5, 6, 7,, 4, 3-5, 9,,, 3, 5, 6 6 OSLLATOR 5kHz 5kHz -, 3-5,,, 3 9,, 6, 6, 7,, 4 5 -, 6, 7,, 4, 3-5, 9,,, 3, 5, 6. Each pin except VDD and GND will have a series resistor of K 5%, VDD = V.5V. Each pin except VDD and GND will have a series resistor of 47K 5%; Group E, Subgroup, sample size is 4 dice/wafer, failures, VDD = V.5V Copyright Intersil Americas LLC 999. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see Intersil products are manufactured, assembled and tested utilizing ISO9 quality systems as noted in the quality certifications found at Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see FN334 Rev. Page 6 of

7 FN334 Rev. Page 7 of Logic Diagram 9 CARRY IN 5 PE J TE Q F/F Q CL 5 6 ALL INPUTS ARE PROTECTED BY CMOS PROTECTION NETWORK 4 J J VDD VSS PE TE PE J TE F/F CL J Q Q FIGURE. PE J TE3 F/F3 CL TRUTH TABLE 3 J3 3 4 PE J TE4 F/F4 CL J4 TE PE J Q Q NTROL INPUT X X BIN/DEC () X Q Q (U/D) X X Preset Enable (PE) X Q Q NC CARRY IN () ( ) X X Q Q NC X = Don t Care FUNCTION TABLE LOGIC LEVEL ACTION Binary Count Decade Count Up Count Down Count Jam In No Jam 7 CARRY OUT No Counter Advance at POS Clock Transition Advance Counter at POS Clock Transition CD49BMS

8 CD49BMS Typical Performance Characteristics OUTPUT LOW (SINK) CURRENT (IOL) (ma) GATE-TO-SOURCE VOLTAGE (VGS) = 5V 5V V 5 5 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS OUTPUT LOW (SINK) CURRENT (IOL) (ma) V GATE-TO-SOURCE VOLTAGE (VGS) = 5V V 5 5 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 3. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) GATE-TO-SOURCE VOLTAGE (VGS) = -5V -V -5V OUTPUT HIGH (SOURCE) CURRENT (IOH) (ma) DRAIN-TO-SOURCE VOLTAGE (VDS) (V) GATE-TO-SOURCE VOLTAGE (VGS) = -5V -V -5V OUTPUT HIGH (SOURCE) CURRENT (IOH) (ma) FIGURE 4. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS FIGURE 5. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS TRANSITION TIME (tthl, ttlh) (ns) 5 SUPPLY VOLTAGE (VDD) = 5V V 5V LOAD CAPATANCE (CL) (pf) PROPAGATION DELAY TIME (tphl, tplh) (ns) 3 SUPPLY VOLTAGE (VDD) = 5V V 5V 4 6 LOAD CAPATANCE (CL) (pf) FIGURE 6. TYPICAL TRANSITION TIME AS A FUNCTION OF LOAD CAPATANCE FIGURE 7. TYPICAL PROPAGATION DELAY TIME AS A FUNCTION OF LOAD CAPATANCE (Q OUTPUT) FN334 Rev. Page of

9 CD49BMS Typical Performance Characteristics (Continued) PROPAGATION DELAY TIME (t PHL, t PLH ) (ns) 3 5V SUPPLY VOLTAGE (VDD) = 5V V 4 6 LOAD CAPATANCE (CL) (pf) FIGURE. TYPICAL PROPAGATION DELAY TIME AS A FUNCTION OF LOAD CAPATANCE (CARRY OUTPUT) POWER DISSIPATION (PD) ( W) SUPPLY VOLTAGE (VDD) = 5V V V CL = 5pF CL = 5pF FREQUENCY (fcl) (khz) FIGURE 9. TYPICAL POWER DISSIPATION AS A FUNCTION OF FREQUENCY 5V Timing Diagrams (CL) CARRY IN (CL ) J J J3 J4 Q CARRY OUT UNT FIGURE. TIMING DIAGRAM - BINARY MODE The CD49BMS and inputs are used directly in most applications. In applications where UP and DOWN inputs are provided, conversion to the CD49BMS and inputs can easily be realized by use of the circuit in Figure. CD49BMS changes count on positive transitions of UP or DOWN inputs. For the gate configuration in Figure, when counting up the DOWN input must be maintained high and conversely when counting down the UP input must be maintained high. UP DOWN CD4 QUAD INPUT NAND GATE VDD FIGURE. NVERSION OF UP, DOWN INPUT SIGNALS TO AND INPUT SIGNALS FN334 Rev. Page 9 of

10 CD49BMS Timing Diagrams (Continued) (CL) CARRY IN (CL ) J J J3 J4 Q CARRY OUT UNT FIGURE. TIMING DIAGRAM- MODE PARALLEL ING PE J J J3 J4 PE J J J3 J4 PE J J J3 J4 CD49 CD49 CD49 CL Q CL Q CL Q CARRY OUT LINES AT THE ND, 3RD, ETC, STAGES MAY HAVE A NEG- ATIVE-GOING GLITCH PULSE RESULTING FROM DIFFERENTIAL DELAYS OF DIFFERENT CD49BMS IC S. THESE NEGATIVE GOING GLITCHES DO NOT AFFECT PROPER CD49BMS OPERATION. HOW- EVER, IF THE CARRY OUT SIGNALS ARE USED TO TRIGGER OTHER EDGE-SENSITIVE LOGIC DEVICES, SUCH AS FF S OR UNTERS, THE CARRY OUT SIGNALS SHOULD BE GATED WITH THE SIGNAL USING A -INPUT OR GATE SUCH AS CD47BMS. FIGURE 3. CASCADING UNTER PACKAGES FN334 Rev. Page of

11 CD49BMS Timing Diagrams (Continued) RIPPLE ING PE J J J3 J4 PE J J J3 J4 PE J J J3 J4 CD49 CD49 CD49 CL Q CL Q CL Q /4 CD47B /4 CD47B RIPPLE ING MODE: THE NTROL CAN BE CHANGED AT ANY UNT. THE ONLY RESTRICTION ON CHANGING THE NTROL IS THAT THE INPUT TO THE FIRST UNTING STAGE MUST BE HIGH. FOR CASCADING UNTERS OPERATING IN A FIXED UP-UNT OR DOWN-UNT MODE, THE OR GATES ARE NOT REQUIRED BETWEEN STAGES, AND IS N- NECTED DIRECTLY TO THE CL INPUT OF THE NEXT STAGE WITH GROUNDED. Chip Dimensions and Pad Layout FIGURE 3. CASCADING UNTER PACKAGES (Continued) METALLIZATION: Dimensions in parentheses are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils ( -3 inch) Thickness: kå 4kÅ, AL. PASSIVATION:.4kÅ - 5.6kÅ, Silane BOND PADS:.4 inches X.4 inches MIN DIE THICKNESS:.9 inches -. inches FN334 Rev. Page of