DATASHEET HI-200/883. Features. Applications. Functional Diagram. Ordering Information. Pinout. Dual SPST CMOS Analog Switch

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1 Dual PT CMO Analog witch NOT RECOMMENDED FOR NEW DEIGN NO RECOMMENDED REPLACEMENT contact our Technical upport Center at INTERIL or DATAHEET FN6059 Rev 2.00 The HI-200/883 is a monolithic device comprising two independently selectable PT switchers which feature fast switching speeds (240ns typical) combined with low power dissipation (15mW +25 C). Each switch provides low ON resistance operation for input signal voltages up to the supply rails and for signal currents up to 25mA continuous. Rugged DI construction eliminates latch-up and substrate CR failure modes. All devices provide break-before-make switching and are TTL and CMO compatible for maximum application versatility. HI-200/883 is an ideal component for use in high frequency analog switching. Typical applications include signal path switching, sample and hold circuits, digital filters, and op amp gain switching networks. Functional Diagram LOGIC INPUT V REF REFERENCE, LEVEL HIFTER, AND DRIVER GATE WITCH CELL OURCE DRAIN GATE INPUT OUTPUT Features This Circuit is Processed in Accordance to MIL-TD-883 and is Fully Conformant Under the Provisions of Paragraph Low On Release Max Wide Analog ignal Range ±15V TTL/CMO Compatible V (Logic 1 ) Turn-On Time ns Analog Current Range (Continuous) mA No Latch-Up Replaces DG200 Applications High Frequency Analog witching ample and Hold Circuits Digital Filters Op Amp Gain witching Networks Ordering Information PART NUMBER TEMP. RANGE ( C) PACKAGE PKG. DWG. # HI2-0200/ to Pin Metal Can T10.B Pinout HI2-200/883 (METAL CAN) TOP VIEW A IN1 A OUT1 3 7 V REF IN OUT2 FN6059 Rev 2.00 Page 1 of 11

2 Absolute Maximum Ratings Voltage Between and Terminals V V UPPLY to Ground (, ) 20V Analog Input Voltage, (+V ) V UPPLY +2V Analog Input Voltage, (-V ) V UPPLY -2V Digital Input Voltage, (+V A ) V UPPLY +4V Digital Input Voltage, (-V A ) V UPPLY -4V Peak Current ( or D) (Pulse at 1ms, 10% Duty Cycle Max) mA Continuous Current mA Junction Temperature C torage Temperature Range C to +150 C Lead Temperature (oldering 10s) 275 C Thermal Information Thermal Resistance JA ( C/W) JC ( C/W) Metal Can Package Package Power Dissipation at +75 C Metal Can Package W/ C Package Power Dissipation Derating Factor above +75 C Metal Can Package mW/ C Recommended Operating Conditions Operating Temperature Range C to +125 C Operating upply Voltage Range (±V UPPLY ) 15V Analog Input Voltage (V ) V UPPLY Logic Low Level (V AL ) V to 0.8V Logic High Level (V AH ) V to V UPPLY CAUTION: tresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. TABLE 1. D.C. ELECTRICAL PERFORMANCE PECIFICATION Device Tested at: V UPPLY = 15V, V UPPLY = 15V, V REF = OPEN, = 0V, Unless Otherwise pecified. D.C. PARAMETER YMBOL CONDITION GROUP A UBGROUP TEMPERATURE ( C) MIN MAX UNIT witch ON Resistance r D V A = 0.8V, V = 10V, I D = -1mA, All Unused Channels V A = 0.8V V A = 0.8V, V = -10V, I D = 1mA, All Unused Channels V A = 0.8V , 3-55 to , 3-55 to ource OFF Leakage Current I (OFF) V = +14V, V D = -14V, V A = 2.4V, All Unused Channels V A = 2.4V, V D = +14V, V = -14V V = -14V, V D = +14V, V A = 2.4V, All Unused Channels V A = 2.4V, V D = -14V, V = +14V Drain OFF Leakage Current I D(OFF) V D = -14V, V = +14V, V A = 2.4V, All Unused Channels V A = 2.4V, V D = +14V, V = -14V V D = +14V, V = -14V, V A = 2.4V, All Unused Channels V A = 2.4V, V D = -14V, V = +14V Channel ON Leakage Current I D(ON) V D = V = +14V, V A = 0.8V, All Unused Channels V A = 0.8V, V D = V = -14V V D = V = -14V, V A = 0.8V, All Unused Channels V A = 0.8V, V D = V = +14V Low Level Input Current High Level Input Current I AL V AL = 0.8V All Channels V A = 2.4V I AH V AH = 2.4V All Channels V AH = 4.0V A 2, 3-55 to A A 2, 3-55 to A upply Current +I CC All Channels V A = 0V µa 2, 3-55 to µa All Channels V A = 3V ma 2, 3-55 to ma FN6059 Rev 2.00 Page 2 of 11

3 TABLE 1. D.C. ELECTRICAL PERFORMANCE PECIFICATION (Continued) Device Tested at: V UPPLY = 15V, V UPPLY = 15V, V REF = OPEN, = 0V, Unless Otherwise pecified. D.C. PARAMETER YMBOL CONDITION GROUP A UBGROUP TEMPERATURE ( C) MIN MAX UNIT upply Current -I CC All Channels V A = 0V µa 2, 3-55 to µa All Channels V A = 3V µa 2, 3-55 to µa TABLE 2. A.C. ELECTRICAL PERFORMANCE PECIFICATION Device Tested at: V UPPLY = 15V, V UPPLY = 15V, V REF = OPEN, = 0V, Unless Otherwise pecified. PARAMETER YMBOL CONDITION Turn ON Time t ON C L = 35pF, R L = Turn OFF Time t OFF C L = 33pF, R L = GROUP A UB- GROUP TEMPERATURE ( C) MIN MAX UNIT ns 10, to ns ns 10, to ns TABLE 3. ELECTRICAL PERFORMANCE PECIFICATION (NOTE 1) Device Tested at: V UPPLY = 15V, V UPPLY = 15V, V REF = OPEN, = 0V TEMPERATURE PARAMETER YMBOL CONDITION NOTE ( C) MIN MAX UNIT Address Capacitance C A f = 1MHz, V AL = 0V pf witches Input Capacitance C (OFF) f = 1MHz, V AH = 5V, Measured ource to witch Output Capacitance C D (OFF) f = 1MHz, V AH = 5V, Measured Output to Ground Drain to ource Capacitance C D (ON) f = 1MHz, V AL = 0V, Measured Output to Ground pf pf pf C D f = 1MHz, V AH = 5V pf Off Isolation V IO f = 200kHz, V A = 2.4, R L = 1K, V GEN = 1V P-P, C L = 10pF Cross Talk V CT f = 200kHz, V A = 2.4, R L = 1K, V GEN = 1V P-P, C L = 10pF Charge Transfer Error V CTE f = 200kHz, V A = 0 to 4V, C L = 0.01µF db db mv NOTE: 1. Parameters listed in Table 2 are controlled via design or process parameters and are not directly tested at final production. These parameters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization based upon data from multiple production runs which reflect lot to lot and within lot variation. TABLE 4. ELECTRICAL REQUIREMENT MIL-TD-883 REQUIREMENT UBGROUP (Tables 1 and 2) Interim Electrical Parameters (Pre Burn-in) 1 Final Electrical Test Parameters 1 (Note 2), 2, 3, 9, 10, 11 Group A Test Requirements 1, 2, 3, 9, 10, 11 Groups C & D Endpoints 1 NOTE: 2. PDA applies to ubgroup 1 only. FN6059 Rev 2.00 Page 3 of 11

4 Test Circuits D V D I D V D I IN FIGURE 1. INPUT LEAKAGE CURRENT FIGURE 2. I D (OFF) V I V D D I D(ON) V FIGURE 3. I (OFF) FIGURE 4. I D (ON) I 1 D TEP GENERATOR 15V IN 1 IN 3 TEP GENERATOR (EE NOTE) 0.01µF 1 D 1 IN 2 3 D 3 IN µF I µF 2 D 2 4 D µF -15V FIGURE 5. UPPLY CURRENT FIGURE 6. CHARGE TRANFER ERROR FN6059 Rev 2.00 Page 4 of 11

5 Test Circuits (Continued) 15V INE WAVE GENERATOR 24V IN 1 IN 3 INE WAVE GENERATOR D V D 2.4V 1 D 1 IN 2 2 D 2 3 D 3 IN 4 4 D 4 2.4V -15V FIGURE 7. R D FIGURE 8. OFF CHANNEL IOLATION 24V 15V 24V 0.8V IN 1 IN 3 0.8V 24V 0.8V 1 D 1 IN 2 2 D 2 3 D 3 IN 4 4 D 4-15V 24V 0.8V TEP GENERATOR FIGURE 9. CROTALK BETWEEN CHANNEL FN6059 Rev 2.00 Page 5 of 11

6 witching Waveforms FIGURE 10. FIGURE 11. FN6059 Rev 2.00 Page 6 of 11

7 Burn-In Circuit NOTE: 3. R 1 = R 2 = 10k 4. C 1 = C 2 = 0.01µF (per socket) or 0.1µF (per row) 5. D 1 = D 2 = IN4002 or equivalent 6. () - () = 30V FIGURE 12. HI-200/883 METAL CAN (TO-99) chematic Diagrams TTL/CMO REFERENCE CIRCUIT V REF CELL R 2 5K QP2 R6 300 QP1 QP3 Q N4 V REF M P13 Q N1 Q P4 Q P5 TO P 2 D 3 R K M N14 Q N2 R 4 5.4K V LL R 5 7.9K M N15 MN16 MN17 R 7 100K FN6059 Rev 2.00 Page 7 of 11

8 chematic Diagrams (Continued) WITCH CELL A N11 N12 INPUT P11 N13 OUTPUT P12 A DIGITAL INPUT BUFFER AND LEVEL HIFTER P3 P5 P1 P4 N1 N11 R D 1 D 2 TO V LL TO V REF P2 P6 N6 P7 N7 P8 P9 P10 N8 N9 N10 INPUT P11 N13 N12 OUTPUT VA P12 N2 N4 N5 N3 FN6059 Rev 2.00 Page 8 of 11

9 Test Circuits and Waveforms T A = 25 C, V UPPLY = ±15V, V AH = 2.4V, V AL = 0.8V and V REF = Open ON REITANCE ( ) = 0V ON REITANCE ( ) 50 = +10V = -10V = +15V = -15V = +12.5V = -12.5V TEMPERATURE ( C) FIGURE 13. ON REITANCE vs TEMPERATURE ANALOG IGNAL LEVEL (V) FIGURE 14. ON REITANCE vs ANALOG IGNAL LEVEL AND POWER UPPLY VOLTAGE CURRENT (na) I (OFF) /I D(OFF) I D(ON) WITCH CURRENT (ma) TEMPERATURE ( C) FIGURE 15. LEAKAGE CURRENT vs TEMPERATURE VOLTAGE ACRO WITCH ( V) FIGURE 16. WITCH CURRENT vs VOLTAGE 140 OFF IOLATION (db) R L = Hz 1kHz 10kHz 100kHz 1MHz FREQUENCY (Hz) FIGURE 17. OFF IOLATION vs FREQUENCY FN6059 Rev 2.00 Page 9 of 11

10 Die Characteristics DIE ATTACH: Material: Gold/ilicon Eutectic Alloy Temperature: Metal Can C (Max) Metallization Mask Layout HI-200 A 2 A IN IN 1 OUT OUT 1 V REF FN6059 Rev 2.00 Page 10 of 11

11 Metal Can Packages (Can) ØD ØD1 F Q A REFERENCE PLANE Øb1 A A L L2 L1 Øb1 Øb ØD2 NOTE: 1. (All leads) Øb applies between L1 and L2. Øb1 applies between L2 and from the reference plane. Diameter is uncontrolled in L1 and beyond from the reference plane. 2. Measured from maximum diameter of the product. 3. is the basic spacing from the centerline of the tab to terminal 1 and is the basic spacing of each lead or lead position (N -1 places) from looking at the bottom of the package. 4. N is the maximum number of terminal positions. 5. Dimensioning and tolerancing per ANI Y14.5M Controlling dimension: INCH. Øe BAE AND EATING PLANE BAE METAL ECTION A-A Øb2 2 e1 LEAD FINIH 1 N k k1 C L T10.B MIL-TD-1835 MACY1-X10 (A2) 10 LEAD METAL CAN PACKAGE INCHE MILLIMETER YMBOL MIN MAX MIN MAX NOTE A Øb Øb Øb ØD ØD ØD e BC 5.84 BC - e BC 2.92 BC - F k k L L L Q o BC 36 o BC 3 36 o BC 36 o BC 3 N Rev. 0 5/18/94 Copyright Intersil Americas LLC All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see Intersil products are manufactured, assembled and tested utilizing IO9001 quality systems as noted in the quality certifications found at Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see FN6059 Rev 2.00 Page 11 of 11