LC 2 MOS Precision 5 V Quad SPST Switches ADG661/ADG662/ADG663

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Abraham Powell
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1 a FEATURE +5 V, 5 V Power upplies Ultralow Power issipation (<0.5 W) Low Leakage (<0 pa) Low On Resistance (<50 ) Fast witching Times Low Charge Injection TTL/CMO Compatible TOP Package APPLICATION Battery Powered Instruments ingle upply ystems Remote Powered Equipment +5 V upply ystems Computer Peripherals such as isk rives Precision Instrumentation Audio and Video witching Automatic Test Equipment Precision ata Acquisition ample Hold ystems Communication ystems LC 2 MO Precision 5 V Quad PT witches AG661/AG662/AG663 IN1 IN2 IN3 IN4 FUNCTIONAL BLOCK IAGRAM AG661 IN1 IN2 IN3 IN IN1 IN2 IN3 IN4 AG663 AG WITCHE HOWN FOR A LOGIC "1" INPUT GENERAL ECRIPTION The AG661, AG662 and AG663 are monolithic CMO devices comprising four independently selectable switches. These switches feature low, well-controlled on resistance and wide analog signal range, making them ideal for precision analog signal switching. They are fabricated using Analog evices' advanced linear compatible CMO (LC 2 MO) process, which offers benefits of low leakage currents, ultralow power dissipation and low capacitance for fast switching speeds with minimum charge injection. The on resistance profile is very flat over the full analog input range ensuring excellent linearity and low distortion when switching audio signals. Fast switching speed coupled with high signal bandwidth also make the parts suitable for video signal switching. CMO construction ensures ultralow power dissipation making the parts ideally suited for portable and battery powered instruments. The AG661, AG662 and AG663 contain four independent PT switches. The AG661 and AG662 differ only in that the digital control logic is inverted. The AG661 switches are turned on with a logic low on the appropriate control input, while a logic high is required for the AG662. The AG663 has two switches with digital control logic similar to that of the AG661, while the logic is inverted on the other two switches. Each switch conducts equally well in both directions when ON and has an input signal range that extends to the supplies. In the OFF condition, signal levels up to the supplies are blocked. All switches exhibit break-before-make switching action for use in multiplexer applications. Inherent in the design is low charge injection for minimum transients when switching the digital inputs. PROUCT HIGHLIGHT V ingle upply Operation The AG661, AG662 and AG663 offer high performance, including low on resistance and wide signal range, fully specified and guaranteed with ±5 V and +5 V supply rails. 2. Ultralow Power issipation CMO construction ensures ultralow power dissipation. 3. Low R ON 4. Break-Before-Make witching This prevents channel shorting when the switches are configured as a multiplexer. REV. 0 Information furnished by Analog evices is believed to be accurate and reliable. However, no responsibility is assumed by Analog evices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog evices. One Technology Way, P.O. Box 96, Norwood, MA , U..A. Tel: 781/ World Wide Web ite: Fax: 781/ Analog evices, Inc., 1998

2 AG661/AG662/AG663 PECIFICATION 1 ual upply ( = +5 V %, = 5 V %, GN = 0 V, unless otherwise noted) B Versions Parameter +25 C 40 C to +85 C Units Test Conditions/Comments ANALOG WITCH Analog ignal Range to V R ON 30 Ω typ V = 3.5 V to +3.5 V, I = ma; Ω max = +4.5 V, = 4.5 V LEAKAGE CURRENT = +5.5 V, = 5.5 V ource OFF Leakage I (OFF) ±0.025 na typ V = ±4.5 V, V = ±4.5 V; ±0.1 ±2.5 na max Test Circuit 2 rain OFF Leakage I (OFF) ±0.025 na typ V = ±4.5 V, V = ±4.5 V; ±0.1 ±2.5 na max Test Circuit 2 Channel ON Leakage I, I (ON) ±0.05 na typ V = V = ±4.5 V; ±0.2 ±5 na max Test Circuit 3 IGITAL INPUT Input High Voltage, H 2.4 V min Input Low Voltage, L 0.8 V max Input Current I INL or I INH µa typ = L or H ±0.1 µa max YNAMIC CHARACTERITIC 2 t ON 150 ns typ R L = 300 Ω, C L = 35 pf; 275 ns max V = ±3 V; Test Circuit 4 t OFF 55 ns typ R L = 300 Ω, C L = 35 pf; 120 ns max V = ±3 V; Test Circuit 4 Break-Before-Make Time elay, t 80 ns typ R L = 300 Ω, C L = 35 pf; (AG663 Only) V 1 = V 2 = +3 V; Test Circuit 5 Charge Injection 6 pc typ V = 0 V, R = 0 Ω, C L = nf; Test Circuit 6 OFF Isolation 70 db typ R L = 50 Ω, C L = 5 pf, f = 1 MHz; Test Circuit 7 Channel-to-Channel Crosstalk 90 db typ R L = 50 Ω, C L = 5 pf, f = 1 MHz; Test Circuit 8 C (OFF) 9 pf typ f = 1 MHz C (OFF) 9 pf typ f = 1 MHz C, C (ON) 28 pf typ f = 1 MHz POWER REQUIREMENT +4.5/5.5 V min/max 4.5/5.5 V min/max I µa typ = +5.5 V, = 5.5 V 1 µa max igital Inputs = 0 V or 5 V I µa typ 1 µa max NOTE 1 Temperature ranges are as follows: B Versions, 40 C to +85 C. 2 Guaranteed by design, not subject to production test. pecifications subject to change without notice. 2 REV. 0

3 ingle upply ( = +5 V %, = 0 V, GN = 0 V, unless otherwise noted) AG661/AG662/AG663 B Versions Parameter +25 C 40 C to +85 C Units Test Conditions/Comments ANALOG WITCH Analog ignal Range 0 V to V R ON 45 Ω typ V = 0 V to +3.5 V, I = ma; Ω max = +4.5 V LEAKAGE CURRENT = +5.5 V ource OFF Leakage I (OFF) ±0.025 na typ V = 4.5 V/1 V, V = 1 V/4.5 V; ±0.1 ±2.5 na max Test Circuit 2 rain OFF Leakage I (OFF) ±0.025 na typ V = 4.5 V/1 V, V = 1 V/4.5 V; ±0.1 ±2.5 na max Test Circuit 2 Channel ON Leakage I, I (ON) ±0.05 na typ V = V = +4.5 V/+1 V; ±0.2 ±5 na max Test Circuit 3 IGITAL INPUT Input High Voltage, H 2.4 V min Input Low Voltage, L 0.8 V max Input Current I INL or I INH µa typ = L or H ±0.1 µa max YNAMIC CHARACTERITIC 2 t ON 250 ns typ R L = 300 Ω, C L = 35 pf; 400 ns max V = +2 V; Test Circuit 4 t OFF 45 ns typ R L = 300 Ω, C L = 35 pf; 0 ns max V = +2 V; Test Circuit 4 Break-Before-Make Time elay, t 140 ns typ R L = 300 Ω, C L = 35 pf; (AG663 Only) V 1 = V 2 = +2 V; Test Circuit 5 Charge Injection 12 pc typ V = 0 V, R = 0 Ω, C L = nf; Test Circuit 6 OFF Isolation 70 db typ R L = 50 Ω, C L = 5 pf, f = 1 MHz; Test Circuit 7 Channel-to-Channel Crosstalk 90 db typ R L = 50 Ω, C L = 5 pf, f = 1 MHz; Test Circuit 8 C (OFF) 9 pf typ f = 1 MHz C (OFF) 9 pf typ f = 1 MHz C, C (ON) 28 pf typ f = 1 MHz POWER REQUIREMENT +4.5/5.5 V min/max I µa typ = +5.5 V 1 µa max igital Inputs = 0 V or 5 V NOTE 1 Temperature ranges are as follows: B Versions, 40 C to +85 C. 2 Guaranteed by design, not subject to production test. pecifications subject to change without notice. REV. 0 3

4 AG661/AG662/AG663 ABOLUTE MAXIMUM RATING 1 (T A = +25 C unless otherwise noted) to V to GN V to +25 V to GN V to 25 V Analog, igital Inputs V to +2 V or 30 ma, Whichever Occurs First Continuous Current, or ma Peak Current, or ma (Pulsed at 1 ms, % uty Cycle max) Operating Temperature Range Industrial (B Version) C to +85 C torage Temperature Range C to +150 C Junction Temperature C TOP Package, Power issipation mw θ JA Thermal Impedance C/W θ JC Thermal Impedance C/W Lead Temperature, oldering Vapor Phase (60 secs) C Infrared (15 secs) C NOTE 1 tresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 2 Overvoltages at IN, or will be clamped by internal diodes. Current should be limited to the maximum ratings given. ORERING GUIE Temperature Package Package Model Range escription Option AG661BRU 40 C to +85 C 16-Lead TOP RU-16 AG662BRU 40 C to +85 C 16-Lead TOP RU-16 AG663BRU 40 C to +85 C 16-Lead TOP RU-16 CAUTION E (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AG661/AG662/AG663 features proprietary E protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper E precautions are recommended to avoid performance degradation or loss of functionality. WARNING! E ENITIVE EVICE 4 REV. 0

5 AG661/AG662/AG663 PIN CONFIGURATION IN V 4 GN IN4 8 AG661 AG662 AG663 TOP VIEW (Not to cale) 11 9 NC = NO CONNECT 16 IN NC 3 3 IN3 Table I. Truth Table (AG661/AG662) AG661 In AG662 In witch Condition 0 1 ON 1 0 OFF Table II. Truth Table (AG663) Logic witch 1, 4 witch 2, 3 0 OFF ON 1 ON OFF TERMINOLOGY Most positive power supply potential. Most negative power supply potential in dual supplies. In single supply applications, it may be connected to GN. GN Ground (0 V) Reference. ource Terminal. May be an input or output. rain Terminal. May be an input or output. IN Logic Control Input. R ON Ohmic resistance between and. I (OFF) ource leakage current with the switch OFF. I (OFF) rain leakage current with the switch OFF. I, I (ON) Channel leakage current with the switch ON. V (V ) Analog voltage on terminals,. C (OFF) OFF witch ource Capacitance. C (OFF) OFF witch rain Capacitance. C, C (ON) ON witch Capacitance. t ON elay between applying the digital control input and the output switching on. t OFF elay between applying the digital control input and the output switching off. t OFF time or ON time measured between the 90% points of both switches, when switching from one address state to another. Crosstalk A measure of unwanted signal which is coupled through from one channel to another as a result of parasitic capacitance. Off Isolation A measure of unwanted signal coupling through an OFF switch. Charge A measure of the glitch impulse transferred Injection from the digital input to analog output during switching. REV. 0 5

6 AG661/AG662/AG663 Typical Performance Characteristics T A = +25 C = +5V = 5V T A = +25 C R ON = +5V = 5V R ON C +25 C R ON = +5V = 0V V OR V RAIN OR OURCE VOLTAGE V Figure 1. On Resistance as a Function of V (V ) ual upplies V OR V RAIN OR OURCE VOLTAGE V Figure 2. On Resistance as a Function of V (V ) for ifferent Temperatures V OR V RAIN OR OURCE VOLTAGE V Figure 3. On Resistance as a Function of V (V ) ingle upply I UPPLY ma 1mA 0 A A 1 A 0nA na = +5V = 5V 4 W I, I+ 1 W 0 1k k 0k 1M FREQUENCY Hz M Figure 4. upply Current vs. Input witching Frequency LEAKAGE CURRENT na = +5V = 5V V = 5V V = 5V 35 I (OFF) I (OFF) I (ON) TEMPERATURE C Figure 5. Leakage Currents as a Function of Temperature 95 5 OFF IOLATION db = +5V = 5V k k 0k 1M M FREQUENCY Hz Figure 6. Off Isolation vs. Frequency LEAKAGE CURRENT na = +5V = 5V T A = +25 C I (ON) I (OFF) I (OFF) CROTALK db = +5V = 5V V OR V RAIN OR OURCE VOLTAGE Figure 7. Leakage Currents as a Function of V (V ) k k 0k 1M M FREQUENCY Hz Figure 8. Crosstalk vs. Frequency 6 REV. 0

7 AG661/AG662/AG663 Test Circuits I V1 I (OFF) A I (OFF) A I (ON) A V V V V V R ON = V1/I 1. On Resistance 2. Off Leakage 3. On Leakage 3V AG661 50% 50% 3V V IN R L 300 C L 35pF AG662 50% 50% 90% 90% GN t ON t OFF 4. witching Times 3V V 1 V R L1 300 C L1 35pF 1 1 0V 0V 50% 50% 90% 90% IN1, IN2 R L2 300 C L2 35pF GN 2 0V 90% 90% t t 5. Break-Before-Make Time elay 3V R V IN C L nf GN Q INJ = C L 6. Charge Injection REV. 0 7

8 AG661/AG662/AG663 Test Circuits (Continued) GN 7. Off Isolation 50 R L 50 APPLICATION Figure 9 illustrates a precise, sample-and-hold circuit. An A845 is used as the input buffer while the output operational amplifier is an OP07. uring the track mode, W1 is closed and the output follows the input signal. In the hold mode, W1 is opened and the signal is held by the hold capacitor C H. ue to switch and capacitor leakage, the voltage on the hold capacitor will decrease with time. The AG661/AG662/ AG663 minimizes this droop due to its low leakage specifications. The droop rate is further minimized by the use of a polystyrene hold capacitor. The droop rate for the circuit shown is typically 15 µv/µs. A second switch W2, which operates in parallel with W1, is included in this circuit to reduce pedestal error. ince both switches will be at the same potential, they will have a differential effect on the op amp OP07 which will minimize charge injection effects. Pedestal error is also reduced by the compensation network R C and C C. This compensation network also reduces the hold time glitch while optimizing the acquisition time. Using the illustrated op amps and component values, the pedestal error has a maximum value of 5 mv over the ±3 V input range. The acquisition time is 2.5 ms while the settling time is 1.85 µs. C /98 V R L 50 1 GN 2 NC CHANNEL TO CHANNEL CROTALK = 20 LOG V / 8. Channel-to-Channel Crosstalk +5V A845 5V W1 W2 +5V AG661 AG662 AG663 R C pF C C 00pF C H 2200pF +5V OP07 5V 5V Figure 9. Accurate ample-and-hold OUTLINE IMENION imensions shown in inches and (mm). 16-Lead TOP (RU-16) (4.50) (4.30) (5.) (4.90) (6.50) (6.25) PRINTE IN U..A (0.15) (0.05) EATING PLANE PIN (0.65) BC (0.30) (0.19) (1.) MAX (0.20) (0.090) (0.70) (0.50) 8 REV. 0

LC2 MOS Precision 5 V/3 V Quad SPST Switches ADG511/ADG512/ADG513

LC2 MOS Precision 5 V/3 V Quad SPST Switches ADG511/ADG512/ADG513 a FEATURE +3 V, +5 V or 5 V Power upplies Ultralow Power issipation (