Octal, RS-232/RS-423 Line Driver ADM5170

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1 a FEATURES Eight Single Ended Line Drivers in One Package Meets EIA Standard RS-3E, RS-3A and CCITT V./X. Resistor Programmable Slew Rate Wide Supply Voltage Range Low Power CMOS 3-State Outputs TTL/CMOS Compatible Inputs Output Short Circuit Protection Available in -Lead PLCC Low Power Replacement for UC7C Octal, RS-3/RS-3 Line Driver ADM7 FUNCTIONAL BLOCK DIAGRAM ADM7 A I A A O B I B B O C I C C O APPLICATIONS High Speed Communication Computer I-O Ports Peripherals High Speed Modems Printers Logic Level Translation D I E I D E D O E O F I F F O GERAL DESCRIPTION The ADM7 is an octal line driver suitable for digital communication systems with data rates up to kb/s. Input TTL or CMOS signal levels are inverted and translated into either EIA RS-3E or RS-3A signal levels depending on the status of the Mode Select inputs MS+ and MS. With both Mode Select inputs at GND, RS-3 operation is selected while with MS+ connected to V DD and MS connected to V SS, RS-3 operation is selected. The output slew rates may be controlled using an external resistor connected between the SRA (Slew Rate Adjust) pin and GND. Resistor values between kω and kω may be selected giving a slew rate which can be adjusted from V/µs to. V/µs. This adjustment of the slew rate allows tailoring of the output characteristics to suit the interface cable being used. The outputs may be disabled using the (Enable Input). This feature permits sharing of a common output line. The ADM7 is fabricated on an advanced CMOS process featuring low power consumption. In the disabled state the power consumption reduces from mw to mw. The ADM7 is available in a -lead PLCC package. G I H I MS+ MS SRA Truth Table Inputs Outputs Data EIA RS-3E RS-3A (V DD 3 V) V to V (V SS 3 V) V to V X High Z High Z Minimum Output Level G H RS-3/RS-3 MODE SELECT SLEW RATE CONTROL G O H O Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9, Norwood. MA -9, U.S.A Tel: Analog Devices, Inc. All rights reserved. Technical Support

2 ADM7 SPECIFICATIONS Parameter Min Typ Max Units Test Conditions/Comments POWER REQUIREMTS V DD Range 9 V V SS Range 9 V I DD (Disabled) ma = High, I DD (Enabled) 3 ma R L =, = V I SS (Disabled) ma = High I SS (Enabled) 3 3 ma R L =, = V DIGITAL INPUTS Input Logic Threshold High, V INH. V Input Logic Threshold Low, V INL. V Input Clamp Voltage, V INK.. V I IN = ma Input High Level Current, I INH µa V INH =. V Input Low Level Current, I INL µa V INL =. V OUTPUTS RS-3A Outputs =. V, MS+ = MS = V High Level Output Voltage..3. V R L =, V IN =. V..3. V R L = 3 kω, V IN =. V... V R L = Ω, V IN =. V Low Level Output Voltage..3. V R L =, V IN =. V... V R L = 3 kω, V IN =. V... V R L = Ω, V IN =. V Output Balance, V BAL.. V R L = Ω, V BAL = V OH V OL RS-3 Outputs =. V, MS+ = V DD, MS = V SS High Level Output Voltage V DD V R L =, V IN =. V V DD V R L = 3 kω, V IN =. V Low Level Output Voltage V SS V R L =, V IN =. V V SS V R L = 3 kω, V IN =. V Off-State Output Current, I OZ µa =. V, V O = ± V, V DD = V, V SS = V Short Circuit Current, I OS ma V IN = V, = V ma V IN = V, = V Specifications subject to change without notice. ( V DD = + V ± %, V SS = V ± % V, MS+ = MS = V, R SRA = kω. All Specifications T MIN to T MAX unless otherwise noted.) TIMING CHARACTERISTICS ( V DD = + V ± %, V SS = V ± %, MS+ = MS = V. All Specifications T MIN to T MAX unless otherwise noted.) Parameter Min Typ Max Units Test Conditions/Comments Output Slew Rate Fig, Fig. R SRA = kω, R L = Ω, C L = pf. V/µs Rising/Falling Edge, t R, t F Output Slew Rate Fig, Fig. R SRA = kω, R L = Ω, C L = pf V/µs Rising/Falling Edge, t R, t F Output to Hi-Z Propagation Delay (Disable) Fig, Fig 3. R SRA = kω, R L = Ω, C L = pf.3. µs t HZ.. µs t LZ Hi-Z to Valid Output Propagation Delay (Enable) Fig, Fig 3. R SRA = kω, R L = Ω, C L = pf. µs t ZH 7. µs t ZL Specifications subject to change without notice.

3 ADM7 ABSOLUTE MAXIMUM RATINGS* (T A = C unless otherwise noted) V DD V V SS V Input Voltages V IN to (V DD +.3 V) Ouput Voltages V OUT V to + V Output Short Circuit Duration Continuous Power Dissipation PLCC mw (Derate at mw/ C above + C) θ JA, Thermal Impedance C/W Operating Temperature Range Industrial (A Version) C to + C Lead Temperature (Soldering sec) C Vapour Phase ( sec) C Infrared ( sec) C *This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADM7 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SSITIVE DEVICE V IN INPUT.V.V R L C L.V MS+ MS RS-3/RS-3 MODE SELECT V OH OUTPUT V IN = V 9% SRA SLEW RATE CONTROL t HZ t ZH Figure. Timing Test Circuit OUTPUT V IN = V.V 9% V OL t LZ t ZL V IN t F t R Figure 3. Enable/Disable Timing Waveforms % 9% V OUT 9% % Figure. Rise/Fall Timing Waveforms 3

4 SRA NC NC NC MS GND ADM7 Mnemonic B O C O C I 7 D I D O 9 V SS PIN CONFIGURATION NC = NO CONNECT PIN FUNCTION DESCRIPTION Function PLCC B I A I A O NC NC H O 3 3 H I G I G O F O 3 F I E I E O V DD 9 MS+ V DD Power Supply Input, + V ± %. V SS Power Supply Input, V ± %. GND Ground Pin. Must be connected to V. A I...H I Digital Input to Drivers A to H. A O...H O RS-3/RS-3 Output from Drivers A to H. Enable Pin. When high, all outputs are 3-stated. MS+, MS Mode Select Inputs. Used to control the output level swing. With MS+ & MS connected to GND, RS-3A output levels are selected. With MS+ connected to V DD and MS connected to V SS, RS-3 output levels are developed. SRA Slew Rate Adjust Input. An external resistor ( kω to kω) connected between this pin and GND is used to control the Output Slew Rate ( V/µs to. V/µs). ADM7 TOP VIEW (Not to Scale) 7 7 Slew Rate Programming The slew rate for the ADM7 is controlled by a single resistor connected between the SRA pin and GND. The slew rate is approximately. Slew Rate (V/µs) = /R SRA (kω) Resistors between kω and kω may be used providing a slew rate which may be varied from V/µs to. V/µs. Figure in the Typical Performance Characteristics section shows how the slew rate varies with R SRA while Figure shows how the transition time (% to 9%) varies with R SRA. Waveshaping of the output allows the user to control the level of interference (near-end crosstalk) which may be coupled to adjacent circuits in an interconnection. The recommended output characteristics for cable length and data rate are given in the EIA RS-3A specifications. Maximum Data Rate (kb/s) = 3/t (for rates from kb/s to kb/s). Cable Length (feet) = X t (Max Length = ft.) where t is the transition time (in µs) for the output to swing from % to 9% of its steady state values. The absolute maximum data rate is kb/s and the maximum cable length is limited to ft. Output Mode Programming The ADM7 has two programmable output modes which provide different output voltage levels. The low output mode meets the specifications of EIA standards RS-3A while the high output mode meets the RS-3 specifications. The high output mode provides greater output swings and is suitable for driving lines where higher attenuation levels must be tolerated. This mode is selected by connecting the mode select pins to the supplies, MS+ to V DD and MS to V SS. The low output mode is selected by connecting both mode select pins MS+ and MS to GND. This mode provides a controlled output swing with lower output levels. Inputs Outputs MS+ MS Data Output GND GND V to V (RS-3) GND GND V to V (RS-3) V DD V SS (V DD 3 V) (RS-3) V DD V SS (V SS + 3 V) (RS-3) X X X High Z Minimum Output Level. Typical Application Circuit A typical application circuit using a single driver in the ADM7 is shown in Figure. This circuit is suitable for either RS-3 or RS-3 communication. An ADM octal receiver is used to translate the signal back to CMOS logic level at the receiving end. V H V L INPUT R SL / ADM7 V SS V DD +V V RS-3/RS-A TRANSMISSION V H V L / ADM TIE TO GND FOR RS-3 Figure. RS-3/RS-3A Typical Application Circuit

5 DRIVER OUTPUT VOLTAGE V DRIVER OUTPUT VOLTAGE V SLEW RATE V/µs TRANSITION TIME µs Typical Performance Characteristics ADM7 t r 3 t f t f t r ΩR SRA kω ΩR SRA kω Figure. Typical Slew Rate vs. R SRA Figure. Typical Rise/Fall Times (RS-3A Mode) vs. R SRA A V A V 9 9 % % V V µs V V µs Figure. Slew Rate (R SRA = kω) Figure 9. Slew Rate (R SRA = kω). 3 V OH / V OL (R L = ). V OL (R L = ) V OH (R L = ). ΩV OL (R L = 3kΩ) V OL (R L = Ω).3 9 ΩV OH (R L = 3kΩ). ΩV OH (R L = Ω) 7 9 V DD / V SS V V DD / V SS V Figure 7. V OH /V OL vs. V DD /V SS (RS-3 Mode) Figure. V OH /V OL vs. V DD /V SS (RS-3 Mode)

6 DRIVER OUTPUT VOLTAGE V DRIVER OUTPUT VOLTAGE V ADM7 V OH V OL V OL V OH 3 OUTPUT CURRT ma OUTPUT CURRT ma Figure. Driver Output Voltage vs. Output Current (RS-3 Mode) Figure. Driver Output Voltage vs. Output Current (RS-3 Mode)

7 Data Sheet ADM7 OUTLINE DIMSIONS. (.). (.7). (.). (.7) PIN IDTIFIER TOP VIEW (PINS DOWN) 9. (.) SQ. (.3).9 (.7). (.3) SQ. (.). (.7). (.7) BSC. (3.).9 (.9). (.7). (.9). (.) MIN. (.3).3 (.33).3 (.). (.). (.). (.) R.3 (.9).39 (9.9) BOTTOM VIEW (PINS UP) COMPLIANT TO JEDEC STANDARDS MO-7-AB CONTROLLING DIMSIONS ARE IN INCHES; MILLIMETER DIMSIONS (IN PARTHESES) ARE ROUNDED-OFF INCH EQUIVALTS FOR REFERCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 3. -Lead Plastic Leaded Chip Carrier [PLCC] (P-) Dimensions shown in inches and (millimeters) ORDERING GUIDE Model Temperature Range Package Description Package Option ADM7APZ C to + C -Lead Plastic Leaded Chip Carrier [PLCC] P- ADM7APZ-REEL C to + C -Lead Plastic Leaded Chip Carrier [PLCC], 3 Reel P- Z = RoHS Compliant Part. -A REVISION HISTORY 9/7 Rev. to Rev. A Deleted -Lead Plastic DIP Package... Universal Changes to Features Section and General Description Section.. Changes to Absolute Maximum Ratings Table... 3 Deleted DIP Pin Configuration Figure... Moved Ordering Guide... 7 Updated Outline Dimensions... 7 Changes to Ordering Guide... 7 /993 Revision : Initial Version Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D3--/7(A) Rev. A Page 7 of 7

Octal, RS-232/RS-423 Line Driver ADM5170

Octal, RS-232/RS-423 Line Driver ADM5170 a FEATURES Eight Single Ended Line Drivers in One Package Meets EIA Standard RS-3E, RS-3A and CCITT V./X. Resistor Programmable Slew Rate Wide Supply Voltage Range Low Power CMOS 3-State Outputs TTL/CMOS