Low Capacitance, Low Charge Injection, ±15 V/+12 V icmos Dual SPST Switches ADG1221/ADG1222/ADG1223

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1 Data Sheet Low Capacitance, Low Charge Injection, ±15 V/+12 V icmos Dual SPST Switches ADG1221/ADG1222/ADG1223 FEATURES <.5 pc charge injection over full signal range Off capacitance: 2 pf Off leakage: 2 pa Supply range: 33 V On resistance: 12 Ω Fully specified at ±15 V, +12 V No VL supply required 3 V logic-compatible inputs Rail-to-rail operation 1-lead MSOP package APPLICATIONS Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Audio signal routing Video signal routing Communication systems GENERAL DESCRIPTION The ADG1221/ADG1222/ADG1223 are monolithic, complementary metal-oxide semiconductor (CMOS) devices containing four independently selectable switches designed on an icmos (industrial CMOS) process. icmos is a modular manufacturing process combining high voltage CMOS and bipolar technologies. It enables the development of a wide range of high performance analog ICs, capable of 33 V operation, in a footprint that no previous generation of high voltage parts has been able to achieve. Unlike analog ICs using conventional CMOS processes, icmos components can tolerate high supply voltages while providing increased performance, dramatically lower power consumption, and reduced package size. The ultralow capacitance and exceptionally low charge injection of these switches make them ideal solutions for data acquisition and sample-and-hold applications, where low glitch and fast settling are required. Figure 2 shows that there is minimum charge injection over the full signal range of the device. The ADG1221/ADG1222/ADG1223 contain two independent single-pole/single-throw (SPST) switches. The ADG1221 and ADG1222 differ only in that the digital control logic is inverted. The ADG1221 switches are turned on with Logic 1 on the appropriate control input, and Logic is required for the S1 D1 IN2 ADG1221 FUNCTIONAL BLOCK DIAGRAM S1 D1 IN2 IN1 D2 S2 ADG1223 S1 D1 IN2 ADG1222 IN1 D2 S2 SWITCHES SHOWN FOR A LOGIC INPUT Figure 1. ADG1222. The ADG1223 has one switch with digital control logic similar to that of the ADG1221; the logic is inverted on the other switch. The ADG1223 exhibits break-before-make switching action for use in multiplexer applications. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. CHARGE INJECTION (pc) S = 15V V DD = +5V S = 5V V DD = 12V S = V INPUT VOLTAGE (V) Figure 2. Charge Injection vs. Input Voltage IN1 D2 S Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 916, Norwood, MA , U.S.A. Tel: Analog Devices, Inc. All rights reserved. Technical Support

2 ADG1221/ADG1222/ADG1223 TABLE OF CONTENTS Features... 1 Applications... 1 Functional Block Diagram... 1 General Description... 1 Revision History... 2 Specifications... 3 Dual Supply... 3 Single Supply... 4 Data Sheet Thermal Resistance...6 ESD Caution...6 Pin Configuration and Function Descriptions...7 Terminology...8 Typical Performance Characteristics...9 Test Circuits Outline Dimensions Ordering Guide Absolute Maximum Ratings... 6 REVISION HISTORY 9/217 Rev. A to Rev. B Change to Features Section /29 Rev. to Rev. A Changes to Power Requirements, IDD, Digital Inputs = 5 V Parameter, Table Changes to ton Parameter and Power Requirements, IDD, Digital Inputs = 5 V Parameter, Table /27 Rev. : Initial Version Rev. B Page 2 of 16

3 Data Sheet ADG1221/ADG1222/ADG1223 SPECIFICATIONS DUAL SUPPLY VDD = 15 V ± 1%, VSS = 15 V ± 1%, GND = V, unless otherwise noted. Table 1. Temperature Parameter 25 C 4 C to +85 C 4 C to +125 C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range VDD to VSS V On Resistance, RON VDD = V, VSS = 13.5 V, VS = ±1 V, IS = 1 ma (see Figure 23) 12 Ω typ Ω max On Resistance Match VS = ±1 V, IS = 1 ma Between Channels, RON 2.5 Ω typ Ω max On Resistance Flatness, RFLAT(ON) VS = 5 V/ V/+5 V; IS = 1 ma 2 Ω typ Ω max LEAKAGE CURRENTS VDD = V, VSS = 16.5 V Source Off Leakage, IS (Off) VS = ±1 V, VD = ±1 V (see Figure 24) ±.2 na typ ±.1 ±.6 ±1 na max Drain Off Leakage, ID (Off) VS = ±1 V, VD = ±1 V (see Figure 24) ±.2 na typ ±.1 ±.6 ±1 na max Channel On Leakage, ID, IS (On) VS = VD = ±1 V (see Figure 25) ±.1 na typ ±.2 ±.6 ±1 na max DIGITAL INPUTS Input High Voltage, VINH 2. V min Input Low Voltage, VINL.8 V max Input Current, IINL or IINH VIN = VINL or VINH.5 μa typ ±.1 μa max Digital Input Capacitance, CIN 2.5 pf typ DYNAMIC CHARACTERISTICS 1 ton toff Break-Before-Make Time Delay (ADG1223 Only), tbbm 13 ns typ ns max 85 ns typ ns max RL = 3 Ω, CL = 35 pf, VS = 1 V (see Figure 26) RL = 3 Ω, CL = 35 pf, VS = 1 V (see Figure 26) RL = 3 Ω, CL = 35 pf, VS1 = VS2 = 1 V (see Figure 27) 4 ns typ 1 ns min Charge Injection, QINJ.1 pc typ VS = V, RS = Ω, CL = 1 nf (see Figure 28) Off Isolation 75 db typ RL = 5 Ω, CL = 1 pf, f = 1 MHz (see Figure 29) Rev. B Page 3 of 16

4 ADG1221/ADG1222/ADG1223 Data Sheet Temperature Parameter 25 C 4 C to +85 C 4 C to +125 C Unit Test Conditions/Comments Channel-to-Channel Crosstalk 9 db typ RL = 5 Ω, CL = 1 pf, f = 1 MHz (see Figure 3) Total Harmonic.15 % typ RL = 1 kω, 5 V rms, f = 2 Hz to 2 khz Distortion + Noise, THD + N 3 db Bandwidth 96 MHz typ RL = 5 Ω, CL = 1 pf (see Figure 31) CS (Off) VS = V, f = 1 MHz 1.7 pf typ 2.2 pf max CD (Off) VS = V, f = 1 MHz 1.7 pf typ 2.2 pf max CD, CS (On) VS = V, f = 1 MHz 3 pf typ 4 pf max POWER REQUIREMENTS VDD = V, VSS = 16.5 V IDD.1 μa typ Digital inputs = V or VDD 1. μa max Digital inputs = V or VDD 14 μa typ Digital inputs = 5 V 19 μa max Digital inputs = 5 V ISS Digital inputs = V, 5 V, or VDD.1 μa typ 1. μa max VDD/VSS ±5/±16.5 V min/max GND = V 1 Guaranteed by design, not subject to production test. SINGLE SUPPLY VDD = 12 V ± 1%, VSS = V, GND = V, unless otherwise noted. Table 2. Temperature Parameter 25 C 4 C to +85 C 4 C to +125 C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range V to VDD V On Resistance, RON VDD = 1.8 V, VSS = V, VS = V to 1 V, IS = 1 ma (see Figure 23) 3 Ω typ Ω max On Resistance Match VS = V to 1 V, IS = 1 ma Between Channels, RON 4.5 Ω typ Ω max On Resistance Flatness, RFLAT(ON) 6 Ω typ VS = 3 V/6 V/9 V, IS = 1 ma LEAKAGE CURRENTS VDD = 13.2 V, VSS = V Source Off Leakage, IS (Off) VS = 1 V/1 V, VD = 1 V/1 V (see Figure 24) ±.2 na typ ±.1 ±.6 ±1 na max Rev. B Page 4 of 16

5 Data Sheet ADG1221/ADG1222/ADG1223 Temperature Parameter 25 C 4 C to +85 C 4 C to +125 C Unit Test Conditions/Comments Drain Off Leakage, ID (Off) VS = 1 V/1 V, VD = 1 V/1 V (see Figure 24) ±.2 na typ ±.1 ±.6 ±1 na max Channel On Leakage, ID, IS (On) VS = VD = 1 V or 1 V (see Figure 25) ±.1 na typ ±.2 ±.6 ±1 na max DIGITAL INPUTS Input High Voltage, VINH 2. V min Input Low Voltage, VINL.8 V max Input Current, IINL or IINH VIN = VINL or VINH.1 μa typ ±.1 μa max Digital Input Capacitance, CIN 3 pf typ DYNAMIC CHARACTERISTICS 1 ton toff Break-Before-Make Time Delay (ADG1223 Only), tbbm 19 ns typ ns max 12 ns typ ns max RL = 3 Ω, CL = 35 pf, VS = 8 V (see Figure 26) RL = 3 Ω, CL = 35 pf, VS = 8 V (see Figure 26) RL = 3 Ω, CL = 35 pf, VS1 = VS2 = 8 V (see Figure 27) 7 ns typ 1 ns min Charge Injection, QINJ.2 pc typ VS = 6 V, RS = Ω, CL = 1 nf (see Figure 28) Off Isolation 75 db typ RL = 5 Ω, CL =1 pf, f = 1 MHz (see Figure 29) Channel-to-Channel Crosstalk 9 db typ RL = 5 Ω, CL = 1 pf, f = 1 MHz (see Figure 3) 3 db Bandwidth 55 MHz typ RL = 5 Ω, CL = 1 pf (see Figure 31) CS (Off) VS = 6 V, f = 1 MHz 2.1 pf typ 2.6 pf max CD (Off) VS = 6 V, f = 1 MHz 2.1 pf typ 2.6 pf max CD, CS (On) VS = 6 V, f = 1 MHz 3.8 pf typ 4.6 pf max POWER REQUIREMENTS VDD = 13.2 V IDD.1 μa typ Digital inputs = V or VDD 1. μa max Digital inputs = V or VDD 14 μa typ Digital inputs = 5 V 19 μa max Digital inputs = 5 V VDD 5/16.5 V min/max VSS = V, GND = V 1 Guaranteed by design, not subject to production test. Rev. B Page 5 of 16

6 ADG1221/ADG1222/ADG1223 ABSOLUTE MAXIMUM RATINGS TA = 25 C, unless otherwise noted. Table 3. Parameter Rating VDD to VSS 35 V VDD to GND.3 V to +25 V VSS to GND +.3 V to 25 V Analog Inputs 1 VSS.3 V to VDD +.3 V or 3 ma, whichever occurs first Digital Inputs 1 GND.3 V to VDD +.3 V or 3 ma, whichever occurs first Peak Current, S or D 1 ma (pulsed at 1 ms, 1% duty cycle max) Continuous Current per 3 ma Channel, S or D Operating Temperature Range 4 C to +125 C Storage Temperature Range 65 C to +15 C Junction Temperature 15 C Reflow Soldering Peak 26 C Temperature, Pb free THERMAL RESISTANCE Data Sheet θja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 4. Thermal Resistance Package Type θja θjc Unit 1-Lead MSOP (4-Layer Board) C/W ESD CAUTION 1 Overvoltages at IN, S, or D are clamped by internal diodes. Current must be limited to the maximum ratings given. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. B Page 6 of 16

7 Data Sheet ADG1221/ADG1222/ADG1223 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS IN1 1 S1 2 D1 3 ADG1221/ ADG1222/ ADG IN2 9 8 V DD GND D2 4 7 NC S2 5 TOP VIEW (Not to Scale) 6 S NC = NO CONNECT Figure 3. 1-Lead MSOP Pin Configuration Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 IN1 Logic Control Input. 2 S1 Source Terminal. Can be an input or output. 3 D1 Drain Terminal. Can be an input or output. 4 D2 Drain Terminal. Can be an input or output. 5 S2 Source Terminal. Can be an input or output. 6 VSS Most Negative Power Supply Potential. 7 NC No Connect. 8 GND Ground ( V) Reference. 9 VDD Most Positive Power Supply Potential. 1 IN2 Logic Control Input. Table 6. ADG1221/ADG1222 Truth Table ADG1221 INx ADG1222 INx Switch Condition 1 On 1 Off Table 7. ADG1223 Truth Table ADG1223 INx Switch 1 Condition Switch 2 Condition Off On 1 On Off Rev. B Page 7 of 16

8 ADG1221/ADG1222/ADG1223 Data Sheet TERMINOLOGY IDD The positive supply current. ISS The negative supply current. VD (VS) The analog voltage on Terminal D and Terminal S. RON The ohmic resistance between Terminal D and Terminal S. RFLAT(ON) Flatness is defined as the difference between the maximum and minimum value of on resistance, as measured over the specified analog signal range. IS (Off) The source leakage current with the switch off. ID (Off) The drain leakage current with the switch off. ID, IS (On) The channel leakage current with the switch on. VINL The maximum input voltage for Logic. VINH The minimum input voltage for Logic 1. IINL (IINH) The input current of the digital input. CS (Off) The off switch source capacitance, measured with reference to ground. CD (Off) The off switch drain capacitance, measured with reference to ground. CD, CS (On) The on switch capacitance, measured with reference to ground. ton The delay between applying the digital control input and the output switching on (see Figure 26). toff The delay between applying the digital control input and the output switching off (see Figure 26). tbbm Off time or on time measured between the 9% points of both switches, when switching from one address state to another (ADG1223 only). QINJ (Charge Injection) A measure of the glitch impulse transferred from the digital input to the analog output during switching. Off Isolation A measure of unwanted signal coupling through an off switch. Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. 3 db Bandwidth The frequency at which the output is attenuated by 3 db. On Response The frequency response of the on switch. Insertion Loss The loss due to the on resistance of the switch. THD + N (Total Harmonic Noise Plus Distortion) The ratio of the harmonic amplitude plus noise of the signal to the fundamental. ACPSRR (AC Power Supply Rejection Ratio) Measures the ability of a part to avoid coupling noise and spurious signals that appear on the supply voltage pin to the output of the switch. The dc voltage on the device is modulated by a sine wave of.62 V p-p. The ratio of the amplitude of signal on the output to the amplitude of the modulation is the ACPSRR. CIN The digital input capacitance. Rev. B Page 8 of 16

9 Data Sheet ADG1221/ADG1222/ADG1223 TYPICAL PERFORMANCE CHARACTERISTICS ON RESISTANCE (Ω) T A = 25 C V DD = +13.5V S = 13.5V S = 15V V DD = +16.5V S = 16.5V ON RESISTANCE (Ω) S = 15V T A = 4 C T A = +125 C T A = +85 C T A = +25 C SOURCE OR DRAIN VOLTAGE (V) SOURCE OR DRAIN VOLTAGE (V) Figure 4. On Resistance as a Function of VS (VD), Dual Supply Figure 7. On Resistance as a Function of VS (VD) for Different Temperatures, Dual Supply ON RESISTANCE (Ω) T A = 25 C V DD = +5.5V S = 5.5V SOURCE OR DRAIN VOLTAGE (V) ON RESISTANCE (Ω) V DD = 12V S = V T A = +85 C T A = 4 C T A = +25 C T A = +125 C SOURCE OR DRAIN VOLTAGE (V) Figure 5. On Resistance as a Function of VS (VD), Dual Supply Figure 8. On Resistance as a Function of VS (VD) for Different Temperatures, Single Supply ON RESISTANCE (Ω) T A = 25 C V DD = 1.8V S = V V DD = 13.2V S = V V DD = 12V S = V SOURCE OR DRAIN VOLTAGE (V) Figure 6. On Resistance as a Function of VS (VD), Single Supply LEAKAGE CURRENT (pa) S = 15V V BIAS = ±1V 3 35 I S (OFF) + I D (OFF) + I S (OFF) + I D (OFF) + 4 I D, I S (ON) + + I D, I S (ON) TEMPERATURE (ºC) Figure 9. Leakage Current as a Function of Temperature, Dual Supply Rev. B Page 9 of 16

10 ADG1221/ADG1222/ADG1223 Data Sheet LEAKAGE CURRENT (pa) V DD = +5V S = 5V V BIAS = ±4.5V I S (OFF) + I D (OFF) + 2 I S (OFF) + I D (OFF) + I D, I S (ON) + + I D, I S (ON) TEMPERATURE (ºC) Figure 1. Leakage Current as a Function of Temperature, Dual Supply CHARGE INJECTION (pc) S = 15V V DD = +5V S = 5V V DD = 12V S = V INPUT VOLTAGE (V) Figure 13. Charge Injection vs. Input Voltage LEAKAGE CURRENT (pa) 3 25 V DD = 12V S = V 2 V BIAS = 1/1V I S (OFF) + I D (OFF) + 15 I S (OFF) + I D (OFF) + I D, I S (ON) + + I D, I S (ON) TEMPERATURE (ºC) Figure 11. Leakage Current as a Function of Temperature, Single Supply TIME (ns) V DS t OFF 15V DS t ON 12S t OFF 12S t ON TEMPERATURE (ºC) Figure 14. ton/toff vs. Temperature I DD PER CHANNEL 1 2 S = 15V I DD (µa) S = 15V ISOLATION (db) V DD = 12V S = V LOGIC LEVEL, INx (V) k 1k 1M 1M 1M FREQUENCY (Hz) G Figure 12. IDD vs. Logic Level Figure 15. Off Isolation vs. Frequency Rev. B Page 1 of 16

11 Data Sheet ADG1221/ADG1222/ADG S = 15V 1 2 S = 15V Vp-p =.63V NO DECOUPLING CAPS ON CROSSTALK (db) PSRR (db) DECOUPLING CAPS ON k 1k 1M 1M 1M FREQUENCY (Hz) G k 1M 1M FREQUENCY (Hz) M Figure 16. Crosstalk vs. Frequency Figure 18. ACPSRR vs. Frequency 2 4 S = 15V 1 LOAD = 1kΩ T A = 25 C 6 INSERTION LOSS (db) THD + N (%) 1.1 V DD = +5V, S = 5V, = +3.5V rms, S = 15V, = +5V rms k 1k 1M 1M 1M 1M FREQUENCY (Hz) G k 1k 1k FREQUENCY (Hz) Figure 17. Insertion Loss vs. Frequency Figure 19. THD + N vs. Frequency Rev. B Page 11 of 16

12 ADG1221/ADG1222/ADG1223 Data Sheet CAPACITANCE (pf) CAPACITANCE (pf) SOURCE OFF.5 S = 15V DRAIN OFF SOURCE/DRAIN ON V DD = +5V SOURCE OFF.5 S = 5V DRAIN OFF SOURCE/DRAIN ON BIAS VOLTAGE (V) BIAS VOLTAGE (V) Figure 2. Capacitance vs. Bias Voltage Figure 22. Capacitance vs. Bias Voltage CAPACITANCE (pf) V DD = 12V SOURCE OFF.5 S = V DRAIN OFF SOURCE/DRAIN ON BIAS VOLTAGE (V) Figure 21. Capacitance vs. Bias Voltage Rev. B Page 12 of 16

13 Data Sheet ADG1221/ADG1222/ADG1223 TEST CIRCUITS I S (OFF) A Sx I D (OFF) A I DS V D V1 Figure 24. Test Circuit 2 Off Leakage Sx NC Sx I D (ON) A R ON = V1/I DS Figure 23. Test Circuit 1 On Resistance V D NC = NO CONNECT Figure 25. Test Circuit 3 On Leakage DD S.1µFV.1µF V DD S V IN ADG1222 5% 5% INx Sx ADG1221/ ADG1222 R L 3Ω V OUT C L 35pF V IN V OUT ADG1221 5% 5% 9% 9% GND t ON t OFF Figure 26. Test Circuit 4 Switching Times DD S.1µFV.1µF V IN V 5% 5% V DD S 1 S1 D1 2 IN1, IN2 S2 D2 ADG1223 GND R L 3Ω V OUT2 C L 35pF R L 3Ω C L 35pF V OUT1 V OUT1 V OUT2 V V 9% t D 9% 9% t D 9% Figure 27. Test Circuit 5 Break-Before-Make Time Delay V DD S R S V DD Sx S V OUT V IN ADG1222 ON OFF INx GND ADG1221/ ADG1222 C L 1nF V IN V OUT ADG1221 Q INJ = C L V OUT V OUT Figure 28. Test Circuit 6 Charge Injection Rev. B Page 13 of 16

14 ADG1221/ADG1222/ADG1223 Data Sheet V IN INx DD S.1µFV.1µF V DD Sx S ADG1221/ADG1222/ ADG1223 GND 5Ω NETWORK ANALYZER 5Ω R L 5Ω V OUT V IN INx DD S.1µFV.1µF GND V DD Sx S ADG1221/ADG1222/ ADG1223 NETWORK ANALYZER 5Ω R L 5Ω V OUT OFF ISOLATION = 2 LOG V OUT INSERTION LOSS = 2 LOG V OUT WITH SWITCH V OUT WITHOUT SWITCH Figure 29. Test Circuit 7 Off Isolation Figure 31. Test Circuit 9 Bandwidth DD S.1µFV.1µF NETWORK ANALYZER V OUT R L 5Ω V DD S1 S2 S 5Ω DD S.1µFV.1µF V DD S AUDIO PRECISION R S 5Ω ADG1221/ADG1222/ GND ADG1223 INx Sx V p-p CHANNEL-TO-CHANNEL CROSSTALK = 2 LOG V OUT V IN ADG1221/ADG1222/ ADG1223 GND R L 1kΩ V OUT Figure 3. Test Circuit 8 Channel-to-Channel Crosstalk Figure 32. Test Circuit 1 Total Harmonic Distortion + Noise Rev. B Page 14 of 16

15 Data Sheet ADG1221/ADG1222/ADG1223 OUTLINE DIMENSIONS PIN 1.5 BSC COPLANARITY MAX SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-187-BA Figure Lead Mini Small Outline Package [MSOP] (RM-1) Dimensions shown in millimeters ORDERING GUIDE Model 1 Temperature Range Package Description Package Option Branding ADG1221BRMZ 4 C to +125 C 1-Lead Mini Small Outline Package (MSOP) RM-1 S27 ADG1221BRMZ-REEL7 4 C to +125 C 1-Lead Mini Small Outline Package (MSOP) RM-1 S27 ADG1222BRMZ 4 C to +125 C 1-Lead Mini Small Outline Package (MSOP) RM-1 S28 ADG1222BRMZ-REEL7 4 C to +125 C 1-Lead Mini Small Outline Package (MSOP) RM-1 S28 ADG1223BRMZ 4 C to +125 C 1-Lead Mini Small Outline Package (MSOP) RM-1 S2J ADG1223BRMZ-REEL7 4 C to +125 C 1-Lead Mini Small Outline Package (MSOP) RM-1 S2J 1 Z = Pb-free part. Rev. B Page 15 of 16

1.5 Ω On Resistance, ±15 V/12 V/±5 V, icmos, Dual SPDT Switch ADG1436

1.5 Ω On Resistance, ±15 V/12 V/±5 V, icmos, Dual SPDT Switch ADG1436 Data Sheet.5 Ω On Resistance, ±5 V/2 V/±5 V, icmos, Dual SPDT Switch ADG436 FEATURES.5 Ω on resistance.3 Ω on-resistance flatness. Ω on-resistance match between channels Continuous current per channel