CMOS, ±5 V/+5 V, 4 Ω, Single SPDT Switches ADG619/ADG620

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1 CMOS, ± V/+ V, 4 Ω, Single SPDT Switches ADG619/ADG62 FEATURES 6. Ω (maximum) on resistance.8 Ω (maximum) on-resistance flatness 2.7 V to. V single supply ±2.7 V to ±. V dual supply Rail-to-rail operation 8-lead SOT-23, 8-lead MSOP Typical power consumption (<.1 μw) TTL-/CMOS-compatible inputs APPLICATIONS Automatic test equipment Power routing Communication systems Data acquisition systems Sample-and-hold systems Avionics Relay replacement Battery-powered systems FUNCTIONAL BLOCK DIAGRAM S2 S1 ADG619/ADG62 NOTES 1. SWITCHES SHOWN FOR A LOGIC 1 PUT. Figure 1. D GENERAL DESCRIPTION The ADG619/ADG62 are monolithic, CMOS single-pole double-throw (SPDT) switches. Each switch conducts equally well in both directions when the device is on. The ADG619/ADG62 offer a low on resistance of 4 Ω, which is matched to within.7 Ω between channels. These switches also provide low power dissipation, yet result in high switching speeds. The ADG619 exhibits break-before-make switching action, thus preventing momentary shorting when switching channels. The ADG62 exhibits make-before-break action. The ADG619/ADG62 are available in an 8-lead SOT-23 and an 8-lead MSOP. PRODUCT HIGHLIGHTS 1. Low on resistance (RON): 4 Ω typical. 2. Dual ±2.7 V to ±. V or single 2.7 V to. V supplies. 3. Low power dissipation. 4. Fast ton/toff.. Tiny, 8-lead SOT-23 and 8-lead MSOP. Table 1. Truth Table for the ADG619/ADG62 Switch S1 Switch S2 On Off 1 Off On Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 916, Norwood, MA , U.S.A. Tel: Fax: Analog Devices, Inc. All rights reserved.

2 TABLE OF CONTENTS Features... 1 Applications... 1 Functional Block Diagram... 1 General Description... 1 Product Highlights... 1 Revision History... 2 Specifications... 3 Dual Supply... 3 Absolute Maximum Ratings...6 ESD Caution...6 Pin Configurations and Function Descriptions...7 Typical Performance Characteristics...8 Terminology... 1 Test Circuits Outline Dimensions Ordering Guide Single Supply... REVISION HISTORY 3/7 Rev. B to Rev. C Changes to Specifications /6 Rev. A to Rev. B Changes to RON Values in Table Updated Outline Dimensions Changes to Ordering Guide /3 Rev. to Rev. A. Edits to Specifications... 2 Changes to Ordering Guide... 4 Updated Outline Dimensions... 8 Rev. C Page 2 of 16

3 SPECIFICATIONS DUAL SUPPLY VDD = + V ± 1%, VSS = V ± 1%, GND = V. All specifications 4 C to +8 C, unless otherwise noted. Table 2. B Version 1 Parameter +2 C 4 C to +8 C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range VSS to VDD V VDD = +4. V, VSS = 4. V On Resistance (RON) 4 Ω typ VS = ±4. V, IDS = 1 ma; see Figure Ω max RON Match Between Channels (ΔRON).7 Ω typ VS = ±4. V, IDS = 1 ma Ω max On-Resistance Flatness (RFLAT (ON)).7.8 Ω typ VS = ±3.3 V, IDS = 1 ma Ω max LEAKAGE CURRENTS VDD = +. V, VSS =. V Source Off Leakage, IS (Off) ±.1 na typ VS = ±4. V, VD = 4. V; see Figure 16 ±.2 ±1 na max Channel On Leakage, ID, IS (On) ±.1 na typ VS = VD = ±4. V; see Figure 17 ±.2 ±1 na max DIGITAL PUTS Input High Voltage, VH 2.4 V min Input Low Voltage, VL.8 V max Input Current, IL or IH. μa typ V = VL or VH ±.1 μa max Digital Input Capacitance, C 2 pf typ DYNAMIC CHARACTERISTICS 2 ADG619 ton 8 ns typ RL = 3 Ω, CL = 3 pf 12 1 ns max VS = 3.3 V; see Figure 18 toff 4 ns typ RL = 3 Ω, CL = 3 pf 7 9 ns max VS = 3.3 V; see Figure 18 Break-Before-Make Time Delay, tbbm 4 ns typ RL = 3 Ω, CL = 3 pf 1 ns min VS1 = VS2 = 3.3 V; see Figure 19 ADG62 ton 4 ns typ RL = 3 Ω, CL = 3 pf 6 8 ns max VS = 3.3 V; see Figure 18 toff 2 ns typ RL = 3 Ω, CL = 3 pf 33 4 ns max VS = 3.3 V; see Figure 18 Make-Before-Break Time Delay, tmbb 16 ns typ RL = 3 Ω, CL = 3 pf 1 ns min VS = V; see Figure 2 Charge Injection 11 pc typ VS = V, RS = Ω, CL = 1 nf; see Figure 21 Off Isolation 67 db typ RL = Ω, CL = pf, f = 1 MHz; see Figure 22 Channel-to-Channel Crosstalk 67 db typ RL = Ω, CL = pf, f = 1 MHz; see Figure 23 Bandwidth 3 db 19 MHz typ RL = Ω, CL = pf; see Figure 24 CS (Off) 2 pf typ f = 1 MHz CD, CS (On) 9 pf typ f = 1 MHz Rev. C Page 3 of 16

4 B Version 1 Parameter +2 C 4 C to +8 C Unit Test Conditions/Comments POWER REQUIREMENTS VDD = +. V, VSS =. V IDD.1 μa typ Digital inputs = V or. V 1. μa max ISS.1 μa typ Digital inputs = V or. V 1. μa max 1 Temperature range for B version is 4 C to +8 C. 2 Guaranteed by design, not subject to production test. Rev. C Page 4 of 16

5 SGLE SUPPLY VDD = V ± 1%, VSS = V, GND = V. All specifications 4 C to +8 C, unless otherwise noted. Table 3. B Version 1 Parameter +2 C 4 C to +8 C Unit Test Conditions/Comments ANALOG SWITCH Analog Signal Range V to VDD V VDD = 4. V, VSS = V On Resistance (RON) 7 Ω typ VS = V to 4. V, IDS = 1 ma; see Figure Ω max RON Match Between Channels (ΔRON).8 Ω typ VS = V to 4. V, IDS = 1mA Ω max On-Resistance Flatness (RFLAT (ON)).. Ω typ VS = 1. V to 3.3 V, IDS = 1 ma 1.2 Ω max LEAKAGE CURRENTS VDD =. V Source Off Leakage, IS (Off) ±.1 na typ VS = 1 V/4. V, VD = 4. V/1 V; see Figure 16 ±.2 ±1 na max Channel On Leakage, ID, IS (On) ±.1 na typ VS = VD = 1 V/4. V; see Figure 17 ±.2 ±1 na max DIGITAL PUTS Input High Voltage, VH 2.4 V min Input Low Voltage, VL.8 V max Input Current, IL or IH. μa typ V = VL or VH ±.1 μa max Digital Input Capacitance, C 2 pf typ DYNAMIC CHARACTERISTICS 2 ADG619 ton 12 ns typ RL = 3 Ω, CL = 3 pf ns max VS = 3.3 V; see Figure 18 toff ns typ RL = 3 Ω, CL = 3 pf 7 11 ns max VS = 3.3 V; see Figure 18 Break-Before-Make Time Delay, tbbm 7 ns typ RL = 3 Ω, CL = 3 pf 1 ns min VS1 = VS2 = 3.3 V; see Figure 19 ADG62 ton ns typ RL = 3 Ω, CL = 3 pf 8 11 ns max VS = 3.3 V; see Figure 18 toff 21 ns typ RL = 3 Ω, CL = 3 pf ns max VS = 3.3 V; see Figure 18 Make-Before-Break Time Delay, tmbb 17 ns typ RL = 3 Ω, CL = 3 pf 1 ns min VS = 3.3 V; see Figure 2 Charge Injection 6 pc typ VS = V, RS = Ω, CL = 1 nf; see Figure 21 Off Isolation 67 db typ RL = Ω, CL = pf, f = 1 MHz; see Figure 22 Channel-to-Channel Crosstalk 67 db typ RL = Ω, CL = pf, f = 1 MHz; see Figure 23 Bandwidth 3 db 19 MHz typ RL = Ω, CL = pf; see Figure 24 CS (OFF) 2 pf typ f = 1 MHz CD, CS (ON) 9 pf typ f = 1 MHz POWER REQUIREMENTS VDD =. V IDD.1 μa typ Digital inputs = V or. V 1. μa max 1 Temperature range for B version is 4 C to +8 C. 2 Guaranteed by design, not subject to production test. Rev. C Page of 16

6 ABSOLUTE MAXIMUM RATGS TA = 2 C, unless otherwise noted. Table 4. Parameter VDD to VSS VDD to GND VSS to GND Analog Inputs 1 Digital Inputs 1 Peak Current, S or D Rating 13 V.3 V to +6. V +.3 V to 6. V VSS.3 V to VDD +.3 V.3 V to VDD +.3 V or 3 ma (whichever occurs first) 1 ma (pulsed at 1 ms, 1% duty cycle maximum) Continuous Current, S or D ma Operating Temperature Range Industrial (B Version) 4 C to +8 C Storage Temperature Range 6 C to +1 C Junction Temperature 1 C MSOP θja Thermal Impedance 26 C/W θjc Thermal Impedance 44 C/W SOT-23 θja Thermal Impedance C/W θjc Thermal Impedance C/W Lead Temperature, Soldering 3 C (1 sec) IR Reflow, Peak Temperature 22 C 1 Overvoltages at, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at a time. ESD CAUTION Rev. C Page 6 of 16

7 P CONFIGURATIONS AND FUNCTION DESCRIPTIONS D 1 S1 2 GND 3 4 ADG619/ ADG62 TOP VIEW (Not to Scale) NC = NO CONNECT S2 NC Figure 2. 8-Lead SOT-23 (RJ-8) D 1 S1 2 GND 3 4 ADG619/ ADG62 TOP VIEW (Not to Scale) NC = NO CONNECT Figure 3. 8-Lead MSOP (RM-8) S2 NC Table. Pin Function Descriptions Pin No. Mnemonic Description 1 D Drain Terminal. Can be an input or output. 2 S1 Source Terminal. Can be an input or output. 3 GND Ground ( V) Reference. 4 VDD Most Positive Power Supply. NC No Connect. Not internally connected. 6 Logic Control Input. 7 VSS Most Negative Power Supply. This pin is only used in dual-supply applications and should be tied to ground in single-supply applications. 8 S2 Source Terminal. Can be an input or output. Rev. C Page 7 of 16

8 TYPICAL PERFORMANCE CHARACTERISTICS ON RESISTANCE (Ω) 8, =±2.V 7 6, = ±3V 4, = ±3.3V 3, = ±4.V, = ±V 2 1 T A = 2 C V D, (V) Figure 4. On Resistance vs. VD, VS (Dual Supply) ON RESISTANCE (Ω) T A =+8 C T A =+2 C T A = 4 C 1 =V =V V D, (V) Figure 7. On Resistance vs. VD, VS for Different Temperatures (Single Supply) ON RESISTANCE (Ω) =2.7V =3V =3.3V =4.V =V T A =2 C =V LEAKAGE CURRENTS (na) =+V = V V D =±4.V = 4.V ± I S (OFF) I D,I S (ON) V D, (V) TEMPERATURE ( C) Figure. On Resistance vs. VD, VS (Single Supply) Figure 8. Leakage Currents vs. Temperature (Dual Supply) ON RESISTANCE (Ω) T A =+8 C T A =+2 C T A = 4 C =+V = V V D, (V) Figure 6. On Resistance vs. VD, VS for Different Temperatures (Dual Supply) LEAKAGE CURRENTS (na) =V =V V D =4.V/1V = 1V/4.V I D,I S (ON) I S (OFF) TEMPERATURE ( C) Figure 9. Leakage Currents vs. Temperature (Single Supply) Rev. C Page 8 of 16

9 2 T A = 2 C CHARGE JECTION (pc) 1 1 = +V = V = +V = V ATTENUATION (db) (V) Figure 1. Charge Injection vs. Source Voltage FREQUENCY (MHz) Figure 13. Crosstalk vs. Frequency =+V = V T A = 2 C = +V = V 2 TIME (ns) t ON t OFF = +V = V TEMPERATURE ( C) = +V = V = +V = V Figure 11. ton/toff Times vs. Temperatures ATTENUATION (db) =+V = V T A = 2 C FREQUENCY (MHz) Figure 14. On Response vs. Frequency ATTENUATION (db) = +V = V T A = 2 C FREQUENCY (MHz) Figure 12. Off Isolation vs. Frequency Rev. C Page 9 of 16

10 TERMOLOGY IDD Positive supply current. ISS Negative supply current. RON Ohmic resistance between D and S terminals. ΔRON On resistance match between any two channels. RFLAT (ON) Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. IS (Off) Source leakage current with the switch off. ID, IS (On) Channel leakage current with the switch on. VD, VS Analog voltage on Terminal D and Terminal S. VL Maximum input voltage for Logic. VH Minimum input voltage for Logic 1. IL, IH Input current of the digital input. CS (Off) Off switch source capacitance. CD, CS (On) On switch capacitance. ton Delay between applying the digital control input and the output switching on. toff Delay between applying the digital control input and the output switching off. tmbb On time is measured between the 8% points of both switches, when switching from one address state to another. tbbm Off time or on time is measured between the 9% points of both switches, when switching from one address state to another. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. Crosstalk A measure of unwanted signal coupled through from one channel to another as a result of parasitic capacitance. Off Isolation A measure of unwanted signal coupling through an off switch. Bandwidth The frequency response of the on switch. Insertion Loss The loss due to the on resistance of the switch. Rev. C Page 1 of 16

11 TEST CIRCUITS I DS V1 S D R ON =V1/I DS I S (OFF) A I D (OFF) S D A V D I D (ON) NC S D A Figure 1. On Resistance Figure 16. Off Leakage Figure 17. On Leakage V D µF.1µF S % % V GND D R L 3Ω C L 3pF t ON 9% 9% t OFF Figure 18. Switching Times.1µF.1µF 1 2 S1 S2 D D2 R L2 3Ω C L2 3pF V V V % % 9% 9% V GND t BBM t BBM Figure 19. Break-Before-Make Time Delay, tbbm (ADG619 Only).1µF.1µF 1 V D V GND R L2 3Ω C L2 3pF 1 R L1 3Ω C L1 3pF V 1 V 8%V D % % 8%V D 2 Figure 2. Make-Before-Break Time Delay, tmbb (ADG62 Only) t MBB V R S D S C L 1nF S2 Δ GND S1 Q J =C L Δ Δ Figure 21. Charge Injection Rev. C Page 11 of 16

12 .1µF.1µF NETWORK ANALYZER S Ω Ω D V GND R L Ω OFF ISOLATION = 2 log Figure 22. Off Isolation µF.1µF NETWORK ANALYZER R Ω Ω S1 S2 D R Ω GND CHANNEL-TO-CHANNEL CROSSTALK = 2 log Figure 23. Channel-to-Channel Crosstalk µF.1µF NETWORK ANALYZER V S GND D Ω R L Ω SERTION LOSS = 2 log WITH SWITCH WITHOUT SWITCH Figure 24. Bandwidth Rev. C Page 12 of 16

13 OUTLE DIMENSIONS P 1.6 BSC COPLANARITY MAX SEATG PLANE COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 2. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 2.9 BSC BSC 2.8 BSC P 1 DICATOR BSC.6 BSC.1 MAX MAX.22.8 SEATG PLANE COMPLIANT TO JEDEC STANDARDS MO-178-BA Figure Lead Small Outline Transistor Package [SOT-23] (RJ-8) Dimensions shown in millimeters Rev. C Page 13 of 16

14 ORDERG GUIDE Model Temperature Range Package Description Package Option Branding 1 ADG619BRM 4 C to +8 C 8-Lead Mini Small Outline Package (MSOP) RM-8 SVB ADG619BRM-REEL 4 C to +8 C 8-Lead Mini Small Outline Package (MSOP) RM-8 SVB ADG619BRM-REEL7 4 C to +8 C 8-Lead Mini Small Outline Package (MSOP) RM-8 SVB ADG619BRMZ 2 4 C to +8 C 8-Lead Mini Small Outline Package (MSOP) RM-8 SCC ADG619BRMZ-REEL 2 4 C to +8 C 8-Lead Mini Small Outline Package (MSOP) RM-8 SCC ADG619BRMZ-REEL7 2 4 C to +8 C 8-Lead Mini Small Outline Package (MSOP) RM-8 SCC ADG619BRT-REEL 4 C to +8 C 8-Lead Small Outline Transistor Package (SOT-23) RJ-8 SVB ADG619BRT-REEL7 4 C to +8 C 8-Lead Small Outline Transistor Package (SOT-23) RJ-8 SVB ADG619BRT-RL7 4 C to +8 C 8-Lead Small Outline Transistor Package (SOT-23) RJ-8 SVB ADG619BRTZ-REEL 2 4 C to +8 C 8-Lead Small Outline Transistor Package (SOT-23) RJ-8 SCC ADG619BRTZ-REEL7 2 4 C to +8 C 8-Lead Small Outline Transistor Package (SOT-23) RJ-8 SCC ADG619BRTZ-RL7 2 4 C to +8 C 8-Lead Small Outline Transistor Package (SOT-23) RJ-8 SCC ADG62BRM 4 C to +8 C 8-Lead Mini Small Outline Package (MSOP) RM-8 SWB ADG62BRM-REEL 4 C to +8 C 8-Lead Mini Small Outline Package (MSOP) RM-8 SWB ADG62BRM-REEL7 4 C to +8 C 8-Lead Mini Small Outline Package (MSOP) RM-8 SWB ADG62BRMZ 2 4 C to +8 C 8-Lead Mini Small Outline Package (MSOP) RM-8 S21 ADG62BRT-REEL 4 C to +8 C 8-Lead Small Outline Transistor Package (SOT-23) RJ-8 SWB ADG62BRT-REEL7 4 C to +8 C 8-Lead Small Outline Transistor Package (SOT-23) RJ-8 SWB ADG62BRTZ-REEL7 2 4 C to +8 C 8-Lead Small Outline Transistor Package (SOT-23) RJ-8 S21 1 Branding on SOT-23 and MSOP is limited to three characters due to space constraints. 2 Z = RoHS Compliant Part. Rev. C Page 14 of 16

15 NOTES Rev. C Page 1 of 16

1 pc Charge Injection, 100 pa Leakage, CMOS, ±5 V/+5 V/+3 V Dual SPDT Switch ADG636

1 pc Charge Injection, 100 pa Leakage, CMOS, ±5 V/+5 V/+3 V Dual SPDT Switch ADG636 pc Charge Injection, pa Leakage, CMOS, ±5 V/+5 V/+3 V Dual SPDT Switch ADG636 FEATURES pc charge injection ±2.7 V to ±5.5 V dual supply +2.7 V to +5.5 V single supply Automotive temperature range: 4 C