CMOS, Low Voltage RF/Video, SPDT Switch ADG752

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1 a FEATURE High Off Isolation 80 db at 30 MHz 3 db ignal Bandwidth 20 MHz +1.8 V to +. ingle upply Low On-Resistance (1 Typically) Low On-Resistance Flatness Fast witching Times t ON Typically 8 ns t OFF Typically 3 ns Typical Power Consumption < 0.01 W TTL/CMO Compatible APPLICATION Audio and Video witching RF witching Networking Applications Battery Powered ystems Communication ystems Relay Replacement ample-and-hold ystems CMO, Low Voltage RF/Video, PT witch AG72 FUNCTIONAL BLOCK IAGRAM 1 2 AG72 WITCH HOWN FOR A LOGIC "1" PUT GENERAL ECRIPTION The AG72 is a low voltage PT (single pole, double throw) switch. It is constructed using switches in a T-switch configuration, which results in excellent Off Isolation while maintaining good frequency response in the ON condition. High off isolation and wide signal bandwidth make this part suitable for switching RF and video signals. Low power consumption and operating supply range of +1.8 V to +. V make it ideal for battery powered, portable instruments. The AG72 is designed on a submicron process that provides low power dissipation yet gives high switching speed and low on resistance. This part is a fully bidirectional switch and can handle signals up to and including the supply rails. Break-before-make switching action ensures the input signals are protected against momentary shorting when switching between channels. The AG72 is available in 6-lead OT-23 and 8-lead µoic packages. PROUCT HIGHLIGHT 1. High Off Isolation 80 db at 30 MHz db ignal Bandwidth 20 MHz. 3. Low On Resistance (1 Ω). 4. Low Power Consumption, typically <0.01 µw.. Break-Before-Make witching Action. 6. Tiny 6-lead OT-23 and 8-lead µoic packages. Information furnished by Analog evices is believed to be accurate and reliable. However, no responsibility is assumed by Analog evices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog evices. One Technology Way, P.O. Box 96, Norwood, MA , U..A. Tel: 781/ World Wide Web ite: Fax: 781/ Analog evices, Inc., 2013

2 AG72 PECIFICATION ( = + V %, GN = 0 V, unless otherwise noted.) B Version 40 C Parameter +2 C to +8 C Units Test Conditions/Comments ANALOG WITCH Analog ignal Range 0 V to V On-Resistance (R ON ) 1 Ω typ = 0 V to, I = ma; Ω max Test Circuit 1 On-Resistance Match Between 0.1 Ω typ = 0 V to, I = ma Channels ( R ON ) Ω max On-Resistance Flatness (R FLAT(ON) ) 2 Ω typ = 0 V to 2. V, I = ma 3 Ω max = + 4. V LEAKAGE CURRENT ource OFF Leakage I (OFF) ± 0.01 na typ V = 4. V/1 V, = 1 V/4. V; ± 0.2 ± 3.0 na max Test Circuit 2 Channel ON Leakage I, I (ON) ± 0.01 na typ V = = 1 V, or 4. V; ± 0.2 ± 3.0 na max Test Circuit 3 IGITAL PUT Input High Voltage, V H 2.4 V min Input Low Voltage, V L 0.8 V max Input Current I L or I H µa typ V = V L or V H ± 0. µa max C, igital Input Capacitance 2 pf typ YNAMIC CHARACTERITIC 1 t ON 8 ns typ = 300 Ω, C L = 3 pf; 13 ns max = 3 V, Test Circuit 4 t OFF 3 ns typ = 300 Ω, C L = 3 pf; ns max = 3 V, Test Circuit 4 Break-Before-Make Time elay 6 ns typ = 300 Ω, C L = 3 pf; 1 ns min = 3 V, Test Circuit Off Isolation 80 db typ = 0 Ω, C L = pf, f = 30 MHz; Test Circuit 6 Crosstalk 80 db typ = 0 Ω, C L = pf, f = 30 MHz; Test Circuit 7 3 db Bandwidth 20 MHz typ = 0 Ω, C L = pf, Test Circuit 8 C (OFF) 4 pf typ C, C (ON) 1 pf typ POWER REQUIREMENT = +. V I µa typ igital Inputs = 0 V or +. V µa max NOTE 1 Guaranteed by design, not subject to production test. pecifications subject to change without notice. 2

3 PECIFICATION ( = +3 V %, GN = 0 V, unless otherwise noted.) B Version 40 C Parameter +2 C to +8 C Units Test Conditions/Comments ANALOG WITCH Analog ignal Range 0 V to V On-Resistance (R ON ) 3 Ω typ = 0 V to, I = ma; 0 Ω max Test Circuit 1 On-Resistance Match Between 0.2 Ω typ = 0 V to, I = ma Channels ( R ON ) Ω max LEAKAGE CURRENT = +3.3 V ource OFF Leakage I (OFF) ± 0.01 na typ = 3 V/1 V, V = 1 V/3 V; ± 0.2 ± 3.0 na max Test Circuit 2 Channel ON Leakage I, I (ON) ± 0.01 na typ = V = 1 V or 3 V; ± 0.2 ± 3.0 na max Test Circuit 3 IGITAL PUT Input High Voltage, V H 2.0 V min Input Low Voltage, V L 0.4 V max Input Current I L or I H µa typ V = V L or V H ± 0. µa max C, igital Input Capacitance 2 pf typ AG72 YNAMIC CHARACTERITIC 1 t ON ns typ = 300 Ω, C L = 3 pf; 18 ns max = 2 V, Test Circuit 4 t OFF 4 ns typ = 300 Ω, C L = 3 pf; 8 ns max = 2 V, Test Circuit 4 Break-Before-Make Time elay 6 ns typ = 300 Ω, C L = 3 pf; 1 ns min = 2 V, Test Circuit Off Isolation 80 db typ = 0 Ω, C L = pf, f = 30 MHz; Test Circuit 6 Crosstalk 80 db typ = 0 Ω, C L = pf, f = 30 MHz; Test Circuit 7 3 db Bandwidth 20 MHz typ = 0 Ω, C L = pf, Test Circuit 8 C (OFF) 4 pf typ C, C (ON) 1 pf typ POWER REQUIREMENT = +3.3 V I µa typ igital Inputs = 0 V or +3.3 V µa max NOTE 1 Guaranteed by design, not subject to production test. pecifications subject to change without notice. 3

4 AG72 ABOLUTE MAXIMUM RATG 1 (T A = +2 C unless otherwise noted) to GN V to +6 V Analog, igital Inputs V to +0.3 V or 30 ma, Whichever Occurs First Peak Current, or ma (Pulsed at 1 ms, % uty Cycle Max) Continuous Current, or ma Operating Temperature Range Industrial (B Version) C to +8 C torage Temperature Range C to +10 C Power issipation (T J Max T A )/θ JA Junction Temperature (T J Max) C µoic Package θ JA Thermal Impedance C/W θ JC Thermal Impedance C/W OT-23 Package θ JA Thermal Impedance C/W θ JC Thermal Impedance C/W Lead Temperature, oldering Vapor Phase (60 sec) C Infrared (1 sec) C NOTE 1 tresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 2 Overvoltages at, or will be clamped by internal diodes. Current should be limited to the maximum ratings given. NC GN Lead OIC (RM-8) AG72 TOP VIEW (Not to cale) NC = NO CONNECT P CONFIGURATION NC Table I. Truth Table 6-Lead OT-23 (RT-6) AG72 TOP VIEW (Not to cale) 6 2 GN 4 AG72 witch 1 witch 2 0 ON OFF 1 OFF ON TERMOLOGY Most positive power supply potential. GN Ground (0 V) reference. ource terminal. May be an input or output. rain terminal. May be an input or output. Logic control input. R ON Ohmic resistance between and. R ON On resistance match between channels, i.e., R ON max R ON min. R FLAT(ON) Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. I (OFF) ource leakage current with the switch OFF. I, I (ON) Channel leakage current with the switch ON. V ( ) Analog voltage on terminals and. C (OFF) OFF switch source capacitance. C, C (ON) ON switch capacitance. t ON elay between applying the digital control input and the output switching on. ee Test Circuit 4. t OFF elay between applying the digital control input and the output switching off. t OFF time or ON time measured between the 90% points of both switches, when switching from one address state to another. Off Isolation A measure of unwanted signal coupling through an OFF switch. Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. Bandwidth The frequency at which the output is attenuated by 3 dbs. On Response The frequency response of the ON switch. Insertion Loss Loss due to the ON resistance of the switch. V L Maximum input voltage for Logic 0. V H Minimum input voltage for Logic 1. I L (I H ) Input current of the digital input. Positive supply current. I CAUTION E (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AG72 features proprietary E protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper E precautions are recommended to avoid performance degradation or loss of functionality. 4 WARNG! E ENITIVE EVICE

5 Typical Performance Characteristics AG72 40 m 3 = +2.7V T A = +2 C 1m T A = +2 C R ON = +3.3V I Amps 1 +V +3V 1 = +4.V = +.V V OR RA OURCE VOLTAGE Volts Figure 1. On Resistance as a Function of V ( ) ingle upplies. 0n n 0 1k k 0k 0M M FREQUENCY Hz Figure 4. upply Current vs. Input witching Frequency 40 3 = +3V 40 T A = +2 C R ON C +2 C OFF IOLATION db C V OR RA OURCE VOLTAGE Volts Figure 2. On Resistance as a Function of V ( ) for ifferent Temperatures = 3 V FREQUENCY MHz Figure. Off Isolation vs. Frequency 40 3 = +V 0 20 T A = +2 C R ON C +8 C CROTALK db C V OR RA OURCE VOLTAGE Volts Figure 3. On Resistance as a Function of V ( ) for ifferent Temperatures = V FREQUENCY MHz Figure 6. Crosstalk vs. Frequency

6 AG72 0 T A = +2 C ERIE ATTENUATION db FREQUENCY MHz 0 Figure 7. On Response vs. Frequency GENERAL ECRIPTION The AG72 is an PT switch constructed using switches in a T configuration to obtain high OFF isolation while maintaining good frequency response in the ON condition. Figure 8 shows the T-switch configuration. While the switch is in the OFF state, the shunt switch is closed and the two series switches are open. The closed shunt switch provides a signal path to ground for any of the unwanted signals that find their way through the off capacitances of the series MO devices. This results in more improved isolation between the input and output than with an ordinary series switch. When the switch is in the ON condition, the shunt switch is open and the signal path is through the two series switches which are now closed. HUNT Figure 8. Basic T-witch Configuration LAYOUT CONIERATION Where accurate high frequency operation is important, careful consideration should be given to the printed circuit board layout and to grounding. Wire wrap boards, prototype boards and sockets are not recommended because of their high parasitic inductance and capacitance. The part should be soldered directly to a printed circuit board. A ground plane should cover all unused areas of the component side of the board to provide a low impedance path to ground. Removing the ground planes from the area around the part reduces stray capacitance. Good decoupling is important in achieving optimum performance. should be decoupled with a 0.1 µf surface mount capacitor to ground mounted as close as possible to the device itself. CH1 1 7 CH2 A = AG Figure 9. Multiplexing Between Two Video ignals 6

7 AG72 Test Circuits V1 I (OFF) A NC I (ON) A R ON = V1/I I V NC = NO CONNECT V Test Circuit 1. On Resistance Test Circuit 2. Off Leakage Test Circuit 3. On Leakage V 0% 0% 1 2 GN 300 C L 3pF GN 90% 90% Test Circuit 4. witching Times t ON t OFF C L 3pF V 0V 0V 0% 0% 0% 0% V GN t t Test Circuit. Break-Before-Make Time elay, t V GN NETWORK ANALYZER NETWORK ANALYZER 1 2 GN OFF IOLATION = 20 LOG Test Circuit 6. Off Isolation CHANNEL-TO-CHANNEL CROTALK = 20 LOG Test Circuit 7. Channel-to-Channel Crosstalk NETWORK ANALYZER V GN WITH WITCH ERTION LO = 20 LOG WITHOUT WITCH Test Circuit 8. Bandwidth 7

8 AG72 OUTLE IMENION P 1 IENTIFIER 0.6 BC COPLANARITY MAX MAX COMPLIANT TO JEEC TANAR MO-187-AA Figure. 8-Lead Mini mall Outline Package [MOP] (RM-8) imensions shown in millimeters B P 1 ICATOR 1.90 BC 0.9 BC MAX 0.0 M 0.0 MAX 0.30 M 1.4 MAX 0.9 M EATG PLANE 0.20 MAX 0.08 M BC COMPLIANT TO JEEC TANAR MO-178-AB Figure Lead mall Outline Transistor Package [OT-23] (RJ-6) imensions shown in millimeters A Rev. A Page 8

9 AG72 ORERG GUIE Model 1 Temperature Range Brand Package escription Package Option AG72BRM-REEL 40 C to +8 C EB 8-Lead Mini mall Outline Package [MOP] RM-8 AG72BRMZ 40 C to +8 C 1H 8-Lead Mini mall Outline Package [MOP] RM-8 AG72BRT-REEL 40 C to +8 C EB 6-Lead mall Outline Transistor Package [OT-23] RJ-6 AG72BRT-REEL7 40 C to +8 C EB 6-Lead mall Outline Transistor Package [OT-23] RJ-6 AG72BRTZ-REEL 40 C to +8 C EB# 6-Lead mall Outline Transistor Package [OT-23] RJ-6 AG72BRTZ-REEL7 40 C to +8 C EB# 6-Lead mall Outline Transistor Package [OT-23] RJ-6 1 Z = RoH Compliant Part. REVIION HITORY /13 Rev. 0 to Rev. A Updated Outline imensions... 8 Changes to Ordering Guide /99 Revision 0: Initial Version Analog evices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners /13(A) Rev. A Page 9

CMOS, Low Voltage RF/Video, SPST Switch ADG751

CMOS, Low Voltage RF/Video, SPST Switch ADG751 a FEATURE High Off Isolation 7 db at 1 MHz 3 db ignal Bandwidth 3 MHz +1.8 V to +. ingle upply Low On-Resistance (1 ) Fast witching Times t ON Typically 9 ns t OFF Typically 3 ns Typical Power Consumption