MC100EPT V Dual LVTTL/LVCMOS to Differential LVPECL Translator

Transcription

1 3.3V ual LVTTL/LVMOS to ifferential LVPEL Translator escription The is a dual LVTTL/LVMOS to differential LVPEL translator. Because LVPEL (Positive EL) levels are used only +3.3 V and ground are required. The small outline lead package and the single gate of the EPT22 makes it ideal for those applications where space, performance, and low power are at a premium. Because the mature MOSI 5 process is used, low cost and high speed can be added to the list of features. Features 420 ps Typical Propagation elay Maximum Frequency >. GHz Typical Operating Range: V = 3.0 V to 3.6 V with GN = 0 V PNP LVTTL Inputs for Minimal Loading Q Output Will efault HIGH with Inputs Open The 00 Series ontains Temperature ompensation. Pb Free Packages are vailable SOI SUFFIX SE 75 TSSOP T SUFFIX SE 94R FN MN SUFFIX SE 506 MRKING IGRMS* KPT22 LYW K22 LYW 3S M 4 L Y W M = ssembly Location = Wafer Lot = Year = Work Week = ate ode = Pb Free Package (Note: Microdot may be in either location) *For additional marking information, refer to pplication Note N002/. ORERING INFORMTION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. Semiconductor omponents Industries, LL, 200 ugust, 200 Rev. 2 Publication Order Number: /

2 Table. PIN ESRIPTION Q0 V PIN FUNTION Q Q0, Q, Q0, Q LVPEL ifferential Outputs 0, LVTTL Inputs LVPEL LVTTL V Positive Supply Q 3 6 GN Ground Q 4 5 GN EP (FN only) Thermal exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply (GN) or leave unconnected, floating open. Figure. Lead Pinout (Top View) and Logic iagram Table 2. TTRIBUTES haracteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ES Protection Human Body Model Machine Model harged evice Model Value N/ N/ > 4 kv > 200 V > 2 kv Moisture Sensitivity, Indefinite Time Out of rypack (Note ) Pb Pkg Pb Free Pkg SOI TSSOP FN Level Level Level Level Level 3 Level Flammability Rating Oxygen Index: 2 to 34 UL 94 V 0.25 in Transistor ount Meets or exceeds JEE Spec EI/JES7 I Latchup Test. For additional information, see pplication Note N003/. 64 evices 2

3 Table 3. MXIMUM RTINGS Symbol Parameter ondition ondition 2 Rating Unit V Power Supply GN = 0 V 6 V V I Input Voltage GN = 0 V V I V 6 to 0 V I out Output urrent ontinuous Surge T Operating Temperature Range 40 to +5 T stg Storage Temperature Range 65 to +50 J Thermal Resistance (Junction to mbient) 0 lfpm 500 lfpm SOI SOI J Thermal Resistance (Junction to ase) Standard Board SOI 4 to 44 J Thermal Resistance (Junction to mbient) 0 lfpm 500 lfpm TSSOP TSSOP J Thermal Resistance (Junction to ase) Standard Board TSSOP 4 to 44 J Thermal Resistance (Junction to mbient) 0 lfpm 500 lfpm FN FN m m T sol Wave Solder Pb Pb Free J Thermal Resistance (Junction to ase) (Note 2) FN 35 to 40 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating onditions is not implied. Extended exposure to stresses above the Recommended Operating onditions may affect device reliability. 2. JEE standard multilayer board 2S2P (2 signal, 2 power) Table 4. TTL INPUT HRTERISTIS V = 3.3 V, GN = 0 V, T = 40 to 5 Symbol haracteristic ondition Min Typ Max Unit I IH Input HIGH urrent V IN = 2.7 V 20 I IHH Input HIGH urrent MX V IN = V 00 I IL Input LOW urrent V IN = 0.5 V 0.6 m V IK Input lamp Voltage I IN = m.0 V V IH Input HIGH Voltage 2.0 V V IL Input LOW Voltage 0. V NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit values are applied individually under normal operating conditions and not valid simultaneously. Table 5. PEL OUTPUT HRTERISTIS V = 3.3 V, GN = 0.0 V (Note 3) Symbol haracteristic Min Typ Max Min Typ Max Min Typ Max I Power Supply urrent m V OH Output HIGH Voltage (Note 4) mv V OL Output LOW Voltage (Note 4) mv NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit values are applied individually under normal operating conditions and not valid simultaneously. 3. Output parameters vary : with V. 4. ll loading with 50 to V 2.0 V. Unit 3

4 Table 6. HRTERISTIS V = 3.0 V to 3.6 V, GN = 0.0 V (Note 5) Symbol haracteristic Min Typ Max Min Typ Max Min Typ Max f max Maximum Frequency (Figure 2) GHz t PLH, t PHL Propagation elay to Output ifferential t skew Within evice Skew (Note 6) evice to evice Skew (Note 7) ps t JITTER Random lock Jitter (Figure 2) 0.2 < 0.2 < 0.2 < ps t r Output Rise/Fall Times Q, Q t f (20% 0%) ps NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. Measured using a 2.4 V source, 50% duty cycle clock source. ll loading with 50 to V 2.0 V. 6. Skew is measured between outputs under identical transitions and conditions on any one device. 7. evice to evice Skew for identical transitions at identical V levels. Unit ps V OUTpp (mv) JITTER OUT ps (RMS) ÉÉ ÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ (JITTER) FREQUENY (MHz) Figure 2. F max /Jitter 4

5 river evice Q Q Z o = 50 Z o = 50 Receiver evice V TT V TT = V 2.0 V Figure 3. Typical Termination for Output river and evice Evaluation (See pplication Note N020/ Termination of EL Logic evices.) ORERING INFORMTION evice Package Shipping SOI 9 Units / Rail G SOI 9 Units / Rail R2 SOI 2500 / Tape & Reel R2G SOI 2500 / Tape & Reel T TSSOP 00 Units / Rail TG TSSOP 00 Units / Rail TR2 TSSOP 2500 / Tape & Reel TR2G TSSOP 2500 / Tape & Reel MNR4 FN 000 / Tape & Reel MNR4G FN 000 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BR0/. Resource Reference of pplication Notes N405/ EL lock istribution Techniques N406/ esigning with PEL (EL at +5.0 V) N503/ ELinPS I/O SPiE Modeling Kit N504/ Metastability and the ELinPS Family N56/ Interfacing Between LVS and EL N672/ The EL Translator Guide N00/ Odd Number ounters esign N002/ Marking and ate odes N020/ Termination of EL Logic evices N066/ Interfacing with ELinPS N090/ haracteristics of EL evices 5

6 PKGE IMENSIONS SOI NB SE ISSUE H Y B X 5 4 S 0.25 (0.00) M Y M K NOTES:. IMENSIONING N TOLERNING PER NSI Y4.5M, ONTROLLING IMENSION: MILLIMETER. 3. IMENSION N B O NOT INLUE MOL PROTRUSION. 4. MXIMUM MOL PROTRUSION 0.5 (0.006) PER SIE. 5. IMENSION OES NOT INLUE MBR PROTRUSION. LLOWBLE MBR PROTRUSION SHLL BE 0.27 (0.005) TOTL IN EXESS OF THE IMENSION T MXIMUM MTERIL ONITION THRU RE OBSOLETE. NEW STNR IS Z H G 0.25 (0.00) M Z Y S X S SETING PLNE 0.0 (0.004) N X 45 M J MILLIMETERS INHES IM MIN MX MIN MX B G.27 BS BS H J K M 0 0 N S SOLERING FOOTPRINT* SLE 6: mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLERRM/. 6

7 PKGE IMENSIONS TSSOP T SUFFIX PLSTI TSSOP PKGE SE 94R 02 ISSUE 0.5 (0.006) T 0.5 (0.006) T L U U S 2X L/2 PIN IENT S 5 x V K REF (0.004) M T U S V S B U F 0.25 (0.00) M NOTES:. IMENSIONING N TOLERNING PER NSI Y4.5M, ONTROLLING IMENSION: MILLIMETER. 3. IMENSION OES NOT INLUE MOL FLSH. PROTRUSIONS OR GTE BURRS. MOL FLSH OR GTE BURRS SHLL NOT EXEE 0.5 (0.006) PER SIE. 4. IMENSION B OES NOT INLUE INTERLE FLSH OR PROTRUSION. INTERLE FLSH OR PROTRUSION SHLL NOT EXEE 0.25 (0.00) PER SIE. 5. TERMINL NUMBERS RE SHOWN FOR REFERENE ONLY. 6. IMENSION N B RE TO BE ETERMINE T TUM PLNE -W (0.004) T SETING PLNE G ETIL E ETIL E W MILLIMETERS INHES IM MIN MX MIN MX B F G 0.65 BS BS K L 4.90 BS 0.93 BS M

8 PKGE IMENSIONS FN SE ISSUE PIN ONE REFERENE B NOTES:. IMENSIONING N TOLERNING PER SME Y4.5M, ONTROLLING IMENSION: MILLIMETERS. 3. IMENSION b PPLIES TO PLTE TERMINL N IS MESURE BETWEEN 0.25 N 0.30 MM FROM TERMINL. 4. OPLNRITY PPLIES TO THE EXPOSE P S WELL S THE TERMINLS. 2 X X 0.0 ÇÇÇ ÇÇÇ ÇÇÇ TOP VIEW E MILLIMETERS IM MIN MX REF b BS E 2.00 BS E e 0.50 BS K 0.20 L X SETING PLNE 0.0 SIE VIEW (3) 2 e/2 4 X L e E2 K 5 X b B NOTE 3 BOTTOM VIEW ELinPS is a trademark of Semiconductor omponents Industries, LL (SILL). ON Semiconductor and are registered trademarks of Semiconductor omponents Industries, LL (SILL). SILL reserves the right to make changes without further notice to any products herein. SILL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SILL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SILL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SILL does not convey any license under its patent rights nor the rights of others. SILL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SILL product could create a situation where personal injury or death may occur. Should Buyer purchase or use SILL products for any such unintended or unauthorized application, Buyer shall indemnify and hold SILL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SILL was negligent regarding the design or manufacture of the part. SILL is an Equal Opportunity/ffirmative ction Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLITION ORERING INFORMTION LITERTURE FULFILLMENT: Literature istribution enter for ON Semiconductor P.O. Box 563, enver, olorado 027 US Phone: or Toll Free US/anada Fax: or Toll Free US/anada orderlit@onsemi.com N. merican Technical Support: Toll Free US/anada Europe, Middle East and frica Technical Support: Phone: Japan ustomer Focus enter Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative /