MC100LVEP V / 3.3V ECL 2-Input Differential AND/NAND

Size: px
Start display at page:

Download "MC100LVEP V / 3.3V ECL 2-Input Differential AND/NAND"

Transcription

1 M00VEP05 2.5V / 3.3V E 2-Input ifferential AN/NAN escription The M00VEP05 is a 2 input differential AN/NAN gate. The M00VEP05 is the low voltage version of the M00EP05 and is functionally equivalent to the E05 and VE05 devices. With A performance much faster than the VE05 device, the M00VEP05 is ideal for low voltage applications requiring the fastest A performance available. The 00 Series contains temperature compensation. Features 220 ps Typical Propagation elay Input lock Frequency > 3 Gz 0.2 ps Typical RMS Random lock Period Jitter VPE Mode Operating Range: V = V to 3.6 V with V EE = 0 V NE Mode Operating Range: V = 0 V with V EE = V to 3.6 V Open Input efault State Q Output Will efault OW with Inputs Open These are Pb Free evices* SOI SUFFIX ASE 75 TSSOP T SUFFIX ASE 94R FN MN SUFFIX ASE 506AA MARKING IAGRAMS* 4 KVP05 AYWW KU05 AYW 6N M K = M00 M = ate ode A = Assembly ocation = Wafer ot Y = Year W = Work Week = Pb Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AN002/. ORERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOERRM/. Semiconductor omponents Industries,, 2009 October, 2009 Rev. 2 Publication Order Number: M00VEP05/

2 M00VEP05 Table. PIN ESRIPTION Figure. ead Pinout (Top View) and ogic iagram 7 6 V Q Q V EE Pin 0*, *, 0**, ** E ata Inputs Q, Q E ata Outputs V V EE EP Positive Supply Negative Supply * Pins will default OW when left open. ** Pins will default to V /2when left open. Table 2. TRUT TABE Function (FN only) Thermal exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply (GN) or leave unconnected, floating open. 0 0 Q Q Table 3. ATTRIBUTES haracteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ES Protection uman Body Model Machine Model harged evice Model Moisture Sensitivity, Indefinite Time Out of rypack (Note ) TSSOP FN Pb Pkg evel evel Value 75 k 37.5 k > 4 kv > 200 V > 2 kv Pb Free Pkg evel 3 evel Flammability Rating Oxygen Index: 2 to 34 U 94 V 0.25 in Transistor ount Meets or exceeds JEE Spec EIA/JES7 I atchup Test. For additional information, see Application Note AN003/. 67 evices 2

3 M00VEP05 Table 4. MAXIMUM RATINGS Symbol Parameter ondition ondition 2 Rating Unit V PE Mode Power Supply V EE = 0 V 6 V V EE NE Mode Power Supply V = 0 V 6 V V I PE Mode Input Voltage NE Mode Input Voltage V EE = 0 V V = 0 V I out Output urrent ontinuous Surge V I V 6 V I V EE 6 T A Operating Temperature Range 40 to +5 T stg Storage Temperature Range 65 to +50 JA Thermal Resistance (Junction to Ambient) 0 lfpm 500 lfpm TSSOP TSSOP J Thermal Resistance (Junction to ase) Standard Board TSSOP 4 to 44 /W JA Thermal Resistance (Junction to Ambient) 0 lfpm 500 lfpm FN FN T sol Wave Solder J Thermal Resistance (Junction to ase) (Note 2) FN 35 to 40 /W Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating onditions is not implied. Extended exposure to stresses above the Recommended Operating onditions may affect device reliability. 2. JEE standard multilayer board 2S2P (2 signal, 2 power) V V ma ma /W /W /W /W Table 5. 00EP ARATERISTIS, PE V = 2.5 V, V EE = 0 V (Note 3) Symbol haracteristic Min Typ Max Min Typ Max Min Typ Max Unit I EE Power Supply urrent ma V O Output IG Voltage (Note 4) mv V O Output OW Voltage (Note 4) mv V I Input IG Voltage (Single Ended) mv V I Input OW Voltage (Single Ended) mv V IMR Input IG Voltage ommon Mode Range (ifferential onfiguration) (Notes 5, 6) V I I Input IG urrent A I I Input OW urrent A NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit values are applied individually under normal operating conditions and not valid simultaneously. 3. Input and output parameters vary : with V. V EE can vary V to.3 V. 4. All loading with 50 to V 2.0 V. 5. Single ended input K pin operation is limited to V 3.0 V in PE mode. 6. V IMR min varies : with V EE, V IMR max varies : with V. The V IMR range is referenced to the most positive side of the differential input signal. 3

4 M00VEP05 Table 6. 00EP ARATERISTIS, PE V = 3.3 V, V EE = 0 V (Note 7) Symbol haracteristic Min Typ Max Min Typ Max Min Typ Max Unit I EE Power Supply urrent ma V O Output IG Voltage (Note ) mv V O Output OW Voltage (Note ) mv V I Input IG Voltage (Single Ended) mv V I Input OW Voltage (Single Ended) mv V IMR Input IG Voltage ommon Mode Range (ifferential onfiguration) (Note 9) V I I Input IG urrent A I I Input OW urrent NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit values are applied individually under normal operating conditions and not valid simultaneously. 7. Input and output parameters vary : with V. V EE can vary +0.3 V to 2.2 V.. All loading with 50 to V 2.0 V. 9. V IMR min varies : with V EE, V IMR max varies : with V. The V IMR range is referenced to the most positive side of the differential input signal. A 4

5 M00VEP05 Table 7. 00EP ARATERISTIS, NE V = 0 V, V EE = V to 3.6 V (Note 0) Symbol haracteristic Min Typ Max Min Typ Max Min Typ Max Unit I EE Power Supply urrent ma V O Output IG Voltage (Note ) mv V O Output OW Voltage (Note ) mv V I Input IG Voltage (Single Ended) mv V I Input OW Voltage (Single Ended) mv V IMR Input IG Voltage ommon Mode Range (ifferential onfiguration) (Note 2) V EE V EE V EE V I I Input IG urrent A I I Input OW urrent NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit values are applied individually under normal operating conditions and not valid simultaneously. 0.Input and output parameters vary : with V.. All loading with 50 to V 2.0 V. 2.V IMR min varies : with V EE, V IMR max varies : with V. The V IMR range is referenced to the most positive side of the differential input signal. A Table. A ARATERISTIS V = 0 V; V EE = V to 3.6 V or V = V to 3.6 V; V EE = 0 V (Note 3) Symbol f max t P, t P haracteristic Maximum Frequency (Figure 2) Propagation elay to Output ifferential Min Typ Max Min Typ Max Min Typ Max Unit Gz ps t JITTER RMS Random lock Jitter f in 3.0 Gz (Figure 2) ps V PP Input Voltage Swing (ifferential onfiguration) mv t r Output Rise/Fall Times Q t f (20% 0%) ps NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. evice specification limit values are applied individually under normal operating conditions and not valid simultaneously. 3.Measured using a 750 mv source, 50% duty cycle clock source. All loading with 50 to V 2.0 V. 5

6 M00VEP V OUTamplitude (mvpp) V FREQUENY (Gz) Figure 2. F 25 Q Z o = 50 river evice Receiver evice Q Z o = V TT V TT = V 2.0 V Figure 3. Typical Termination for Output river and evice Evaluation (See Application Note AN020/ Termination of E ogic evices.) 6

7 M00VEP05 ORERING INFORMATION M00VEP05G evice Package Shipping SOI (Pb Free) 9 Units / Rail M00VEP05R2G M00VEP05TG M00VEP05TR2G SOI (Pb Free) TSSOP (Pb Free) TSSOP (Pb Free) 2500 / Tape & Reel 00 Units / Rail 2500 / Tape & Reel M00VEP05MNTXG FN (Pb Free) 000 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BR0/. Resource Reference of Application Notes AN405/ E lock istribution Techniques AN406/ esigning with PE (E at +5.0 V) AN503/ EinPS I/O SPiE Modeling Kit AN504/ Metastability and the EinPS Family AN56/ Interfacing Between VS and E AN672/ The E Translator Guide AN00/ Odd Number ounters esign AN002/ Marking and ate odes AN020/ Termination of E ogic evices AN066/ Interfacing with EinPS AN090/ A haracteristics of E evices 7

8 M00VEP05 PAKAGE IMENSIONS X B Y Z G A 5 4 S 0.25 (0.00) M Z Y S X S 0.25 (0.00) M SEATING PANE Y 0.0 (0.004) M SOI NB ASE ISSUE AJ N X 45 M SOERING FOOTPRINT* K J NOTES:. IMENSIONING AN TOERANING PER ANSI Y4.5M, ONTROING IMENSION: MIIMETER. 3. IMENSION A AN B O NOT INUE MO PROTRUSION. 4. MAXIMUM MO PROTRUSION 0.5 (0.006) PER SIE. 5. IMENSION OES NOT INUE AMBAR PROTRUSION. AOWABE AMBAR PROTRUSION SA BE 0.27 (0.005) TOTA IN EXESS OF TE IMENSION AT MAXIMUM MATERIA ONITION TRU ARE OBSOETE. NEW STANAR IS MIIMETERS INES IM MIN MAX MIN MAX A B G.27 BS BS J K M 0 0 N S SAE 6: mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOERRM/.

9 M00VEP05 PAKAGE IMENSIONS TSSOP T SUFFIX PASTI TSSOP PAKAGE ASE 94R 02 ISSUE A 0.5 (0.006) T 0.5 (0.006) T U U S 2X /2 PIN IENT S 5 x A V K REF (0.004) M T U S V S B U F 0.25 (0.00) M NOTES:. IMENSIONING AN TOERANING PER ANSI Y4.5M, ONTROING IMENSION: MIIMETER. 3. IMENSION A OES NOT INUE MO FAS. PROTRUSIONS OR GATE BURRS. MO FAS OR GATE BURRS SA NOT EXEE 0.5 (0.006) PER SIE. 4. IMENSION B OES NOT INUE INTEREA FAS OR PROTRUSION. INTEREA FAS OR PROTRUSION SA NOT EXEE 0.25 (0.00) PER SIE. 5. TERMINA NUMBERS ARE SOWN FOR REFERENE ONY. 6. IMENSION A AN B ARE TO BE ETERMINE AT ATUM PANE -W (0.004) T SEATING PANE G ETAI E ETAI E W MIIMETERS INES IM MIN MAX MIN MAX A B F G 0.65 BS BS K BS 0.93 BS M

10 M00VEP05 PAKAGE IMENSIONS FN ASE 506AA 0 ISSUE PIN ONE REFERENE 2 X X 0.0 ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ TOP VIEW A B E A NOTES:. IMENSIONING AN TOERANING PER ASME Y4.5M, ONTROING IMENSION: MIIMETERS. 3. IMENSION b APPIES TO PATE TERMINA AN IS MEASURE BETWEEN 0.25 AN 0.30 MM FROM TERMINA. 4. OPANARITY APPIES TO TE EXPOSE PA AS WE AS TE TERMINAS. MIIMETERS IM MIN MAX A A A REF b BS E 2.00 BS E e 0 BS K X 0.0 SEATING PANE A SIE VIEW (A3) X e/2 2 4 e E2 K 5 X b A B NOTE 3 BOTTOM VIEW EinPS is a trademark of Semiconductor omponents Industries, (SI). ON Semiconductor and are registered trademarks of Semiconductor omponents Industries, (SI). SI reserves the right to make changes without further notice to any products herein. SI makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SI assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SI data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SI does not convey any license under its patent rights nor the rights of others. SI products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SI product could create a situation where personal injury or death may occur. Should Buyer purchase or use SI products for any such unintended or unauthorized application, Buyer shall indemnify and hold SI and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SI was negligent regarding the design or manufacture of the part. SI is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBIATION ORERING INFORMATION ITERATURE FUFIMENT: iterature istribution enter for ON Semiconductor P.O. Box 563, enver, olorado 027 USA Phone: or Toll Free USA/anada Fax: or Toll Free USA/anada orderlit@onsemi.com N. American Technical Support: Toll Free USA/anada Europe, Middle East and Africa Technical Support: Phone: Japan ustomer Focus enter Phone: ON Semiconductor Website: Order iterature: For additional information, please contact your local Sales Representative M00VEP05/

MC10EP51, MC100EP V / 5VНECL D Flip Flop with Reset and Differential Clock

MC10EP51, MC100EP V / 5VНECL D Flip Flop with Reset and Differential Clock 3.3V / 5VНEC Flip Flop with Reset and ifferential Clock escription The MC0/00EP5 is a differential clock flip flop with reset. The device is functionally equivalent to the E5 and VE5 devices. The reset

More information

MC100LVELT20 Product Preview 3.3VНLVTTL/LVCMOS to Differential LVPECL Translator Description The MC100LVELT20 is a 3.3 V TTL/CMOS to differential PECL

MC100LVELT20 Product Preview 3.3VНLVTTL/LVCMOS to Differential LVPECL Translator Description The MC100LVELT20 is a 3.3 V TTL/CMOS to differential PECL Product Preview 3.3VНLVTTL/LVCMOS to ifferential LVPECL Translator escription The is a 3.3 V TTL/CMOS to differential PECL translator. Because PECL (Positive ECL) levels are used, only + 3.3 V and ground

More information

MC10ELT22, MC100ELT22. 5VНDual TTL to Differential PECL Translator

MC10ELT22, MC100ELT22. 5VНDual TTL to Differential PECL Translator 5VНual TTL to ifferential PECL Translator The MC0ELT/00ELT22 is a dual TTL to differential PECL translator. Because PECL (Positive ECL) levels are used only +5 V and ground are required. The small outline

More information

MC100EL29. 5VНECL Dual Differential Data and Clock D Flip Flop With Set and Reset

MC100EL29. 5VНECL Dual Differential Data and Clock D Flip Flop With Set and Reset MCE29 5НEC ual ifferential ata and Clock Flip Flop With Set and Reset escription The MCE29 is a dual master slave flip flop. The device features fully differential ata and Clock inputs as well as outputs.

More information

MC100EPT V LVTTL/LVCMOS to LVPECL Translator

MC100EPT V LVTTL/LVCMOS to LVPECL Translator MCEPT622 3.3V VTT/VCMOS to VPEC Translator Description The MCEPT622 is a 0 Bit VTT/VCMOS to VPEC translator. Because VPEC (Positive EC) levels are used only +3.3 V and ground are required. The device has

More information

MC100EL30. 5VНECL Triple D Flip Flop with Set and Reset

MC100EL30. 5VНECL Triple D Flip Flop with Set and Reset MCE30 5VНEC Triple Flip Flop with et and Reset The MCE30 is a triple master slave flip flop with differential outputs. ata enters the master latch when the clock input is OW and transfers to the slave

More information

MC100EPT V LVTTL/LVCMOS to LVPECL Translator Description The MC100EPT622 is a 10- Bit LVTTL/LVCMOS to LVPECL translator. Because LVPECL (Positiv

MC100EPT V LVTTL/LVCMOS to LVPECL Translator Description The MC100EPT622 is a 10- Bit LVTTL/LVCMOS to LVPECL translator. Because LVPECL (Positiv 3.3V VTT/VCMOS to VPEC Translator Description The is a 0- Bit VTT/VCMOS to VPEC translator. Because VPEC (Positive EC) levels are used only +3.3 V and ground are required. The device has an OR- ed enable

More information

MC GHz Low Power Prescaler With Stand-By Mode

MC GHz Low Power Prescaler With Stand-By Mode 2.5 GHz Low Power Prescaler With Stand-By Mode Description The M1295 is a single modulus prescaler for low power frequency division of a 2.5 GHz high frequency input signal. MOSAI V technology is utilized

More information

MC10EP08, MC100EP V / 5V ECL 2-Input Differential XOR/XNOR

MC10EP08, MC100EP V / 5V ECL 2-Input Differential XOR/XNOR MC0EP0, MC00EP0 3.3V / 5V ECL 2-Input ifferential XOR/XNOR escription The MC0/00EP0 is a differential XOR/XNOR gate. The EP0 is ideal for applications requiring the fastest AC performance available. The

More information

MC100EP16VS. 3.3V / 5V ECL Differential Receiver/Driver with Variable Output Swing

MC100EP16VS. 3.3V / 5V ECL Differential Receiver/Driver with Variable Output Swing 3.3V / 5V ECL ifferential Receiver/river with Variable Output Swing escription The MC00EP6VS is a differential receiver with variable output amplitude. The device is functionally equivalent to the 00EP6

More information

MC10EP51, MC100EP V / 5V ECL D Flip-Flop with Reset and Differential Clock

MC10EP51, MC100EP V / 5V ECL D Flip-Flop with Reset and Differential Clock 3.3V / 5V E Flip-Flop with Reset and ifferential lock escription The M0/00EP5 is a differential clock flip flop with reset. The device is functionally equivalent to the E5 and VE5 devices. The reset input

More information

MC10H603, MC100H Bit Latch ECL to TTL Translator

MC10H603, MC100H Bit Latch ECL to TTL Translator 9 Bit atch EC to TT Tralator escription The MC10/100603 is a 9 bit, dual supply EC to TT tralator. evices in the ON Semiconductor 9 bit tralator series utilize the 28 lead PCC for optimal power pinning,

More information

MC10EL16, MC100EL V ECL Differential Receiver

MC10EL16, MC100EL V ECL Differential Receiver MC0EL6, MC00EL6 5.0 V ECL ifferential Receiver The MC0EL/00EL6 is a differential receiver. The device is functionally equivalent to the E6 device with higher performance capabilities. With output transition

More information

MC100EPT VНLVTTL/LVCMOS to LVPECL Translator

MC100EPT VНLVTTL/LVCMOS to LVPECL Translator 3.3VНVTT/VCMOS to VPEC Translator The is a 10 Bit VTT/VCMOS to VPEC translator. Because VPEC (Positive EC) levels are used only +3.3 V and ground are required. The device has an OR ed enable input which

More information

MC10EL33, MC100EL33. 5V ECL 4 Divider

MC10EL33, MC100EL33. 5V ECL 4 Divider 5V EL 4 Divider Description The M0EL/00EL33 is an integrated 4 divider. The differential clock inputs and the V BB allow a differential, single-ended or A coupled interface to the device. The V BB pin,

More information

MC10E137, MC100E VНECL 8-Bit Ripple Counter

MC10E137, MC100E VНECL 8-Bit Ripple Counter 5 VНEC 8-Bit Ripple Counter escription The MC10E/100E137 is a very high speed binary ripple counter. The two least significant bits were designed with very fast edge rates while the more significant bits

More information

NBXDBA V, MHz / MHz LVPECL Clock Oscillator

NBXDBA V, MHz / MHz LVPECL Clock Oscillator . V, 106.25 MHz / 212.5 MHz LVPECL Clock Oscillator The NBXBA012 dual frequency crystal oscillator (XO) is designed to meet today s requirements for. V LVPECL clock generation applications. The device

More information

MC100EL14. 5V ECL 1:5 Clock Distribution Chip

MC100EL14. 5V ECL 1:5 Clock Distribution Chip MC100E14 5V EC 1:5 Clock Distribution Chip The MC100E14 is a low skew 1:5 clock distribution chip designed explicitly for low skew clock distribution applications. The V BB pin, an internally generated

More information

NBXDBA V, 75 MHz / 150 MHz LVPECL Clock Oscillator

NBXDBA V, 75 MHz / 150 MHz LVPECL Clock Oscillator . V, 75 MHz / 150 MHz LVPECL Clock Oscillator The NBXBA009 dual frequency crystal oscillator (XO) is designed to meet today s requirements for. V LVPECL clock generation applications. The device uses a

More information

MARKING DIAGRAMS* ORDERING INFORMATION 8 1 SO 8 D SUFFIX CASE 751 KEP51 ALYW HEP51 ALYW 8 1 TSSOP 8 DT SUFFIX CASE 948R KP51 ALYW

MARKING DIAGRAMS* ORDERING INFORMATION 8 1 SO 8 D SUFFIX CASE 751 KEP51 ALYW HEP51 ALYW 8 1 TSSOP 8 DT SUFFIX CASE 948R KP51 ALYW The MC0/EP5 is a differential clock flip flop with reset. The device is functionally equivalent to the E5 and VE5 devices. The reset input is an asynchronous, level triggered signal. ata enters the master

More information

NBXDBA019, NBXHBA019, NBXSBA V, 125 MHz / 250 MHz LVPECL Clock Oscillator

NBXDBA019, NBXHBA019, NBXSBA V, 125 MHz / 250 MHz LVPECL Clock Oscillator NBXBA019, NBXHBA019, NBXSBA019. V, 15 MHz / 50 MHz LVPECL Clock Oscillator The single and dual frequency crystal oscillator (XO) is designed to meet today s requirements for. V LVPECL clock generation

More information

MC100LVEL V ECL D Flip Flop with Set and Reset

MC100LVEL V ECL D Flip Flop with Set and Reset M00VE3 3.3V E Flip Flop with et and Reset escription The M00VE3 is a flip-flop with set and reset. The device is functionally equivalent to the E3 device but operates from a 3.3 V supply. With propagation

More information

NB4N121K. 3.3V Differential 1:21 Differential Fanout Clock Driver with HCSL level Output

NB4N121K. 3.3V Differential 1:21 Differential Fanout Clock Driver with HCSL level Output 3.3V ifferential 1:21 ifferential Fanout lock river with HSL level Output escription The is a lock differential input fanout distribution 1 to 21 HSL level differential outputs, optimized for ultra low

More information

NBXDBA V, 62.5 MHz / 125 MHz LVPECL Clock Oscillator

NBXDBA V, 62.5 MHz / 125 MHz LVPECL Clock Oscillator . V, 62.5 MHz / 125 MHz LVPECL Clock Oscillator The NBXBA014 dual frequency crystal oscillator (XO) is designed to meet today s requirements for. V LVPECL clock generation applications. The device uses

More information

NBXSBA /3.3 V, MHz LVPECL Clock Oscillator

NBXSBA /3.3 V, MHz LVPECL Clock Oscillator 2.5/. V, 5. MHz LVPECL Clock Oscillator The NBXSBA051, single frequency, crystal oscillator (XO) is designed to meet today s requirements for 2.5/. V LVPECL clock generation applications. The device uses

More information

NBXHGA /3.3 V, MHz LVPECL Clock Oscillator

NBXHGA /3.3 V, MHz LVPECL Clock Oscillator 2.5/. V, 125.00 MHz LVPECL Clock Oscillator The NBXHGA019, single frequency, crystal oscillator (XO) is designed to meet today s requirements for 2.5/. V LVPECL clock generation applications. The device

More information

NBXDPA V / 3.3 V, MHz / MHz LVDS Clock Oscillator

NBXDPA V / 3.3 V, MHz / MHz LVDS Clock Oscillator 2.5 V / 3.3 V, 156.25 MHz / 312.5 MHz LVS Clock Oscillator The NBXPA017 dual frequency crystal oscillator (XO) is designed to meet today s requirements for 2.5 V and 3.3 V LVS clock generation applications.

More information

MC10EL31, MC100EL31. 5 V ECL D Flip Flop With Set and Reset

MC10EL31, MC100EL31. 5 V ECL D Flip Flop With Set and Reset M0E3, M00E3 5 V E Flip Flop With et and Reset The M0E/00E3 is a flip-flop with set and reset. The device is functionally equivalent to the E3 device with higher performance capabilities. With propagation

More information

MC100EPT V Dual LVTTL/LVCMOS to Differential LVPECL Translator

MC100EPT V Dual LVTTL/LVCMOS to Differential LVPECL Translator 3.3V ual LVTTL/LVMOS to ifferential LVPEL Translator escription The is a dual LVTTL/LVMOS to differential LVPEL translator. Because LVPEL (Positive EL) levels are used only +3.3 V and ground are required.

More information

NBVSPA V, MHz LVDS Voltage-Controlled Clock Oscillator (VCXO) PureEdge Product Series

NBVSPA V, MHz LVDS Voltage-Controlled Clock Oscillator (VCXO) PureEdge Product Series 2.5 V, 212.00 MHz LVS Voltage-Controlled Clock Oscillator (VCXO) PureEdge Product Series The NBVSPA01 voltage controlled crystal oscillator (VCXO) is designed to meet today s requirements for 2.5 V LVS

More information

NBXSBA024, NBXSBB024, NBXMBB V / 3.3 V, MHz LVPECL Clock Oscillator

NBXSBA024, NBXSBB024, NBXMBB V / 3.3 V, MHz LVPECL Clock Oscillator NBXSBA0, NBXSBB0, NBXMBB0.5 V /. V, 6.08 MHz LVPECL Clock Oscillator The single frequency, crystal oscillator (XO) is designed to meet today s requirements for.5 V /. V LVPECL clock generation applications.

More information

MC10ELT24, MC100ELT24. 5V TTL to Differential ECL Translator

MC10ELT24, MC100ELT24. 5V TTL to Differential ECL Translator M0ELT24, M00ELT24 5V TTL to ifferential EL Translator escription The M0ELT/00ELT24 is a TTL to differential EL translator. Because EL levels are used a +5 V, 5.2 V (or 4.5 V) and ground are required. The

More information

MC10EP57, MC100EP V / 5V ECL 4:1 Differential Multiplexer

MC10EP57, MC100EP V / 5V ECL 4:1 Differential Multiplexer 3.3V / 5V ECL 4:1 Differential Multiplexer Description The MC10/100EP57 is a fully differential 4:1 multiplexer. By leaving the SEL1 line open (pulled LOW via the input pulldown resistors) the device can

More information

74HCT157. Quad 2 Input Data Selectors / Multiplexers. High Performance Silicon Gate CMOS

74HCT157. Quad 2 Input Data Selectors / Multiplexers. High Performance Silicon Gate CMOS 74HCT57 Quad 2 Input Data Selectors / Multiplexers High Performance Silicon Gate CMOS The 74HCT57 is identical in pinout to the S57. The device inputs are compatible with standard CMOS outputs; with pullup

More information

NL27WZ07. Dual Buffer with Open Drain Outputs

NL27WZ07. Dual Buffer with Open Drain Outputs Dual Buffer with Open Drain Outputs The N27WZ07 is a high performance dual buffer with open drain outputs operating from a.5 to 5.5 V supply. The internal circuit is composed of multiple stages, including

More information

NBXDPA V / 3.3 V, 125 MHz / 250 MHz LVDS Clock Oscillator

NBXDPA V / 3.3 V, 125 MHz / 250 MHz LVDS Clock Oscillator 2.5 V / 3.3 V, 125 MHz / 250 MHz LVS Clock Oscillator The NBXPA019 dual frequency crystal oscillator (XO) is designed to meet today s requirements for 2.5 V and 3.3 V LVS clock generation applications.

More information

MC10EP142, MC100EP V / 5 VНECL 9 Bit Shift Register

MC10EP142, MC100EP V / 5 VНECL 9 Bit Shift Register MCEP42, MCEP42 3.3 V / 5 VНECL 9 Bit Shift Register The MCEP/EP42 is a 9 bit shift register, designed with byte-parity applications in mind. The MC/EP42 is capable of performing serial/parallel data into

More information

LOGIC DIAGRAM AND PINOUT ASSIGNMENT V CC TTL PECL 3. MARKING DIAGRAMS* ORDERING INFORMATION PIN DESCRIPTION HLT20 ALYW KLT20 ALYW

LOGIC DIAGRAM AND PINOUT ASSIGNMENT V CC TTL PECL 3.   MARKING DIAGRAMS* ORDERING INFORMATION PIN DESCRIPTION HLT20 ALYW KLT20 ALYW The MC0ELT/00ELT20 is a TTL to differential PECL translator. Because PECL (Positive ECL) levels are used, only +5 V and ground are required. The small outline -lead package and the single gate of the ELT20

More information

NB4N855S 3.3 V, 1.5 Gb/s Dual AnyLevel to LVDS Receiver/Driver/Buffer/ Translator

NB4N855S 3.3 V, 1.5 Gb/s Dual AnyLevel to LVDS Receiver/Driver/Buffer/ Translator 3.3 V,.5 Gb/s ual AnyLevel to LVS Receiver/river/Buffer/ Translator escription NB4N55S is a clock or data Receiver/river/Buffer/Translator capable of translating AnyLevel input signal (LVPECL, CML, HSTL,

More information

MC10H600, MC100H Bit TTL to ECL Translator

MC10H600, MC100H Bit TTL to ECL Translator MC10600, MC100600 9 Bit TT to EC Translator Description The MC10/100600 is a 9 bit, dual supply TT to EC translator. Devices in the ON Semiconductor 9 bit translator series utilize the PCC 28 for optimal

More information

NB3N502/D. 14 MHz to 190 MHz PLL Clock Multiplier

NB3N502/D. 14 MHz to 190 MHz PLL Clock Multiplier 4 MHz to 90 MHz PLL Clock Multiplier Description The NB3N502 is a clock multiplier device that generates a low jitter, TTL/CMOS level output clock which is a precise multiple of the external input reference

More information

NTMFS5C604NL. Power MOSFET. 60 V, 1.2 m, 276 A, Single N Channel

NTMFS5C604NL. Power MOSFET. 60 V, 1.2 m, 276 A, Single N Channel NTMFSC64NL Power MOSFET 6 V,. m, 76 A, Single N Channel Features Small Footprint (x6 mm) for Compact esign Low R S(on) to Minimize Conduction Losses Low Q G and Capacitance to Minimize river Losses These

More information

MC10H645. 1:9 TTL Clock Driver

MC10H645. 1:9 TTL Clock Driver MC10645 1:9 TT Clock Driver Description The MC10645 is a single supply, low skew, TT I/O 1:9 Clock Driver. Devices in the 600 clock driver family utilizes the PCC 28 for optimal power and signal pin placement.

More information

NTR4170NT3G. Power MOSFET. 30 V, 3.1 A, Single N Channel, SOT 23

NTR4170NT3G. Power MOSFET. 30 V, 3.1 A, Single N Channel, SOT 23 NTR47N Power MOSFET V,. A, Single N Channel, SOT Features Low R S(on) Low Gate Charge Low Threshold Voltage Halide Free This is a Pb Free evice Applications Power Converters for Portables Battery Management

More information

NB7V52M. 1.8V / 2.5V Differential D Flip-Flop w/ Reset and CML Outputs. Multi Level Inputs w/ Internal Termination

NB7V52M. 1.8V / 2.5V Differential D Flip-Flop w/ Reset and CML Outputs. Multi Level Inputs w/ Internal Termination 1.8V / 2.5V ifferential Flip-Flop w/ Reset and CML Outputs Multi Level Inputs w/ Internal Termination escription The is a 10 GHz differential flip flop with a differential asynchronous Reset. The differential

More information

MM3Z2V4T1 SERIES. Zener Voltage Regulators. 200 mw SOD 323 Surface Mount

MM3Z2V4T1 SERIES. Zener Voltage Regulators. 200 mw SOD 323 Surface Mount Zener Voltage Regulators mw Surface Mount This series of Zener diodes is packaged in a surface mount package that has a power dissipation of mw. They are designed to provide voltage regulation protection

More information

NB3N508S. 3.3V, 216 MHz PureEdge VCXO Clock Generator with M LVDS Output

NB3N508S. 3.3V, 216 MHz PureEdge VCXO Clock Generator with M LVDS Output 3.3V, 216 MHz PureEdge VCXO Clock Generator with M LVDS Output Description The NB3N508S is a high precision, low phase noise Voltage Controlled Crystal Oscillator (VCXO) and phase lock loop (PLL) that

More information

MC100LVELT22 3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator Description The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL trans

MC100LVELT22 3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator Description The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL trans 3.3V ual LVTTL/LVMOS to ifferential LVPEL Translator escription The is a dual LVTTL/LVMOS to differential LVPEL translator. ecause LVPEL (Low Voltage Positive EL) levels are used, only +3.3 V and ground

More information

NTJS3151P. Trench Power MOSFET. 12 V, 3.3 A, Single P Channel, ESD Protected SC 88

NTJS3151P. Trench Power MOSFET. 12 V, 3.3 A, Single P Channel, ESD Protected SC 88 NTJS5P Trench Power MOSFET V,. A, Single P Channel, ES Protected SC 88 Features Leading Trench Technology for Low R S(ON) Extending Battery Life SC 88 Small Outline (x mm, SC7 Equivalent) Gate iodes for

More information

MC10EL52, MC100EL52. 5V ECL Differential Data and Clock D Flip Flop

MC10EL52, MC100EL52. 5V ECL Differential Data and Clock D Flip Flop 5 EL ifferential ata and lock Flip Flop escription The M0EL/00EL52 is a differential data, differential clock flip-flop with reset. The device is functionally equivalent to the E452 device with higher

More information

NVTFS5124PL. Power MOSFET 60 V, 6 A, 260 m, Single P Channel

NVTFS5124PL. Power MOSFET 60 V, 6 A, 260 m, Single P Channel Power MOSFET V, A, m, Single P Channel Features Small Footprint (3.3 x 3.3 mm) for Compact esign Low R S(on) to Minimize Conduction Losses Low Q G and Capacitance to Minimize river Losses NVTFS5PLWF Wettable

More information

NVTFS5826NL. Power MOSFET 60 V, 24 m, 20 A, Single N Channel

NVTFS5826NL. Power MOSFET 60 V, 24 m, 20 A, Single N Channel Power MOSFET 6 V, 24 m, 2 A, Single N Channel Features Small Footprint (3.3 x 3.3 mm) for Compact esign Low R S(on) to Minimize Conduction Losses Low Capacitance to Minimize river Losses NVTFS5826NLWF

More information

NB6L V / 3.3V Differential 2 X 2 Crosspoint Switch with LVPECL Outputs. Multi-Level Inputs w/ Internal Termination

NB6L V / 3.3V Differential 2 X 2 Crosspoint Switch with LVPECL Outputs. Multi-Level Inputs w/ Internal Termination .5V / 3.3V ifferential X Crosspoint Switch with LVPECL Outputs Multi-Level Inputs w/ Internal Termination escription The NB6L7 is a clock or data high-bandwidth fully differential x Crosspoint Switch with

More information

MC10EP11, MC100EP V / 5V ECL 1:2 Differential Fanout Buffer

MC10EP11, MC100EP V / 5V ECL 1:2 Differential Fanout Buffer 3.3V / 5V EL :2 ifferential Fanout Buffer escription The M0/00EP is a differential :2 fanout buffer. The device is pin and functionally equivalent to the LVEL device. With performance much faster than

More information

NTMFS4936NCT3G. NTMFS4936NC Power MOSFET 30 V, 79 A, Single N Channel, SO 8 FL

NTMFS4936NCT3G. NTMFS4936NC Power MOSFET 30 V, 79 A, Single N Channel, SO 8 FL NTMFS4936N, NTMFS4936NC Power MOSFET 3 V, 79 A, Single N Channel, Features Low R S(on), Low Capacitance and Optimized Gate Charge to Minimize Conduction, river and Switching Losses Next Generation Enhanced

More information

NTMFS5H409NL. Power MOSFET. 40 V, 1.1 m, 270 A, Single N Channel

NTMFS5H409NL. Power MOSFET. 40 V, 1.1 m, 270 A, Single N Channel Power MOSFET 4 V,. m, 7 A, Single N Channel Features Small Footprint (5x6 mm) for Compact esign Low R S(on) to Minimize Conduction Losses Low Q G and Capacitance to Minimize river Losses These evices are

More information

NVTFS5116PL. Power MOSFET. 60 V, 14 A, 52 m, Single P Channel

NVTFS5116PL. Power MOSFET. 60 V, 14 A, 52 m, Single P Channel Power MOSFET 6 V, 4 A, 52 m, Single P Channel Features Small Footprint (3.3 x 3.3 mm) for Compact esign Low R S(on) to Minimize Conduction Losses Low Capacitance to Minimize river Losses NVTFS56PLWF Wettable

More information

MC100EPT V Dual LVTTL/LVCMOS to Differential LVPECL Translator

MC100EPT V Dual LVTTL/LVCMOS to Differential LVPECL Translator M00EPT22 3.3V ual LVTTL/LVMOS to ifferential LVPEL Translator escription The M00EPT22 is a dual LVTTL/LVMOS to differential LVPEL translator. Because LVPEL (Positive EL) levels are used only +3.3 V and

More information

NL27WZ17. Dual Non-Inverting Schmitt Trigger Buffer

NL27WZ17. Dual Non-Inverting Schmitt Trigger Buffer Dual Non-Inverting Schmitt Trigger Buffer The N7WZ7 is a high performance dual buffer operating from a to supply. At =, high impedance TT compatible inputs significantly reduce current loading to input

More information

MARKING DIAGRAMS* ORDERING INFORMATION KPT23 ALYW SO 8 D SUFFIX CASE 751 TSSOP 8 DT SUFFIX CASE 948R KA23 ALYW

MARKING DIAGRAMS* ORDERING INFORMATION KPT23 ALYW SO 8 D SUFFIX CASE 751 TSSOP 8 DT SUFFIX CASE 948R KA23 ALYW The MC00EPT23 is a dual differential LVPECL to LVTTL translator. Because LVPECL (Positive ECL) levels are used, only +3.3 V and ground are required. The small outline -lead package and the dual gate design

More information

MC10EPT20, MC100EPT V LVTTL/LVCMOS to Differential LVPECL Translator

MC10EPT20, MC100EPT V LVTTL/LVCMOS to Differential LVPECL Translator 3.3V LVTTL/LVMOS to ifferential LVPEL Translator The M0EPT20 is a 3.3 V TTL/MOS to differential PEL translator. Because PEL (Positive EL) levels are used, only +3.3 V and ground are required. The small

More information

NTMFS4H01N Power MOSFET

NTMFS4H01N Power MOSFET NTMFS4HN Power MOSFET V, 334 A, Single N Channel, SO 8FL Features Optimized esign to Minimize Conduction and Switching Losses Optimized Package to Minimize Parasitic Inductances Optimized material for

More information

MBD301G, MMBD301LT1G. Silicon Hot-Carrier Diodes. SCHOTTKY Barrier Diodes 30 VOLTS SILICON HOT CARRIER DETECTOR AND SWITCHING DIODES

MBD301G, MMBD301LT1G. Silicon Hot-Carrier Diodes. SCHOTTKY Barrier Diodes 30 VOLTS SILICON HOT CARRIER DETECTOR AND SWITCHING DIODES Silicon Hot-Carrier iodes SCHOTTKY Barrier iodes These devices are designed primarily for high efficiency UHF and VHF detector applications. They are readily adaptable to many other fast switching RF and

More information

P2I2305NZ. 3.3V 1:5 Clock Buffer

P2I2305NZ. 3.3V 1:5 Clock Buffer 3.3V :5 Clock Buffer Functional Description P2I2305NZ is a low cost high speed buffer designed to accept one clock input and distribute up to five clocks in mobile PC systems and desktop PC systems. The

More information

MUN5316DW1, NSBC143TPDXV6. Complementary Bias Resistor Transistors R1 = 4.7 k, R2 = k. NPN and PNP Transistors with Monolithic Bias Resistor Network

MUN5316DW1, NSBC143TPDXV6. Complementary Bias Resistor Transistors R1 = 4.7 k, R2 = k. NPN and PNP Transistors with Monolithic Bias Resistor Network MUN3W, NSB3TPXV omplementary Bias Resistor Transistors R =.7 k, R2 = k NPN and PNP Transistors with Monolithic Bias Resistor Network This series of digital transistors is designed to replace a single device

More information

MC10E136, MC100E136. 5VНECL 6-Bit Universal Up/Down Counter

MC10E136, MC100E136. 5VНECL 6-Bit Universal Up/Down Counter 5VНEC 6-Bit Universal Up/own Counter escription The MC10E/100E136 is a 6-bit synchronous, presettable, cascadable universal counter. The device generates a look-ahead-carry output and accepts a look-ahead-carry

More information

NB3N853531E. 3.3 V Xtal or LVTTL/LVCMOS Input 2:1 MUX to 1:4 LVPECL Fanout Buffer

NB3N853531E. 3.3 V Xtal or LVTTL/LVCMOS Input 2:1 MUX to 1:4 LVPECL Fanout Buffer 3.3 V Xtal or LVTTL/LVCMOS Input 2:1 MUX to 1:4 LVPECL Fanout Buffer Description The NB3N853531E is a low skew 3.3 V supply 1:4 clock distribution fanout buffer. An input MUX selects either a Fundamental

More information

7WB Bit Bus Switch. The 7WB3126 is an advanced high speed low power 2 bit bus switch in ultra small footprints.

7WB Bit Bus Switch. The 7WB3126 is an advanced high speed low power 2 bit bus switch in ultra small footprints. 2-Bit Bus Switch The WB326 is an advanced high speed low power 2 bit bus switch in ultra small footprints. Features High Speed: t PD = 0.25 ns (Max) @ V CC = 4.5 V 3 Switch Connection Between 2 Ports Power

More information

MC100EP016A. 3.3 VНECL 8 Bit Synchronous Binary Up Counter

MC100EP016A. 3.3 VНECL 8 Bit Synchronous Binary Up Counter 3.3 VНEC 8 Bit Synchronous Binary Up Counter Description The MC100EP016A is a high speed synchronous, presettable, cascadeable 8 bit binary counter. Architecture and operation are the same as the ECinPS

More information

NB6L V/3.3 V Multilevel Input to Differential LVPECL/LVNECL 1:2 Clock or Data Fanout Buffer/Translator

NB6L V/3.3 V Multilevel Input to Differential LVPECL/LVNECL 1:2 Clock or Data Fanout Buffer/Translator .5 V/3.3 V Multilevel Input to ifferential LVPECL/LVNECL : Clock or ata Fanout Buffer/Translator The NB6L is an enhanced differential : clock or data fanout buffer/translator. The device has the same pinout

More information

NB2879A. Low Power, Reduced EMI Clock Synthesizer

NB2879A. Low Power, Reduced EMI Clock Synthesizer Low Power, Reduced EMI Clock Synthesizer The NB2879A is a versatile spread spectrum frequency modulator designed specifically for a wide range of clock frequencies. The NB2879A reduces ElectroMagnetic

More information

NB7L32M. 2.5V/3.3V, 14GHz 2 Clock Divider w/cml Output and Internal Termination

NB7L32M. 2.5V/3.3V, 14GHz 2 Clock Divider w/cml Output and Internal Termination 2.5V/3.3V, 14GHz 2 Clock ivider w/cml Output and Internal Termination escription The NB7L32M is an integrated 2 divider with differential clock inputs and asynchronous reset. ifferential clock inputs incorporate

More information

MUN5214DW1, NSBC114YDXV6, NSBC114YDP6 Dual NPN Bias Resistor Transistors R1 = 10 k, R2 = 47 k

MUN5214DW1, NSBC114YDXV6, NSBC114YDP6 Dual NPN Bias Resistor Transistors R1 = 10 k, R2 = 47 k MUN524W, NSB4YXV6, NSB4YP6 ual NPN Bias Resistor Transistors R = 0 k, R2 = 47 k NPN Transistors with Monolithic Bias Resistor Network This series of digital transistors is designed to replace a single

More information

NTNUS3171PZ. Small Signal MOSFET. 20 V, 200 ma, Single P Channel, 1.0 x 0.6 mm SOT 1123 Package

NTNUS3171PZ. Small Signal MOSFET. 20 V, 200 ma, Single P Channel, 1.0 x 0.6 mm SOT 1123 Package NTNUS7PZ Small Signal MOSFET V, ma, Single P Channel,. x.6 mm SOT Package Features Single P Channel MOSFET Offers a Low R DS(on) Solution in the Ultra Small. x.6 mm Package. V Gate Voltage Rating Ultra

More information

PZTA92T1. High Voltage Transistor. PNP Silicon SOT 223 PACKAGE PNP SILICON HIGH VOLTAGE TRANSISTOR SURFACE MOUNT

PZTA92T1. High Voltage Transistor. PNP Silicon SOT 223 PACKAGE PNP SILICON HIGH VOLTAGE TRANSISTOR SURFACE MOUNT High Voltage Transistor PNP Silicon Features These Devices are Pb Free, Halogen Free/BFR Free and are RoHS Compliant MAXIMUM RATINGS (T C = 25 C unless otherwise noted) Rating Symbol Value Unit Collector-Emitter

More information

MUN5331DW1, NSBC123EPDXV6. Complementary Bias Resistor Transistors R1 = 2.2 k, R2 = 2.2 k

MUN5331DW1, NSBC123EPDXV6. Complementary Bias Resistor Transistors R1 = 2.2 k, R2 = 2.2 k MUN5W, NSBEPXV6 omplementary Bias Resistor Transistors R =. k, R =. k NPN and PNP Transistors with Monolithic Bias Resistor Network This series of digital transistors is designed to replace a single device

More information

NUF4211MNT1G. 4-Channel EMI Filter with Integrated ESD Protection

NUF4211MNT1G. 4-Channel EMI Filter with Integrated ESD Protection 4-hannel EMI Filter with Integrated ESD Protection The NUF4211MN is a four channel ( R ) Pi style EMI filter array with integrated ESD protection. Its typical component values of R = 100 and = 8.5 pf deliver

More information

MC10E137, MC100E VНECL 8-Bit Ripple Counter

MC10E137, MC100E VНECL 8-Bit Ripple Counter 5 НEC 8-Bit ipple Counter escription The MC10E/100E137 is a very high speed binary ripple counter. The two least significant bits were designed with very fast edge rates while the more significant bits

More information

NTTFS5116PLTWG. Power MOSFET 60 V, 20 A, 52 m. Low R DS(on) Fast Switching These Devices are Pb Free and are RoHS Compliant

NTTFS5116PLTWG. Power MOSFET 60 V, 20 A, 52 m. Low R DS(on) Fast Switching These Devices are Pb Free and are RoHS Compliant Power MOSFET 6 V, 2 A, 52 m Features Low R DS(on) Fast Switching These Devices are Pb Free and are RoHS Compliant Applications Load Switches DC Motor Control DC DC Conversion MAXIMUM RATINGS ( unless otherwise

More information

MMSZ5221BT1 Series. Zener Voltage Regulators. 500 mw SOD 123 Surface Mount

MMSZ5221BT1 Series. Zener Voltage Regulators. 500 mw SOD 123 Surface Mount MMSZ5BT Series Preferred Device Zener Voltage Regulators 5 mw SOD 3 Surface Mount Three complete series of Zener diodes are offered in the convenient, surface mount plastic SOD 3 package. These devices

More information

NUP4302MR6T1G. Schottky Diode Array for Four Data Line ESD Protection

NUP4302MR6T1G. Schottky Diode Array for Four Data Line ESD Protection Schottky Diode Array for Four Data Line ESD Protection The NUP432MR6 is designed to protect high speed data line interface from ESD, EFT and lighting. Features Very Low Forward Voltage Drop Fast Switching

More information

BAT54CLT3G SBAT54CLT1G. Dual Common Cathode Schottky Barrier Diodes 30 VOLT DUAL COMMON CATHODE SCHOTTKY BARRIER DIODES

BAT54CLT3G SBAT54CLT1G. Dual Common Cathode Schottky Barrier Diodes 30 VOLT DUAL COMMON CATHODE SCHOTTKY BARRIER DIODES BAT54CLTG, SBAT54CLTG Dual Common Cathode Schottky Barrier Diodes These Schottky barrier diodes are designed for high speed switching applications, circuit protection, and voltage clamping. Extremely low

More information

MC10H352. Quad CMOS to PECL* Translator

MC10H352. Quad CMOS to PECL* Translator Quad CMOS to PECL* Translator Description The MC10H352 is a quad translator for interfacing data between a CMOS logic section and the PECL section of digital systems when only a +5.0 Vdc power supply is

More information

P3P85R01A. 3.3V, 75 MHz to 200 MHz LVCMOS TIMING SAFE Peak EMI Reduction Device

P3P85R01A. 3.3V, 75 MHz to 200 MHz LVCMOS TIMING SAFE Peak EMI Reduction Device 3.3V, 75 MHz to 200 MHz LVCMOS TIMING SAFE Peak EMI Reduction Device Functional Description P3P85R0A is a versatile, 3.3 V, LVCMOS, wide frequency range, TIMING SAFE Peak EMI reduction device. TIMING SAFE

More information

NSQA6V8AW5T2 Series Transient Voltage Suppressor

NSQA6V8AW5T2 Series Transient Voltage Suppressor Transient Voltage Suppressor ESD Protection Diode with Low Clamping Voltage This integrated transient voltage suppressor device (TVS) is designed for applications requiring transient overvoltage protection.

More information

MJD44H11 (NPN) MJD45H11 (PNP) Complementary Power Transistors. DPAK For Surface Mount Applications

MJD44H11 (NPN) MJD45H11 (PNP) Complementary Power Transistors. DPAK For Surface Mount Applications MJDH (NPN) MJD5H (PNP) Complementary Power Transistors For Surface Mount Applications Designed for general purpose power and switching such as output or driver stages in applications such as switching

More information

NTGS3441BT1G. Power MOSFET. -20 V, -3.5 A, Single P-Channel, TSOP-6. Low R DS(on) in TSOP-6 Package 2.5 V Gate Rating This is a Pb-Free Device

NTGS3441BT1G. Power MOSFET. -20 V, -3.5 A, Single P-Channel, TSOP-6. Low R DS(on) in TSOP-6 Package 2.5 V Gate Rating This is a Pb-Free Device Power MOSFET - V, -. A, Single P-Channel, TSOP- Features Low R DS(on) in TSOP- Package. V Gate Rating This is a Pb-Free Device Applications Battery Switch and Load Management Applications in Portable Equipment

More information

NTTFS5820NLTWG. Power MOSFET. 60 V, 37 A, 11.5 m. Low R DS(on) Low Capacitance Optimized Gate Charge These Devices are Pb Free and are RoHS Compliant

NTTFS5820NLTWG. Power MOSFET. 60 V, 37 A, 11.5 m. Low R DS(on) Low Capacitance Optimized Gate Charge These Devices are Pb Free and are RoHS Compliant NTTFS582NL Power MOSFET 6 V, 37 A,.5 m Features Low R DS(on) Low Capacitance Optimized Gate Charge These Devices are Pb Free and are RoHS Compliant MAXIMUM RATINGS ( unless otherwise stated) Parameter

More information

NTMS5835NL. Power MOSFET 40 V, 12 A, 10 m

NTMS5835NL. Power MOSFET 40 V, 12 A, 10 m Power MOSFET V, 2 A, m Features Low R DS(on) Low Capacitance Optimized Gate Charge These Devices are Pb Free, Halogen Free/BFR Free and are RoHS Compliant MAXIMUM RATINGS ( unless otherwise stated) Parameter

More information

NTHS2101P. Power MOSFET. 8.0 V, 7.5 A P Channel ChipFET

NTHS2101P. Power MOSFET. 8.0 V, 7.5 A P Channel ChipFET NTHSP Power MOSFET. V,. A P Channel ChipFET Features Offers an Ultra Low R S(on) Solution in the ChipFET Package Miniature ChipFET Package % Smaller Footprint than TSOP making it an Ideal evice for Applications

More information

NB6N11S. 3.3 V 1:2 AnyLevel Input to LVDS Fanout Buffer / Translator

NB6N11S. 3.3 V 1:2 AnyLevel Input to LVDS Fanout Buffer / Translator NB6NS 3.3 V :2 AnyLevel Input to LVS Fanout Buffer / Translator escription The NB6NS is a differential :2 Clock or ata Receiver and will accept AnyLevel input signals: LVPECL, CML, LVCMOS, LVTTL, or LVS.

More information

NTGD4167C. Power MOSFET Complementary, 30 V, +2.9/ 2.2 A, TSOP 6 Dual

NTGD4167C. Power MOSFET Complementary, 30 V, +2.9/ 2.2 A, TSOP 6 Dual Power MOSFET Complementary, 3 V, +.9/. A, TSOP 6 Dual Features Complementary N Channel and P Channel MOSFET Small Size (3 x 3 mm) Dual TSOP 6 Package Leading Edge Trench Technology for Low On Resistance

More information

MC100EPT22/D. MARKING DIAGRAMS* ORDERING INFORMATION SO 8 D SUFFIX CASE 751 KPT22 ALYW TSSOP 8 DT SUFFIX CASE 948R KA22 ALYW

MC100EPT22/D.   MARKING DIAGRAMS* ORDERING INFORMATION SO 8 D SUFFIX CASE 751 KPT22 ALYW TSSOP 8 DT SUFFIX CASE 948R KA22 ALYW The MC00EPT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL (Positive ECL) levels are used only +3.3 V and ground are required. The small outline lead package and the single

More information

NB3L553/D. 2.5 V / 3.3 V / 5.0 V 1:4 Clock Fanout Buffer

NB3L553/D. 2.5 V / 3.3 V / 5.0 V 1:4 Clock Fanout Buffer 2.5 V / 3.3 V / 5.0 V :4 lock Fanout Buffer Description The NB3L553 is a low skew to 4 clock fanout buffer, designed for clock distribution in mind. The NB3L553 specifically guarantees low output to output

More information

NSS40500UW3T2G. 40 V, 6.0 A, Low V CE(sat) PNP Transistor. 40 VOLTS 6.0 AMPS PNP LOW V CE(sat) TRANSISTOR EQUIVALENT R DS(on) 65 m

NSS40500UW3T2G. 40 V, 6.0 A, Low V CE(sat) PNP Transistor. 40 VOLTS 6.0 AMPS PNP LOW V CE(sat) TRANSISTOR EQUIVALENT R DS(on) 65 m 4, 6. A, Low E(sat) PNP Transistor ON Semiconductor s e PowerEdge family of low E(sat) transistors are miniature surface mount devices featuring ultra low saturation voltage ( E(sat) ) and high current

More information

NCP304A. Voltage Detector Series

NCP304A. Voltage Detector Series Voltage Detector Series The NCP0A is a second generation ultralow current voltage detector. This device is specifically designed for use as a reset controller in portable microprocessor based systems where

More information

MC100EP V 2:1:9 Differential HSTL/PECL/LVDS to HSTL Clock Driver with LVTTL Clock Select and Enable

MC100EP V 2:1:9 Differential HSTL/PECL/LVDS to HSTL Clock Driver with LVTTL Clock Select and Enable 3.3 2:: Differential HSTL/PECL/LDS to HSTL Clock Driver with LTTL Clock Select and Enable Description The MC00EP80 is a low skew 2:: differential clock driver, designed with clock distribution in mind,

More information

NTMS5838NL. Power MOSFET 40 V, 7.5 A, 20 m

NTMS5838NL. Power MOSFET 40 V, 7.5 A, 20 m Power MOSFET V, 7.5 A, 2 m Features Low R DS(on) Low Capacitance Optimized Gate Charge These Devices are Pb Free, Halogen Free/BFR Free and are RoHS Compliant MAXIMUM RATINGS ( unless otherwise stated)

More information

NTS4172NT1G. Power MOSFET. 30 V, 1.7 A, Single N Channel, SC 70. Low On Resistance Low Gate Threshold Voltage Halide Free This is a Pb Free Device

NTS4172NT1G. Power MOSFET. 30 V, 1.7 A, Single N Channel, SC 70. Low On Resistance Low Gate Threshold Voltage Halide Free This is a Pb Free Device Power MOSFET V,.7 A, Single N Channel, SC 7 Features Low On Resistance Low Gate Threshold Voltage Halide Free This is a Pb Free Device V (BR)DSS R DS(on) MAX I D MAX Applications Low Side Load Switch DC

More information

MMBZ15VDLT3G MMBZ27VCLT1G SZMMBZ15VDLT3G. SZMMBZ27VCLT1G 40 Watt Peak Power Zener Transient Voltage Suppressors

MMBZ15VDLT3G MMBZ27VCLT1G SZMMBZ15VDLT3G. SZMMBZ27VCLT1G 40 Watt Peak Power Zener Transient Voltage Suppressors MMBZ15VDLT1G, MMBZ27VCLT1G, SZMMBZ15VDLT1G, SZMMBZ27VCLT1G 40 Watt Peak Power Zener Transient Voltage Suppressors Dual Common Cathode Zeners for ESD Protection These dual monolithic silicon zener diodes

More information