MC10ELT22, MC100ELT22. 5VНDual TTL to Differential PECL Translator
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- Brice Allison
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1 5VНual TTL to ifferential PECL Translator The MC0ELT/00ELT22 is a dual TTL to differential PECL translator. Because PECL (Positive ECL) levels are used only +5 V and ground are required. The small outline -lead package and the low skew, dual gate design of the ELT22 makes it ideal for applications which require the translation of a clock and a data signal..2 ns Typical Propagation elay < 300 ps Typical Output to Output Skew PNP TTL Inputs for Minimal Loading Flow Through Pinouts Operating Range: V CC = 4.75 V to 5.25 V with GN = 0 V No Internal Input Pulldown Resistors SO- SUFFIX CASE 75 HLT22 MARKING IAGRAMS* KLT22 Q0 Q0 2 7 V CC 0 TSSOP- T SUFFIX CASE 94R HT22 KT22 PECL TTL Q 3 6 H = MC0 K = MC00 A = Assembly Location L = Wafer Lot Y = Year W = Work Week Q 4 5 GN *For additional information, see Application Note AN002/. Figure. Logic iagram and Pinout Assignment PIN ESCRIPTION PIN FUNCTION Qn, Qn PECL ifferential Outputs* n TTL Inputs V CC Positive Supply GN Ground * Output state undetermined when inputs are open. ORERING INFORMATION evice Package Shipping** MC0ELT22 SO- 9 Units/Rail MC0ELT22R2 SO- 20 Tape & Reel MC00ELT22 SO- 9 Units/Rail MC00ELT22R2 SO- 20 Tape & Reel MC0ELT22T TSSOP- 9 Units/Rail MC0ELT22TR2 TSSOP- 20 Tape & Reel MC00ELT22T TSSOP- 9 Units/Rail MC00ELT22TR2 TSSOP- 20 Tape & Reel **For additional tape and reel information, see Brochure BR0/. Semiconductor Components Industries, LLC, 2003 March, Rev. 7 Publication Order Number: MC0ELT22/
2 ATTRIBUTES Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ES Protection Human Body Model Machine Model Value N/A N/A > 2 KV > 200 V Moisture Sensitivity, Indefinite Time Out of rypack (Note ) Level Flammability Rating Oxygen Index: 2 to 34 UL in Transistor Count 5 Meets or exceeds JEEC Spec EIA/JES7 IC Latchup Test. For additional information, see Application Note AN003/. MAXIMUM RATINGS (Note 2) Symbol Parameter Condition Condition 2 Rating Units V CC Positive Power Supply GN = 0 V 7 V V IN Input Voltage GN = 0 V V I V CC 7 V I out Output Current Continuous Surge T A Operating Temperature Range -40 to +5 C T stg Storage Temperature Range -65 to + C JA Thermal Resistance (Junction-to-Ambient) 0 LFPM 0 LFPM SOIC SOIC JC Thermal Resistance (Junction-to-Case) Standard Board SOIC 4 to 44 JA Thermal Resistance (Junction-to-Ambient) 0 LFPM 0 LFPM TSSOP TSSOP JC Thermal Resistance (Junction-to-Case) Standard Board TSSOP 4 to 44 ± 5% T sol Wave Solder <2 to 3 24 C 265 C 2. Maximum Ratings are those values beyond which device damage may occur ma ma 2
3 0ELT SERIES PECL C CHARACTERISTICS V CC = 5.0 V; GN = 0.0 V (Note 3) -40 C 25 C 5 C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit I CC Power Supply Current ma V OH Output HIGH Voltage (Note 4) mv V OL Output LOW Voltage (Note 4) mv NOTE: evices are designed to meet the C specifications shown in the above table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 0 lfpm is maintained. 3. Output parameters vary : with V CC. V CC can vary ± 0.25 V. 4. Outputs are terminated through a ohm resistor to V CC - 2 volts. 00ELT SERIES PECL C CHARACTERISTICS V CC = 5.0 V; GN = 0.0 V (Note 5) -40 C 25 C 5 C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit I CC Power Supply Current ma V OH Output HIGH Voltage (Note 6) mv V OL Output LOW Voltage (Note 6) mv NOTE: evices are designed to meet the C specifications shown in the above table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 0 lfpm is maintained. 5. Output parameters vary : with V CC. V CC can vary ± 0.25 V. 6. Outputs are terminated through a ohm resistor to V CC - 2 volts. TTL INPUT C CHARACTERISTICS V CC = 4.75 V to 5.25 V; T A = -40 C to 5 C Symbol Characteristic Condition Min Typ Max Unit I IH Input HIGH Current V IN = 2.7 V 20 A I IHH Input HIGH Current V IN = 7.0 V 00 A I IL Input LOW Current V IN = 0.5 V -0.6 ma V IK Input Clamp iode Voltage I IN = - ma -.2 V V IH Input HIGH Voltage 2.0 V V IL Input LOW Voltage 0. V AC CHARACTERISTICS V CC = 4.75 V to 5.25 V; GN= 0.0 V -40 C 25 C 5 C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit f MAX Maximum Input Frequency 0 MHz t PLH Propagation elay (Note 7).5 V to % ns t PHL Propagation elay (Note 7).5 V to % ns t skew Within-evice Skew (Note ) evice-to-evice Skew (Note 9) ps t JITTER Random Clock Jitter (RMS) 0.5 ps t r /t f Output Rise/Fall Time (20-0%) ns 7. Specifications for standard TTL input signal.. Skew is measured between outputs under identical transitions and conditions on any one device. 9. evice-to-evice Skew for identical transitions at identical V CC levels. 3
4 river evice Q Q Receiver evice V TT V TT = V CC V Figure 2. Typical Termination for Output river and evice Evaluation (See Application Note AN020 - Termination of ECL Logic evices.) Resource Reference of Application Notes AN404 - ECLinPS Circuit Performance at Non-Standard V IH Levels AN405 - ECL Clock istribution Techniques AN406 - esigning with PECL (ECL at +5.0 V) AN3 - ECLinPS I/O SPICE Modeling Kit AN4 - Metastability and the ECLinPS Family AN560 - Low Voltage ECLinPS SPICE Modeling Kit AN56 - Interfacing Between LVS and ECL AN596 - ECLinPS Lite Translator ELT Family SPICE I/O Model Kit AN6 - Using Wire-OR Ties in ECLinPS esigns AN672 - The ECL Translator Guide AN00 - Odd Number Counters esign AN002 - Marking and ate Codes AN020 - Termination of ECL Logic evices AN090 - AC Characteristics of ECL evices 4
5 PACKAGE IMENSIONS SO- SUFFIX PLASTIC SOIC PACKAGE CASE ISSUE AA -X- -Y- B A 5 4 S 0.25 (0.00) M Y M K NOTES:. IMENSIONING AN TOLERANCING PER ANSI Y4.5M, CONTROLLING IMENSION: MILLIMETER. 3. IMENSION A AN B O NOT INCLUE MOL PROTRUSION. 4. MAXIMUM MOL PROTRUSION 0.5 (0.006) PER SIE. 5. IMENSION OES NOT INCLUE AMBAR PROTRUSION. ALLOWABLE AMBAR PROTRUSION SHALL BE 0.27 (0.005) TOTAL IN EXCESS OF THE IMENSION AT MAXIMUM MATERIAL CONITION THRU ARE OBSOLETE. NEW STANAR IS Z- H G C 0.25 (0.00) M Z Y S X S SEATING PLANE 0.0 (0.004) N X 45 M J MILLIMETERS INCHES IM MIN MAX MIN MAX A B C G.27 BSC 0.0 BSC H J K M 0 0 N S
6 PACKAGE IMENSIONS TSSOP- T SUFFIX PLASTIC TSSOP PACKAGE CASE 94R-02 ISSUE A 0.5 (0.006) T 0.5 (0.006) T L U U 0.0 (0.004) SEATING PLANE S 2X L/2 PIN IENT S C 5 x K REF (0.004) M T U S V S G ETAIL E ETAIL E F 0.25 (0.00) M B -U- -T- A -V- -W- NOTES:. IMENSIONS AN TOLERANCING PER ASME Y4.5M, CONTROLLING IMENSION: MILLIMETER. 3. IMENSION A OES NOT INCLUE MOL FLASH. PROTRUSIONS OR GATE BURRS. MOL FLASH OR GATE BURRS SHALL NOT EXCEE 0.5 (0.006) PER SIE. 4. IMENSION B OES NOT INCLUE INTERLEA FLASH OR PROTRUSION. INTERLEA FLASH OR PROTRUSION SHALL NOT EXCEE 0.25 (0.00) PER SIE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. IMENSION A AN B ARE TO BE ETERMINE AT ATUM PLANE -W-. MILLIMETERS INCHES IM MIN MAX MIN MAX A B C F G 0.65 BSC BSC K L 4.90 BSC 0.93 BSC M ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORERING INFORMATION Literature Fulfillment: Literature istribution Center for ON Semiconductor P.O. Box 563, enver, Colorado 027 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada ONlit@hibbertco.com N. American Technical Support: Toll Free USA/Canada JAPAN: ON Semiconductor, Japan Customer Focus Center 2-9- Kamimeguro, Meguro-ku, Tokyo, Japan Phone: ON Semiconductor Website: For additional information, please contact your local Sales Representative. 6 MC0ELT22/
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