7WB Bit Bus Switch. The 7WB3126 is an advanced high speed low power 2 bit bus switch in ultra small footprints.

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1 2-Bit Bus Switch The WB326 is an advanced high speed low power 2 bit bus switch in ultra small footprints. Features High Speed: t PD = 0.25 ns V CC = 4.5 V 3 Switch Connection Between 2 Ports Power Down Protection Provided on Inputs Zero Bounce TTL Compatible Control Inputs Ultra Small Pb Free Packages These are Pb Free Devices UDFN MU SUFFIX CASE 5AJ MARKING DIAGRAMS ALM Micro DM SUFFIX CASE 46A 326 AYW UDFN.95 x.0 CASE 5CA X M A = Assembly Location Y = Year W = Work Week M = Date Code = Pb Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page of this data sheet. Semiconductor Components Industries, LLC, 204 October, 204 Rev. Publication Order Number: WB326/D

2 OE V CC OE V CC A 2 OE2 A 2 OE2 B2 3 6 B B2 3 6 B GND 4 5 A2 GND 4 5 A2 Figure 2. Micro (Top View) Figure. UDFN (Top Thru View) A B FUNCTION TABLE OE Input OEn L Function Disconnect A2 B2 H Bn = An OE2 Figure 3. Logic Diagram 2

3 MAXIMUM RATINGS Symbol Parameter Value Unit V CC DC Supply Voltage 0.5 to +.0 V V IN Control Pin Input Voltage 0.5 to +.0 V V I/O Switch Input / Output Voltage 0.5 to +.0 V I IK Control Pin DC Input Diode Current V IN < GND 50 ma I OK Switch I/O Port DC Diode Current V I/O < GND 50 ma I O ON State Switch Current 2 ma Continuous Current Through V CC or GND 50 ma I CC DC Supply Current Per Supply Pin 50 ma I GND DC Ground Current per Ground Pin 50 ma T STG Storage Temperature Range 65 to +50 C T L Lead Temperature, mm from Case for 0 Seconds 260 C T J Junction Temperature Under Bias 50 C JA Thermal Resistance UDFN (Note ) Micro P D Power Dissipation in Still Air at 5 C UDFN Micro C/W mw MSL Moisture Sensitivity Level F R Flammability Rating Oxygen Index: 2 to 34 UL 94 V 0.25 in V ESD ESD Withstand Voltage Human Body Mode (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) > 2000 > 200 N/A V I LATCHUP Latchup Performance Above V CC and Below GND at 25 C (Note 5) 200 ma Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.. Measured with minimum pad spacing on an FR4 board, using 0 mm by inch, 2 ounce copper trace no air flow. 2. Tested to EIA / JESD22 A4 A. 3. Tested to EIA / JESD22 A5 A. 4. Tested to JESD22 C0 A. 5. Tested to EIA / JESD. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit V CC Positive DC Supply Voltage V V IN Control Pin Input Voltage V V I/O Switch Input / Output Voltage V T A Operating Free Air Temperature C t/ V Input Transition Rise or Fall Rate Control Input Switch I/O Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability DC ns/v 3

4 DC ELECTRICAL CHARACTERISTICS Symbol Parameter Conditions V CC (V) T A = 25 C T A = 55 C to +25 C Min Typ Max Min Max V IK Clamp Diode Voltage I I/O = ma V V IH High Level Input Voltage (Control) 4.0 to 5.5 Unit V V IL Low Level Input Voltage (Control) 4.0 to V V OH Output Voltage High See Figure 4 I IN Input Leakage Current 0 V IN 5.5 V A I OFF Power Off Leakage Current V I/O = 0 to 5.5 V A I CC Quiescent Supply Current I O = 0, V IN = V CC or 0 V A I CC Increase in Supply Current (Control Pin) One input at 3.4 V; Other inputs at V CC or GND R ON Switch ON Resistance V I/O = 0, I I/O = 64 ma I I/O = 30 ma ma 4.5 V I/O = 2.4, I I/O = 5 ma V I/O = 2.4, I I/O = 5 ma Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. AC ELECTRICAL CHARACTERISTICS Symbol Parameter Test Condition t PD Propagation Delay, Bus to Bus See Figure 5 V CC (V) 4.0 to 5.5 T A = 25 C T A = 55 C to +25 C Min Typ Max Min Max Unit ns t EN Output Enable Time See Figure to ns t DIS Output Disable Time 4.5 to ns C IN Control Input Capacitance V IN = 5 or 0 V pf C IO(ON) Switch On Capacitance Switch ON pf C IO(OFF) Switch Off Capacitance Switch OFF pf 4

5 TYPICAL DC CHARACTERISTICS 4.50 V OH, HIGH LEVEL OUTPUT VOLT- AGE (V) I OH = 0. ma 24 ma 2.50 T A = +5 C 2.25 V IN = V CC V CC, SUPPLY VOLTAGE (V) 6 ma 2 ma 4.50 V OH, HIGH LEVEL OUTPUT VOLT- AGE (V) I OH = 0. ma 24 ma 2.50 T A = +25 C 2.25 V IN = V CC V CC, SUPPLY VOLTAGE (V) 6 ma 2 ma 4.50 V OH, HIGH LEVEL OUTPUT VOLT- AGE (V) I OH = 0. ma 24 ma 6 ma 2 ma 2.50 T A = 40 C 2.25 V IN = V CC V CC, SUPPLY VOLTAGE (V) Figure 4. Output Voltage High vs Supply Voltage 5

6 AC LOADING AND WAVEFORMS Parameter Measurement Information From Output Under Test 500 S V Open Test S C L = 50 pf* 500 GND t PD t PLZ /t PZL t PHZ /t PZH Open V Open *C L includes probes and jig capacitance. Input Output t PLH.5 V.5 V Voltage Waveforms Propagation Delay Times t PHL.5 V.5 V 3 V 0 V V OH V OL Output Control t PZL Output Waveform S at V (Note 6) t PZH Output Waveform 2 S at Open (Note 6).5 V.5 V.5 V 3 V.5 V 0 V tplz 3.5 V V OL V t PHZ V OL V OH V OH 0.3 V 0 V Voltage Waveforms Enable and Disable Times 6. Waveform is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. All input pulses are supplied by generators having the following characteristics: PRR 0 MHz, Z O = 50, t r 2.5 ns, t f 2.5 ns.. The outputs are measured one at a time, with one transition per measurement. 9. t PLZ and t PHZ are the same as t DIS. 0.t PZL and t PZH are the same as t EN.. t PHL and t PLH are the same as t PD. Figure 5. t PD, t EN, t DIS Loading and Waveforms 6

7 ORDERING INFORMATION WB326MUTAG Device Package Shipping UDFN (Pb Free) 3000 / Tape & Reel WB326DMR2G Micro (Pb Free) 4000 / Tape & Reel WB326DMUTCG UDFN,.95 x.0, 0.5 mm Pitch (Pb Free) 3000 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD0/D.

8 PACKAGE DIMENSIONS UDFN. x.2, 0.4P CASE 5AJ ISSUE O 0.0 C PIN ONE REFERENCE D ÉÉ 0.0 C TOP VIEW 0.05 C 0.05 C (b2) e/2 (A3) A SIDE VIEW 4 e A B E A DETAIL A X L C SEATING PLANE L DETAIL A NOTE 5 NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y4.5M, CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.5 AND 0.30 mm FROM TERMINAL TIP. 4. MOLD FLASH ALLOWED ON TERMINALS ALONG EDGE OF PACKAGE. FLASH MAY NOT EXCEED 0.03 ONTO BOTTOM SURFACE OF TERMINALS. 5. DETAIL A SHOWS OPTIONAL CONSTRUCTION FOR TERMINALS. MILLIMETERS DIM MIN MAX A A A3 0.2 REF b b REF D.0 BSC E.20 BSC e 0.40 BSC L L L REF (L2) 5 BOTTOM VIEW X b M M C A B C NOTE 3 MOUNTING FOOTPRINT* SOLDERMASK DEFINED X X PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

9 PACKAGE DIMENSIONS UDFN.95x.0, 0.5P CASE 5CA ISSUE O PIN ONE REFERENCE 2X 2X 0.0 C 0.0 C 0.05 C 0.05 C L ÉÉÉ D TOP VIEW SIDE VIEW e/2 e 4 A B E A3 A A X L C SEATING PLANE NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y4.5M, CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.5 AND 0.20 MM FROM TERMINAL TIP. 4. PACKAGE DIMENSIONS EXCLUSIVE OF BURRS AND MOLD FLASH. MILLIMETERS DIM MIN MAX A A A3 0.3 REF b D.95 BSC E.00 BSC e 0.50 BSC L L RECOMMENDED SOLDERING FOOTPRINT* X 0.49 X BOTTOM VIEW 5 X b 0.0 M C A B 0.05 M C NOTE PKG OUTLINE 0.50 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 9

10 PACKAGE DIMENSIONS Micro CASE 46A ISSUE H H E D E NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.5 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.00) PER SIDE A-0 OBSOLETE, NEW STANDARD 46A-02. PIN ID T SEATING PLANE 0.03 (0.005) e b PL 0.0 (0.003) M T B S A S A A c L MILLIMETERS INCHES DIM MIN NOM MAX MIN NOM MAX A A b c D E e 0.65 BSC BSC L H E SOLDERING FOOTPRINT*.04 X X X SCALE : mm inches Micro is a trademark of International Rectifier. *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 02 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative WB326/D

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