MMBFU310LT1G. JFET Transistor. N Channel. These Devices are Pb Free, Halogen Free/BFR Free and are RoHS Compliant. Features.

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1 MMBFULT1G JFET Transistor N Channel Features These Devices are Pb Free, Halogen Free/BFR Free and are RoHS Compliant 2 SOURCE MAXIMUM RATINGS Rating Symbol Value Unit Drain Source Voltage V DS 25 Vdc Gate Source Voltage V GS 25 Vdc Gate Current I G madc Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. THERMAL CHARACTERISTICS Total Device Dissipation FR 5 Board (Note 1) Derate above 25 C Thermal Resistance, Junction to Ambient P D mw mw/ C R JA 556 C/W Junction and Storage Temperature T J, T stg 55 to +15 C 1. FR 5 = in. 1 2 GATE 1 DRAIN SOT 2 (TO 26AB) CASE 18 8 STYLE MARKING DIAGRAM 1 M6C M M6C = Device Code M = Date Code* = Pb Free Package (Note: Microdot may be in either location) *Date Code orientation and/or overbar may vary depending upon manufacturing location. ORDERING INFORMATION Device Package Shipping MMBFULT1G SOT 2 (Pb Free) Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD811/D. Semiconductor Components Industries, LLC, 211 February, 211 Rev. 5 1 Publication Order Number: MMBFULT1/D

2 MMBFULT1G ELECTRICAL CHARACTERISTICS ( unless otherwise noted) Characteristic Symbol Min Max Unit OFF CHARACTERISTICS Gate Source Breakdown Voltage (I G = 1. Adc, V DS = ) V (BR)GSS 25 Vdc Gate 1 Leakage Current (V GS = 15 Vdc, V DS = ) I G1SS 15 pa Gate 2 Leakage Current (V GS = 15 Vdc, V DS =, T A = 125 C) I G2SS 15 nadc Gate Source Cutoff Voltage (V DS = Vdc, I D = 1. nadc) V GS(off) Vdc ON CHARACTERISTICS Zero Gate Voltage Drain Current (V DS = Vdc, V GS = ) I DSS 24 6 madc Gate Source Forward Voltage (I G = madc, V DS = ) V GS(f) 1. Vdc SMALL SIGNAL CHARACTERISTICS Forward Transfer Admittance (V DS = Vdc, I D = madc, f = 1. khz) 18 mmhos Output Admittance (V DS = Vdc, I D = madc, f = 1. khz) y os 25 mhos Input Capacitance (V GS = Vdc, V DS = Vdc, f = 1. MHz) C iss 5. pf Reverse Transfer Capacitance (V GS = Vdc, V DS = Vdc, f = 1. MHz) C rss 2.5 pf I D, DRAIN CURRENT (ma) V DS = V I DSS T A = - 55 C - 55 C I D - V GS, GATE-SOURCE VOLTAGE (VOLTS) I DSS - V GS, GATE-SOURCE CUTOFF VOLTAGE (VOLTS) Figure 1. Drain Current and Transfer Characteristics vs Gate Source Voltage +15 C +15 C I DSS, SATURATION DRAIN CURRENT (ma), FORWARD TRANSCONDUCTANCE (mmhos) V DS = V f = 1. MHz T A = - 55 C +15 C - 55 C V GS, GATE-SOURCE VOLTAGE (VOLTS) Figure 2. Forward Transconductance vs Gate Source Voltage +15 C 2

3 MMBFULT1G, FORWARD TRANSCONDUCTANCE ( mhos) μ k k 1. k Y os V GS(off) = - 2. V = V GS(off) = V = I D, DRAIN CURRENT (ma) Figure. Common Source Output Admittance and Forward Transconductance vs Drain Current 1. k, OUTPUT ADMITTANCE ( mhos) Y os μ CAPACITANCE (pf) C gd R DS C gs V GS, GATE SOURCE VOLTAGE (VOLTS) Figure 4. On Resistance and Junction Capacitance vs Gate Source Voltage R DS, ON RESISTANCE (OHMS). S 21, S S 12, S Y 11, Y 21, Y 22 (mmhos) V DS = V I D = ma Y 11 Y 21 Y Y12 (mmhos) V DS = V I D = ma S 21 S 11 S Y S Figure 5. Common Gate Y Parameter Magnitude vs Frequency Figure 6. Common Gate S Parameter Magnitude vs Frequency 21, , , , V DS = V I D = ma V DS = V I D = ma Figure 7. Common Gate Y Parameter Phase Angle vs Frequency Figure 8. S Parameter Phase Angle vs Frequency

4 MMBFULT1G PACKAGE DIMENSIONS SOT 2 (TO 26AB) CASE 18 8 ISSUE AN A E A1 D 1 2 e b HE SEE VIEW C L1 L VIEW C c.25 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: INCH.. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL THRU 7 AND 9 OBSOLETE, NEW STANDARD MILLIMETERS INCHES DIM MIN NOM MAX MIN NOM MAX A A b c D E e L L H E STYLE : PIN 1. DRAIN 2. SOURCE. GATE.95.7 SOLDERING FOOTPRINT* SCALE : mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 516, Denver, Colorado 8217 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative MMBFULT1/D

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