SN54ALS161B, ALS162B, ALS163B, AS161, AS163 SN74ALS161B, ALS163B, AS161, AS163 Synchronous 4-Bit Decade and Binary Counters

Size: px

Start display at page:

Download "SN54ALS161B, ALS162B, ALS163B, AS161, AS163 SN74ALS161B, ALS163B, AS161, AS163 Synchronous 4-Bit Decade and Binary Counters"

Wilfrid Preston
5 years ago
Views:

1 REI atasheet SN4LS161, LS162, LS16, S161, S16 SN4LS161, LS16, S161, S16 Synchronous 4-it ecade and inary ounters These synchronous, presettable, 4-bit decade and binary counters feature an internal carry lookahead circuitry for application in high-speed counting desig. The SN4LS162 is a 4-bit decade counter. The LS161, LS16, S161, and S16 devices are 4-bit binary counters. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincidentally with each other when itructed by the count-enable (, ) inputs and internal gating. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple-clock) counters. buffered clock () input triggers the four flip-flops on the rising (positive-going) edge of the clock input waveform. Rochester Electronics Manufactured omponents Rochester branded components are manufactured using either die/wafers purchased from the original suppliers or Rochester wafers recreated from the original IP. ll recreatio are done with the approval of the OM. Parts are tested using original factory test programs or Rochester developed test solutio to guarantee product meets or exceeds the OM data sheet. Quality Overview ISO-9001 S9120 certification Qualified Manufacturers List (QML) MIL-PRF-8 lass Q Military lass V Space Level Qualified Suppliers List of istributors (QSL) Rochester is a critical supplier to L and meets all industry and L standards. Rochester Electronics, LL is committed to supplying products that satisfy customer expectatio for quality and are equal to those originally supplied by industry manufacturers. The original manufacturer s datasheet accompanying this document reflects the performance and specificatio of the Rochester manufactured version of this device. Rochester Electronics guarantees the performance of its semiconductor products to the original OEM specificatio. Typical values are for reference purposes only. ertain minimum or maximum ratings may be based on product characterization, design, simulation, or sample testing. 201 Rochester Electronics, LL. ll Rights Reserved To learn more, please visit

2 SN4LS161, SN4LS162, SN4LS16, SN4S161, SN4S16 SN4LS161, SN4LS16, SN4S161, SN4S16 SYNHRONOUS 4-IT EE N INRY OUNTERS SS26 EEMER 1994 REVISE JULY 2000 Internal Look-head ircuitry for Fast ounting arry Output for n-it ascading Synchronous ounting Synchronously Programmable Package Optio Include Plastic Small-Outline () and Shrink Small-Outline () Packages, eramic hip arriers (FK), Standard Plastic (N) and eramic (J) IPs description These synchronous, presettable, 4-bit decade and binary counters feature an internal carry look-ahead circuitry for application in high-speed counting desig. The SN4LS162 is a 4-bit decade counter. The LS161, LS16, S161, and S16 devices are 4-bit binary counters. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincidentally with each other when itructed by the count-enable (, ) inputs and internal gating. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple-clock) counters. buffered clock () input triggers the four flip-flops on the rising (positive-going) edge of the clock input waveform. These counters are fully programmable; they can be preset to any number between 0 and 9 or 1. ecause presetting is synchronous, setting up a low level at the load () input disables the counter and causes the outputs to agree with the setup data after the next clock pulse, regardless of the levels of the enable inputs. SN4LS161, SN4LS162, SN4LS16, SN4S161, SN4S16...J PKGE SN4LS161, SN4S161, SN4S16... OR N PKGE SN4LS16...,, OR N PKGE (TOP VIEW) SN4LS161, SN4LS162, SN4LS16, SN4S161, SN4S16... FK PKGE (TOP VIEW) The clear function for the LS161 and S161 devices is asynchronous. low level at the clear () input sets all four of the flip-flop outputs low, regardless of the levels of the,, or enable inputs. The clear function for the SN4LS162, LS16, and S16 devices is synchronous, and a low level at sets all four of the flip-flop outputs low after the next clock pulse, regardless of the levels of the enable inputs. This synchronous clear allows the count length to be modified easily by decoding the Q outputs for the maximum count desired. The active-low output of the gate used for decoding is connected to to synchronously clear the counter to 0000 (LLLL). The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applicatio without additional gating. and inputs and a ripple-carry () output are itrumental in accomplishing this function. oth and must be high to count, and is fed forward to enable., thus enabled, N GN N V GN N V Q Q Q Q N No internal connection Q Q N Q Q Please be aware that an important notice concerning availability, standard warranty, and use in critical applicatio of Texas Itruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PROUTION T information is current as of publication date. Products conform to specificatio per the terms of Texas Itruments standard warranty. Production processing does not necessarily include testing of all parameters. opyright 2000, Texas Itruments Incorporated On products compliant to MIL-PRF-8, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFIE OX 60 LLS, TEXS 26 1

3 SN4LS161, SN4LS162, SN4LS16, SN4S161, SN4S16 SN4LS161, SN4LS16, SN4S161, SN4S16 SYNHRONOUS 4-IT EE N INRY OUNTERS SS26 EEMER 1994 REVISE JULY 2000 description (continued) produces a high-level pulse while the count is maximum (9 or 1, with Q high). The high-level overflow ripple-carry pulse can be used to enable successive cascaded stages. Traitio at or are allowed, regardless of the level of. These counters feature a fully independent clock circuit. hanges at control inputs (,, or ) that modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of the counter (whether enabled, disabled, loading, or counting) is dictated solely by the conditio meeting the stable setup and hold times. The SN4LS161, SN4LS162, SN4LS16, SN4S161, and SN4S16 are characterized for operation over the full military temperature range of to 12. The SN4LS161, SN4LS16, SN4S161, and SN4S16 are characterized for operation from 0 to 0. logic symbols LS161 N S161 INRY OUNTERS WITH IRET LER LS16 N S16 INRY OUNTERS WITH SYNHRONOUS LER TRIV16 T=0 M2 G /2,,4+ T= TRIV16 T=0 M2 T=1 G /2,, , [1] [2] [4] [8] Q Q Q Q 4 6 1, [1] [2] [4] [8] Q Q Q Q SN4LS162 EE OUNTER WITH SYNHRONOUS LER TRIV10 T=0 M2 G /2,,4+ T= , [1] [2] [4] [8] Q Q Q Q These symbols are in accordance with NSI/IEEE Std and IE Publication Pin numbers shown are for the,, J, and N packages. 2 POST OFFIE OX 60 LLS, TEXS 26

4 logic diagram (positive logic) SN4LS161, SN4LS162, SN4LS16, SN4S161, SN4S16 SN4LS161, SN4LS16, SN4S161, SN4S16 SYNHRONOUS 4-IT EE N INRY OUNTERS SS26 EEMER 1994 REVISE JULY SN4LS Q Q Q Q 1 6 Pin numbers shown are for the J package. POST OFFIE OX 60 LLS, TEXS 26

5 SN4LS161, SN4LS162, SN4LS16, SN4S161, SN4S16 SN4LS161, SN4LS16, SN4S161, SN4S16 SYNHRONOUS 4-IT EE N INRY OUNTERS SS26 EEMER 1994 REVISE JULY 2000 logic diagram (positive logic) LS16 and S Q Q Q Q 1 6 Pin numbers shown are for the,, J, and N packages. LS161 and S161 synchronous binary counters are similar; however, is asynchronous. 4 POST OFFIE OX 60 LLS, TEXS 26

6 SN4LS161, SN4LS162, SN4LS16, SN4S161, SN4S16 SN4LS161, SN4LS16, SN4S161, SN4S16 SYNHRONOUS 4-IT EE N INRY OUNTERS SS26 EEMER 1994 REVISE JULY 2000 typical clear, preset, count, and inhibit sequences SN4LS162 The following sequence is illustrated below: 1. lear outputs to zero (SN4LS162 is synchronous) 2. Preset to. ount to 8, 9, 0, 1, 2, and 4. Inhibit ata Inputs Q ata Outputs Q Q Q sync lear Sync lear ount Preset Inhibit POST OFFIE OX 60 LLS, TEXS 26

7 SN4LS161, SN4LS162, SN4LS16, SN4S161, SN4S16 SN4LS161, SN4LS16, SN4S161, SN4S16 SYNHRONOUS 4-IT EE N INRY OUNTERS SS26 EEMER 1994 REVISE JULY 2000 typical clear, preset, count, and inhibit sequences The following sequence is illustrated below: LS161, S161, LS16, and S16 1. lear outputs to zero ( LS161 and S161 are asynchronous; LS16 and S16 are synchronous.) 2. Preset to binary 12. ount to 1, 14, 1, 0, 1, and 2 4. Inhibit ata Inputs Q ata Outputs Q Q Q sync lear Sync lear ount Preset Inhibit 6 POST OFFIE OX 60 LLS, TEXS 26

8 SN4LS161, SN4LS162, SN4LS16, SN4S161, SN4S16 SN4LS161, SN4LS16, SN4S161, SN4S16 SYNHRONOUS 4-IT EE N INRY OUNTERS SS26 EEMER 1994 REVISE JULY 2000 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, V V to V Input voltage range, V I V to V Package thermal impedance, θ J (see Note 1): package /W package /W N package /W Storage temperature range, T stg to 10 Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditio beyond those indicated under recommended operating conditio is not implied. Exposure to absolute-maximum-rated conditio for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JES 1. recommended operating conditio SN4LS161 SN4LS162 SN4LS16 SN4LS161 SN4LS16 MIN NOM MX MIN NOM MX V Supply voltage V VIH High-level input voltage 2 2 V VIL Low-level input voltage V IOH High-level output current m IOL Low-level output current 4 8 m T Operating free-air temperature electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PRMETER TEST ONITIONS SN4LS161 SN4LS162 SN4LS16 SN4LS161 SN4LS16 MIN TYP MX MIN TYP MX VIK V = 4. V, II = 18 m V VOH V = 4. V to. V, IOH = 0.4 m V 2 V 2 V VOL V =4V 4. IOL = 4 m IOL = 8 m V II V =. V, VI = V m IIH V =. V, VI = 2. V µ IIL V =. V, VI = 0.4 V m IO V =. V, VO = 2.2 V m I V =. V m ll typical values are at V = V, T = 2. The output conditio have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, IOS. POST OFFIE OX 60 LLS, TEXS 26

9 SN4LS161, SN4LS162, SN4LS16, SN4S161, SN4S16 SN4LS161, SN4LS16, SN4S161, SN4S16 SYNHRONOUS 4-IT EE N INRY OUNTERS SS26 EEMER 1994 REVISE JULY 2000 timing requirements over recommended operating conditio (unless otherwise noted) (see Figure 1) SN4LS161 SN4LS162 SN4LS16 SN4LS161 SN4LS16 MIN MX MIN MX fclock lock frequency MHz tw Pulse duration high or low LS161 low 20 1,,, LS , tsu Setup time, before SN4LS162, LS LS161 inactive SN4LS162, LS16 low 20 1 high th Hold time, all synchronous inputs after 0 0 switching characteristics over recommended operating conditio (unless otherwise noted) (see Figure 1) PRMETER FROM TO SN4LS161 SN4LS161 (INPUT) (OUTPUT) MIN MX MIN MX fmax MHz ny Q ny Q switching characteristics over recommended operating conditio (unless otherwise noted) (see Figure 1) PRMETER FROM (INPUT) TO (OUTPUT) SN4LS162 SN4LS16 SN4LS16 MIN MX MIN MX fmax MHz ny Q POST OFFIE OX 60 LLS, TEXS 26

10 recommended operating conditio SN4LS161, SN4LS162, SN4LS16, SN4S161, SN4S16 SN4LS161, SN4LS16, SN4S161, SN4S16 SYNHRONOUS 4-IT EE N INRY OUNTERS SS26 EEMER 1994 REVISE JULY 2000 SN4S161 SN4S16 SN4S161 SN4S16 MIN NOM MX MIN NOM MX V Supply voltage V VIH High-level input voltage 2 2 V VIL Low-level input voltage V IOH High-level output current 2 2 m IOL Low-level output current m T Operating free-air temperature electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) SN4S161 SN4S16 SN4S161 SN4S16 PRMETER TEST ONITIONS MIN TYP MX MIN TYP MX VIK V = 4. V, II = 18 m V VOH V = 4. V to. V, IOH = 2 m V 2 V 2 V VOL V = 4. V, IOL = 20 m V II V =. V, VI = V m ll others IIH V =. V, VI = 2. V µ ll others IIL V =. V, VI = 0.4 V 1 1 m ll others IO V =. V, VO = 2.2 V m I V =. V m ll typical values are at V = V, T = 2. The output conditio have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. POST OFFIE OX 60 LLS, TEXS 26 9

11 SN4LS161, SN4LS162, SN4LS16, SN4S161, SN4S16 SN4LS161, SN4LS16, SN4S161, SN4S16 SYNHRONOUS 4-IT EE N INRY OUNTERS SS26 EEMER 1994 REVISE JULY 2000 timing requirements over recommended operating conditio (see Figure 1) SN4S161 SN4S16 SN4S161 SN4S16 MIN MX MIN MX fclock lock frequency 6 MHz tw Pulse duration high or low. 6. S161 low 10 8,,, tsu Setup time, before, 10 8 S161 inactive 10 8 S16 low high (inactive) 10 9 th Hold time, all synchronous inputs after 2 0 switching characteristics over recommended operating conditio (see Figure 1) PRMETER FROM TO SN4S161 SN4S161 (INPUT) (OUTPUT) MIN MX MIN MX fmax 6* MHz (with high) (with low) ny Q ny Q * On products compliant to MIL-PRF-8, this parameter is not production tested. switching characteristics over recommended operating conditio (see Figure 1) PRMETER FROM TO SN4S16 SN4S16 (INPUT) (OUTPUT) MIN MX MIN MX fmax 6* MHz (with high) (with low) ny Q * On products compliant to MIL-PRF-8, this parameter is not production tested. 10 POST OFFIE OX 60 LLS, TEXS 26

12 SN4LS161, SN4LS162, SN4LS16, SN4S161, SN4S16 SN4LS161, SN4LS16, SN4S161, SN4S16 SYNHRONOUS 4-IT EE N INRY OUNTERS SS26 EEMER 1994 REVISE JULY 2000 PRMETER MESUREM INFORMTION SERIES 4LS/4LS N 4S/4S EVIES V S1 V From Output Under Test L = 0 pf (see Note ) 00 Ω Test Point From Output Under Test L = 0 pf (see Note ) 00 Ω Test Point From Output Under Test L = 0 pf (see Note ) 00 Ω 00 Ω Test Point IRUIT FOR I-STTE TOTEM-POLE OUTPUTS IRUIT FOR OPEN-OLLETOR OUTPUTS IRUIT FOR -STTE OUTPUTS Timing Input 1. V V 0 V High-Level Pulse 1. V 1. V V 0 V ata Input tsu th 1. V 1. V V 0 V Low-Level Pulse tw 1. V 1. V V 0 V VOLTGE WVEFORMS SETUP N HOL TIMES VOLTGE WVEFORMS PULSE URTIONS Output ontrol (low-level enabling) Waveform 1 S1 losed (see Note ) Waveform 2 S1 Open (see Note ) tpzl tpzh 1. V 1. V 1. V tphz 1. V tplz V 0 V V VOL 0. V 0. V VOLTGE WVEFORMS ENLE N ISLE TIMES, -STTE OUTPUTS VOH 0 V Input In-Phase Output Out-of-Phase Output (see Note ) 1. V 1. V V 0 V VOH 1. V 1. V VOL VOH 1. V 1. V VOLTGE WVEFORMS PROPGTION ELY TIMES VOL NOTES:. L includes probe and jig capacitance.. Waveform 1 is for an output with internal conditio such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditio such that the output is high except when disabled by the output control.. When measuring propagation delay items of -state outputs, switch S1 is open.. ll input pulses have the following characteristics: PRR 1 MHz, tr = tf = 2, duty cycle = 0%. E. The outputs are measured one at a time with one input traition per measurement. Figure 1. Load ircuits and Voltage Waveforms POST OFFIE OX 60 LLS, TEXS 26 11

13 SN4LS161, SN4LS162, SN4LS16, SN4S161, SN4S16 SN4LS161, SN4LS16, SN4S161, SN4S16 SYNHRONOUS 4-IT EE N INRY OUNTERS SS26 EEMER 1994 REVISE JULY 2000 n-bit synchronous counters PPLITION INFORMTION This application demotrates how the ripple-mode carry circuit (see Figure 2) and the carry look-ahead circuit (see Figure ) can be used to implement a high-speed n-bit counter. The SN4LS162 counts in. The LS161, S161, LS16, and S16 devices count in binary. When additional stages are added, the f max decreases in Figure 2, but remai unchanged in Figure. lear (L) ount (H) isable (L) LS T=0 TR G T=MX /T,,4+ lear (L) ount (H) isable (L) lock LS T=0 TR G T=MX /T,,4+ Load (L) ount (H) isable (L) lock 1, Q Q Q Q Load (L) 1, Q Q Q Q T=0 TR G T=MX /T,,4+ T=0 TR G T=MX /T,,4+ 1, Q Q Q Q 1, Q Q Q Q T=0 TR G T=MX /T,,4+ T=0 TR G T=MX /T,,4+ 1, Q Q Q Q 1, Q Q Q Q T=0 TR G T=MX /T,,4+ T=0 TR G T=MX /T,,4+ 1, Q Q Q Q 1, Q Q Q Q To More Significant Stages fmax = 1/( to ) + ( to ) (N 2) + ( tsu) Figure 2. Ripple-Mode arry ircuit To More Significant Stages fmax = 1/( to ) + ( tsu) Figure. arry Look-head ircuit 12 POST OFFIE OX 60 LLS, TEXS 26

14 IMPORTNT NOTIE Texas Itruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. ll products are sold subject to the terms and conditio of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specificatio applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. ustomers are respoible for their applicatio using TI components. In order to minimize risks associated with the customer s applicatio, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applicatio assistance or customer product design. TI does not warrant or represent that any licee, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI s publication of information regarding any third party s products or services does not cotitute TI s approval, warranty or endorsement thereof. opyright 2000, Texas Itruments Incorporated

SN54HC161, SN74HC161 4-BIT SYNCHRONOUS BINARY COUNTERS

SN54HC161, SN74HC161 4-BIT SYNCHRONOUS BINARY COUNTERS Internal Look-head for Fast ounting arry Output for n-it ascading Synchronous ounting Synchronously Programmable Package Options Include Plastic Small-Outline () and eramic Flat (W) Packages, eramic hip