SN54ABTE16245, SN74ABTE BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS226F JULY 1993 REVISED AUGUST 1996

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1 Support the ME64 ETL Specification Reduced, TTL-Compatible, Input Threshold Range High-Drive Outputs (I OH = 60 m, I OL = 90 m) Support 25-Ω Incident-Wave Switching CC IS Pin Minimizes Signal Distortion During Live Iertion Internal Pullup Resistor on Keeps Outputs in High-Impedance State During Power or Power Down Members of the Texas Itruments (TI) Widebus Family State-of-the-rt EPIC-ΙΙ icmos Design Significantly Reduces Power Dissipation Distributed CC and Pin Configuration Minimizes High-Speed Switching Noise 25-Ω Series Damping Resistor on Port us Hold on Data Inputs Eliminates the Need for External Pullup Resistors Package Optio Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-Mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Spacings description SN54TE16245, SN74TE16245 SN54TE WD PCKGE SN74TE DGG OR DL PCKGE (TOP IEW) 1DIR CC CC DIR The TE16245 are 16-bit (dual-octal) noninverting 3-state traceivers designed for synchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements. These devices can be used as two 8-bit traceivers or one 16-bit traceiver. They allow data tramission from the bus to the bus or from the bus to the bus, depending on the logic level at the direction-control (DIR) input. The output-enable () input can be used to disable the device so that the buses are effectively isolated. When is low, the device is active. The port has a 25-Ω series output resistor to reduce ringing. ctive bus-hold inputs are also found on the port to hold unused or floating inputs at a valid logic level. The port provides for the precharging of the outputs via CC IS, which establishes a voltage between 1.3 and 1.7 when CC is not connected. The SN74TE16245 is available in TI s shrink small-outline package (DL), which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area. The SN54TE16245 is characterized for operation over the full military temperature range of 55 C to 125 C. The SN74TE16245 is characterized for operation from 40 C to 85 C CC IS CC CC Please be aware that an important notice concerning availability, standard warranty, and use in critical applicatio of Texas Itruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus and EPIC-ΙΙ are trademarks of Texas Itruments Incorporated. PRODUCTION DT information is current as of publication date. Products conform to specificatio per the terms of Texas Itruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 1996, Texas Itruments Incorporated POST OFFICE OX DLLS, TEXS

2 SN54TE16245, SN74TE16245 FUNCTION TLE (each 8-bit section) INPUTS DIR OPERTION L L data to bus L H data to bus H X Isolation logic diagram (positive logic) 1DIR 1 2DIR To Seven Other Channels To Seven Other Channels absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, CC to 7 Input voltage range, I (except I/O ports) (see Note 1) to 7 oltage range applied to any output in the high state or power-off state, O to 5.5 Current into any output in the low state, I O m Input clamp current, I IK ( I < 0) m Output clamp current, I OK ( O < 0) m Maximum power dissipation at T = 55 C (in still air) (see Note 2): DGG package W DL package W Storage temperature range, T stg C to 150 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditio beyond those indicated under recommended operating conditio is not implied. Exposure to absolute-maximum-rated conditio for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150 C and a board trace length of 750 mils. For more information, refer to the Package Thermal Coideratio application note in the T dvanced icmos Technology Data ook. 2 POST OFFICE OX DLLS, TEXS 75265

3 recommended operating conditio (see Note 3) SN54TE16245, SN74TE16245 SN54TE16245 SN74TE16245 MIN NOM MX MIN NOM MX CC Supply voltage IH IL High-level input voltage Low-level input voltage 2 2 Except Except I Input voltage 0 CC 0 CC IOH IOL High-level output current Low-level output current bus bus bus bus t/ v Input traition rise or fall rate Outputs enabled / T Operating free-air temperature C NOTE 3: Unused pi (input or -bus I/O) must be held high or low to prevent them from floating. m m POST OFFICE OX DLLS, TEXS

4 SN54TE16245, SN74TE16245 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PRMETER TEST CONDITIONS SN54TE16245 SN74TE16245 MIN TYP MX MIN TYP MX IK CC = 4.5, II = 18 m OH OL II(hold) I(hold) II port port port CC = 5.5, IOH = 100 µ CC 0.2 CC 0.2 CC = IOH = 1 m IOH = 12 m 2 2 CC = 5.5, IOH = 1 m CC = CC = 4.5 port CC = port CC = IOH = 32 m IOH = 64 m 2 IOL = 1 m IOL = 12 m 0.8 IOL = 64 m IOL = 90 m 0.9 I = I = µ CC = 5.5, I = 0 to 5.5 ±500 ±500 Control inputs CC = 5.5, I = CC or ±1 ±1 or ports CC = 5.5, I = CC or ±20 ±20 IOZH port CC = 5.5, O = µ IOZL port CC = 5.5, O = µ IO port port CC = 5.55, O = Ioff CC = 0, I or O 4.5, CCIS = 0 ±100 ±100 µ Outputs high CC = 5.5, ICC or ports IO O = 0, Outputs low m I = CC or Outputs disabled µ m ICCD or ports CC = 5, high m/ CL = 50 pf low MHz Ci Control inputs I = 2.5 or pf Cio I/O ports O = 2.5 or pf ll typical values are at CC = 5, T = 25 C. The parameters IOZH and IOZL include the input leakage current. 4 POST OFFICE OX DLLS, TEXS 75265

5 SN54TE16245, SN74TE16245 live-iertion specificatio over recommended operating free-air temperature range PRMETER ICC (CCIS) O port CC = 0 IO port CC = 0 TEST CONDITIONS CC = 0 to 4.5, CCIS = 4.5 to 5.5, IO(DC) = 0 CC = 4.5 to 5.5, CCIS = 4.5 to 5.5, IO(DC) = 0 ll typical values are at CC = 5, T = 25 C. CC 0.5 < CCIS SN54TE16245 SN74TE16245 MIN TYP MX MIN TYP MX CCIS = 4.5 to CCIS = 4.75 to O = 0, CCIS = O = 3, CCIS = µ µ switching characteristics over recommended ranges of supply voltage and operating free-air temperature, C L = 50 pf (unless otherwise noted) (see Figure 2) PRMETER FROM (INPUT) TO (OUTPUT) CC = 5, T = 25 C SN54TE16245 SN74TE16245 MIN TYP MX MIN MX MIN MX tpzh tpzl tpzh tpzl tphz tplz tphz tplz POST OFFICE OX DLLS, TEXS

6 SN54TE16245, SN74TE16245 extended switching characteristics over recommended ranges of supply voltage and operating free-air temperature, C L = 50 pf (unless otherwise noted) (see Note 4 and Figure 2) PRMETER FROM (INPUT) TO (OUTPUT) LOD RX =13Ω Ω RX =26Ω Ω RX =56Ω Ω CC = 5, T = 25 C SN54TE16245 SN74TE16245 MIN TYP MX MIN MX MIN MX RX = tsk(p) sk(p) RX = 26 Ω RX = tsk(o) sk(o) RX = 26 Ω tt RX = 26 Ω tt Rise or fall time 10% 90% tt is measured between 1 and 2 of the output waveform. tt is measured between 10% and 90% of the output waveform. NOTE 4: Limits are specified but not tested extended output characteristics over recommended ranges of supply voltage and operating free-air temperature, C L = 50 pf (see Note 4 and Figures 1 and 2) PRMETER tsk(temp) FROM (INPUT) TO (OUTPUT) tsk(load) NOTE 4: Limits are specified but not tested. TEST CONDITIONS LOD SN54TE16245 SN74TE16245 MIN MX MIN MX CC = Cotant, T = 20 C RX = 56 Ω CC = Cotant, Temperature = Cotant RX = 13, 26, or 56 Ω POST OFFICE OX DLLS, TEXS 75265

7 SN54TE16245, SN74TE16245 PRMETER MESUREMENT INFORMTION Device 1 Y1 Y2 Device 1 Y1 Device 1 Yn In Device n Yn tsk(o) tsk(load) tsk(temp) Y1 Device n Yn Y2 Yn NOTES:. Pulse skew, tsk(p), is defined as the difference in propagation delay times 1 and 1 on the same terminal at identical operating conditio.. Output skew, tsk(o), is defined as the difference in propagation delay of the fastest and slowest paths on a single device that originate at either a single input or multiple simultaneously switched inputs (e.g., 1 2 ). C. Temperature skew, tsk(temp), is the output skew of two devices, both having the same value of CC ± 1% and with package temperature differences of 20 C. D. Load skew, tsk(load), is measured with RX in Figure 2 at 13 for one unit and 56 for the other unit. Figure 1. oltage Waveforms for Extended Characteristics POST OFFICE OX DLLS, TEXS

8 SN54TE16245, SN74TE16245 PRMETER MESUREMENT INFORMTION 7 S2 500 Ω 3.65 SWITCHING TLE LODS / ( and port) tplz/tpzl tphz/tpzh S1 S2 7 From Output Under Test CL = 50 pf (see Note ) S1 500 Ω RX 94 Ω 2 nf EXTENDED SWITCHING TLE LODS //tsk ( port) //tsk ( port) tt ( port) (see Note E) tt ( port) (see Note F) S1 Down Down S2 X X RX = 13, 26, or 56 Ω Input Output LOD CIRCUIT FOR OUTPUTS OLTGE WEFORMS PROPGTION DELY TIMES 3 0 OH OL Output Control (low-level enabling) Output Waveform 1 S2 at 7 (see Note ) Output Waveform 2 S2 at (see Note ) tpzl tpzh 1.5 tplz OL OL tphz 1.5 OLTGE WEFORMS ENLE ND DISLE TIMES 3 OH OH NOTES:. CL includes probe and jig capacitance.. Waveform 1 is for an output with internal conditio such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditio such that the output is high except when disabled by the output control. C. ll input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 Ω, tr 2.5, tf 2.5. D. The outputs are measured one at a time with one traition per measurement. E. F. tt is measured between 1 and 2 of the output waveform. tt is measured between 10% and 90% of the output waveform.figure 1 Figure 2. Load Circuit and oltage Waveforms 8 POST OFFICE OX DLLS, TEXS 75265

9 IMPORTNT NOTICE Texas Itruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current. TI warrants performance of its semiconductor products and related software to the specificatio applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Certain applicatio using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage ( Critical pplicatio ). TI SEMICONDUCTOR PRODUCTS RE NOT DESIGNED, INTENDED, UTHORIZED, OR WRRNTED TO E SUITLE FOR USE IN LIFE-SUPPORT PPLICTIONS, DEICES OR SYSTEMS OR OTHER CRITICL PPLICTIONS. Inclusion of TI products in such applicatio is understood to be fully at the risk of the customer. Use of TI products in such applicatio requires the written approval of an appropriate TI officer. Questio concerning potential risk applicatio should be directed to TI through a local SC sales office. In order to minimize risks associated with the customer s applicatio, adequate design and operating safeguards should be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applicatio assistance, customer product design, software performance, or infringement of patents or services described herein. Nor does TI warrant or represent that any licee, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. Copyright 1996, Texas Itruments Incorporated

SN54ABTE16245, SN74ABTE BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

SN54ABTE16245, SN74ABTE BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS WITH 3-STATE OUTPUTS Members of the Texas Itruments Widebus Family State-of-the-rt EPIC-ΙΙ icmos Design Significantly Reduces Power Dissipation Support the ME64 ETL Specification Reduced, TTL-Compatible, Input Threshold Range