Microwatt Design for Energy Harvesting Wireless Sensors. Rajeevan Amirtharajah University of California, Davis

Transcription

1 Microwatt Design for Energy Harvesting Wireless Sensors Rajeevan Amirtharajah University of California, Davis

2 Emerging Microsensor Applications Industrial Plants and Power Line Monitoring (courtesy ABB) Operating Room of the Future (courtesy John Guttag) Target Tracking & Detection Location Awareness (Courtesy of ARL) (Courtesy of Mark Smith, HP) Websign NASA/JPL sensorwebs 2

3 Recent Battery Scaling and Future Trends Battery energy density increasing 8% per year, demand increasing 24% per year (the Economist, January 6, 2005) 3

4 Commercial Wireless Sensor Mote Moteiv Sky mote, 2006 Jiang, IPSN/SPOTS 2005 Current sensor node: 70 mw all active, 17 μw idle Power sources contribute significant volume and cost Smaller system (1 cm 3 ) desirable (less obtrusive military sensor, implantable biomedical device) Reduce power consumption, get energy from environment 4

5 Energy Scavenging Becoming a Reality Demonstrate a self contained 1.9GHz transmitter - powered only by Solar & Vibrational scavenged energy (Roundy 03) Push integration limits - limited by dimensions of solar cell Light Level Duty Cycle Front regulator Front Low Indoor Light 0.36% Fluorescent Indoor Light 0.53% Partly Cloudy Outdoor Light 5.6% Bright Indoor Lamp 11% cap Tx COB High Light Conditions 100% Vibration Level Duty Cycle 2.2m/s 2 1.6% Courtesy J. Rabaey, UC Berkeley 5.7m/s 2 2.6% 5

6 Energy Scavenging Wireless Sensor Extend sensor node lifetime beyond battery limitation Scavenging energy from light, heat, and vibrations Cope with the variability of the harvested power Energy scalable approximate signal processing 6

7 System Requirements Functional Block Power V DD R EQ Sensor ADC DSP RF [R. Amirtharajah et al, SPIE, 2005] [M. Scott et al, JSSC, 2003] [B. Warneke et al, ISSCC, 2004] [B. Otis et al, ISSCC, 2005] 185 μw 1.2 V 7.78 kω 3.1 μw 1 V 322 kω 6 μw 1 V 166 kω 1 mw 1.2 V 1.44 kω System works with low duty-cycle, total average power = 5 μw ADC - requires low power and clean V DD DSP - requires low power, noisy V DD ok RF - requires high peak power 7

8 Outline Introduction Energy Harvesting Transducers Circuits and Microarchitecture Conclusions

9 Solar Energy Harvesting Typical solar cells based on crystalline silicon Thin-films offer lower costs (amorphous Si, CdTe, etc.) Everlast Mote (Simjee and Chou ISLPED 06) Would like to integrate solar cell and capacitor cheaply into standard CMOS logic process 9

10 Integrated Photodiodes: Side View Side view cutaway of integrated photodiode. Metal connected to p- and n- diffusions correspond to top and bottom capacitor plates, respectively 10

11 Capacitance Characterization in 0.35 μm CMOS D1 D2 D3 TL1 SEUB Cm (pf) Cdo (pf) Cd (pf)* * Calculated with a junction voltage of 0.55 V, 25 C, Area = 338 μm 2 [R. Aparicio and A. Hajimiri, Capacity Limits and Matching Properties of Integrated Capacitors, JSSC, 2002] 11

12 Diffraction Grating ΛO Λ R Metal capacitors form optical notch filter Resonant wavelength, (Λ O =950 nm Λ R =1550 nm)* Vary duty-cycle, periodicity and grating depth to alter filtering effect *[H. Tan et al, A Tunable Subwavelength Resonant Grating Optical Filter, LEOS, 2002] 12

13 Die Photograph 90 nm CMOS Six photodiode designs D1- D6 Same diffusion layout Different metal diffraction gratings 13

14 Side View of Example Photodiode Space between metal is near 1 μm Height between metal layers is μm P+ P+ P+ P+ P+ Spatial duty cycle between metal width and spacing ~32% Varying metal heights reduces reflections and helps guide l light into depletion regions 14

15 Generated Electrical Power White Light Illumination = 5 klux Photodiode Die Area =10000 μm 2 15

16 Tradeoff Increased metal density results in more reflections and lower optical efficiency Storage capacitance is important when interfacing with sensitive load circuitry 16

17 Generated Power of D1 Maximum power generation is a function of light intensity and load resistance 17

18 V oc vs. Angle of Incidence D1 D4 Polar plot Green laser with λ = 532 nm Increased off-axis response with diffraction grating 18 18

19 Photodiode Comparison 20 klux, 25 C, active area (90nm) = μm Area for 5 μw = 164 μm x 164 μm (0.35 μm), 124 μm x 124 μm (90 nm) 19

20 Common Vibration Sources Vibration Source Frequency of Peak (Hz) Peak Acceleration (m/s 2 ) Kitchen Blender Casing Clothes Dryer Door Frame (just after door closes) Small Microwave Oven HVAC Vents in Office Building Wooden Deck with People Walking Bread Maker External Windows (size 2ftx3ft) next to a Busy Street Notebook Computer while CD is Being Read Washing Machine Second Story of Wood Frame Office Building Refrigerator Courtesy P. Wright, UC Berkeley 20

21 Vibration Generator Mechanical Model Output Electrical Power P = ζ A 2 e 4ωζ 2 T m Second order mechanical system: spring + mass + dashpot Driven by amplitude forcing function at resonance 21

22 Vibration to Electric Energy Converters Mesoscale Moving Coil MEMS Variable Capacitor Estimated output power: 400 μw Estimated output power: 8.7 μw Mesoscale Piezo Bender Output power: 375 μw Courtesy P. Wright, UC Berkeley 22

23 Multi-Electrode Piezoelectric Generator Top plate divided into quarter-circle sections Bottom plate not divided, total of 5 electrodes PZT (lead zirconate titanate) disk diameter =

24 Multiple Resonances with Cuts Without cuts only mode near 1 khz is usable Simulated results from lumped model derived using rigid body analysis 24

25 Top Plate Waveforms Traveling wave excites neighboring top plate signals with 90 relative phase shift 25

26 Rectifier Alternatives Conventional (inductively loaded) rectifier [M. Ghovanloo, et al., JSSC Nov. 2004] 26

27 Full Wave Rectifier Prototype Dashed outline: one CMOS controlled rectifier (CCR) Snubbing diode used on each input for negative swings 27

28 Measured Efficiency Curves Input frequency = 10 khz 28

29 Rectifier Comparison Previous rectifiers typically 76-90% efficient 29

30 Die Photograph Constructed in 0.35 μm CMOS PMOS power FET width = 500 μm 30

31 Multiple-Input Power Supply AC/DC combines a rectified V vibe with V solar DC/DC further smoothes harvested energy to form V out 31

32 Multiple-Input Power Supply Measured Output DC/DC output controller switches between functional blocks DSP tolerates high ripple, so the controller trades efficiency for ripple 32

33 Multiple-Input Power Supply Chip Photo 0.25μm CMOS, total active area To appear ISSCC

34 Outline Introduction Energy Harvesting Transducers Circuits and Microarchitecture Conclusions

35 Energy Scavenging Wireless Sensor Extend sensor node lifetime beyond battery limitation Scavenging energy from light, heat, and vibrations Improve total efficiency by co-design Self-timed digital circuits enable simple power electronics 35

36 Sensor Data Processing Subsystem Microcontroller Sensor calibration DSP configuration High active power Low duty cycle DSP Coprocessor Continuous sensor data processing (e.g., event detection) High duty cycle Ultra low active power Bridge Sensor SWNT or SiNW SWNT or SiNW SWNT or SiNW SWNT or SiNW A/D Converter to RF Microcontroller ctrl data DSP Coprocessor 36

37 Self-Powered System Overview Energy Harvester V IN (AC) f REF Energy Storage (Battery or Ultracapacitor) V BK (DC) Voltage Regulator V DD (DC) f DSP DSP Vibration harvester output (V IN ) can vary rapidly Regulator exploits DSP delay/frequency feedback Compensates for temperature, process, and computational workload variations Allows simple all digital control (Amirtharajah JSSC 98, Dancy TVLSI 00) Regulator efficiency still limited to between 30% - 70% 37

38 Simplifying Voltage Regulation Energy Harvester Energy Storage (Battery or Ultracapacitor) V IN (AC) V BK (DC) Passive Rectifier V DD (AC or DC) DSP Eliminate AC/DC conversion from power electronics Use passive full-wave rectifier with minimum filter cap to reduce complexity and volume Self-timed DSP using critical path replica ring oscillator satisfies timing constraints while using rectifier output 38

39 Frequency Variation With AC Supply Ring Oscillator Output Volts t Hold VDD Vout time (ns) Self-timed datapath must be initialized at power-on Must maintain state across power supply cycles

40 AC Supply Test Chip Block Details

41 Power-On Reset

42 3T DRAM Cell and Sense Circuit Write Enable Precharge Sense Read Out Bit Line 3T DRAM Write Enable Read Enable Write M2 Read M3 Write In Store M1 Write Enable Sense Circuit 3T DRAM (M1-M3) stores data over supply cycles Precharged bitline and sense node Single-ended reads and writes

43 3T DRAM Cell Layout 3T DRAM Write M2 Read M3 Store M1 46 µm 2 gate size chosen for 1.2ms retention Vdd = 400 mv 0 C < T < 50 C Hold time for 60 Hz supply

44 3T DRAM POR Threshold Detector 3T DRAM Sense Circuit Replica DRAM memory cell can set the minimum supply voltage

45 Rectified Waveform and POR Output POR Output On Chip Rectifier Output From 60 Hz Sine Input

46 Measured Frequency Variation with AC Supply Ring Oscillator Frequency Varies Arbitrary Wave Form Generator Output Used For AC Input

47 Die Photo and Summary Technology 180 nm CMOS POR OSC Dimensions 2.6 mm x 2.6 mm Transistors 135K FIR Filter I/O V DD AC Supply (V PP = 1.8 V) Core Freq. (max) Power (Core) 1.8 V 60 Hz 1 khz 75.6 MHz µw Published Symposium on VLSI Circuits, 2007

48 Energy Scalable Distributed Arithmetic Tile Tile implements operations based on Distributed Arithmetic Bit serial / word parallel computation enables efficient fine-grained energy scalability Configurable memory, reconfigurable interconnect, and iterative approximation allows coarse-grained energy scalability 48

49 Power Scalable FIR Filter Results Power (mw) Recognition (%) Input Bit Width Simulated power and projected recognition performance for biomedical event detection application 84 49

50 Low Power Interconnect Design Interconnect power must be minimized Coarse-grained reconfigurable array has high logic to wire ratio Low swing signaling not as effective due to overhead of generating additional supply Attempt to minimize switched capacitance instead through wire spacing, bus activity 50

51 Energy Scalable Array Several operations confirmed, working out configuration issues Currently testing array Test Chip Features Sixteen tiles connected by island-style x and y routing Implemented in 0.25 μm CMOS from TSMC Includes test structures for low switching activity interconnect Includes multiple-input energy harvesting power supply (to appear ISSCC09) 51

52 Outline Introduction Energy Harvesting Transducers Circuits and Microarchitecture Conclusions

53 Conclusions Energy harvesting for wireless sensors is made practical by leveraging low performance demands Integrated solar, mesoscale vibration transducers possible, but challenging to scale below 1 cm 3 Exploiting the AC nature of mechanical vibration energy harvesting using self-timed circuits can improve total system efficiency Energy and voltage scalable digital and mixedsignal circuits and architectures crucial for energy harvesting systems 55

54 Acknowledgments Albert Chen Jamie Collier Erin Fong Liping Guo Nate Guilar Travis Kleeburg Jeff Loo Mackenzie Scott Jeff Siebert Justin Wenck Prof. Paul Wright, UCB Prof. Diego Yankelevich, UCD Prof. Paul Hurst, UCD National Science Foundation CAREER Award FCRP Interconnect Focus Center Xilinx University Program and Xilinx Research Labs U.S. Dept. of Education GAANN Fellowship 56