High Performance CMOS Radio Design for Multi Band OFDM UWB. Acknowledgements

Transcription

1 High Performance CMOS Radio Design for Multi OFDM UWB Nathan R. Belk August 22, Acknowledgements We would like to thank the authors of Texas Instruments Formal UWB Proposal. In addition, we would like to thank the designers involved in TI s UWB RFIC Program. Jaiganesh Balakrishnan Anuj Batra Anand Dabak Ranjit Gharpurey Paul Fontaine Jerry Lin Simon Lee Danielle Griffith Joel Garza 2 1

2 Scope of Presentation A Brief Overview of UWB Multi-band OFDM System Characteristics Non-Linearity Width Noise Architectures for VCO, Synthesizer, RX & TX Frequency Generation Solutions, VCO & PLL Spurs & Multi Pico Nets Base Filters Receive RF, Analog & ADC Transmit RF, Analog & DAC RF Digital Isolation for SOC Implementation Cross Talk 3 MBOA UWB Plan This Work Group #1 Group #2 Group #3 Group #4 Group #5 #1 #2 #3 #4 #5 #6 #7 #8 #9 #10 #11 #12 #13 # f Lowest 3 Solutions Best Channel Characteristics Simplest Off-Chip Filtering Requirements Earliest Introduction to Market 4 2

3 Overview of Multi-band OFDM Basic idea: divide the spectrum into channels that are 528 wide. Transmitter and Receiver Process Smaller width Signals (528 ). Insert a 2nS Guard Interval Between OFDM Symbols to Allow Sufficient Time to Switch RFIC Between Channels. Each Channel has 128 Sub Carriers 4.25 Apart 3X Power 1/3 of the Time 3168 Guar d I nt er val f or TX/ RX Swit ching Time 3696 Cyclic Pr ef ix t ime f r eq () 5 Low Power & Low Noise RF CMOS 4GHz: NF min < 16dB Gain Impedance Matching V IN V 0 V 1 Capacitive MOS Impedances RF CMOS Higher Reactive Impedances Narrower Widths Improve RF V 0 ~ V IN XQ IN V 1 ~ I SIG XQ L Input S/N ~ V 0 ~ Q Gain ~ V 1 ~ Q I Bias ~ 1/Q Inductors (Q = 2) Can Improve Noise and Lower Power Inductively Biased Nodes Allow Voltage Swings Outside the Supply Rails Higher Dynamic Range Base Op Amps Use Feed Back To Improve Performance Narrower Widths Easy Migration to System on a Chip 6 3

4 Low Power & Low Noise RF SiGe 4GHz: NF min < >16dB Gain Impedance Matching V IN V 0 V 1 Lower Capacitive SiGe Impedances RF SiGe: Lower-Q, Smaller RF Impedances High Performance RF Well Suited for Broad V 0 ~ V IN XQ IN V 1 ~ I SIG XQ L Input S/N ~ V 0 ~ Q Gain ~ V 1 ~ Q I Bias ~ 1/Q Inductors (Q = 2) Can Still Improve Noise and Lower Power Inductively Biased Nodes Support Voltage Swings Outside the Supply Rails Higher Dynamic Range Very Good Base Amps with Low Gains & Broad Widths Lower Amounts of Feed Back 7 UWB Solutions: 3168 to 4752GHz Group #1 #1 #2 # Narrow Instantaneous RF Widths Lower Converter Sampling Rates Base Filters/VGA s Lower-Q Smaller Width 4.25 Carrier Spacing/No Zero Tone No 1/f Noise CMOS Friendly System Requirements Broad RF Widths Broad Base- -Widths Higher-Q Base- Filters High Converter Sampling Rates SiGe Friendly System Requirements 8 4

5 MBOA UWB: Distortion Floor for TX/RX 2 nd and 3 rd Order Beats Set Inter-Modulation Distortion Floor in MBOA UWB V in = V A Cos(a) + V B Cos(b) + V C Cos(c) V out = k 1 V in + k 2 V in 2 + k 3 V in 3 Signal Distortion Signal to Distortion Ratio 128 Sub Carriers Distortion Floor rd Order Inter Modulation Floor: 128 Sub Carriers V IN = A cos(a) + B cos(b) + C cos(c) V OUT = k 1 V IN + k 2 V IN2 + k 3 V IN 3 k 3 V IN 3 =k 3 [¼A 3 cos(3a) + ¼B 3 cos(3b) + ¼C 3 cos(3c) + ¾A 2 Bcos(2a +/- b) + ¾A 2 Ccos(2a +/- c) + ¾B 2 Acos(2b +/- a) + ¾B 2 Ccos(2b +/- c) + ¾C 2 Acos(2c +/- a) + ¾C 2 Bcos(2c +/- b) + 3 /2ABCcos(a +/- b +/- c)] f1 f2 f3 N 2 /4 f1 + f2 f3 f1 f2 + f carrier frequencies [] Triple beats are 6dB higher than two-tone IM3 products Many more triple beats than IM3 products ~ 3N 2 /8 beats near middle of band ~ N 2 /4 product terms near edge of band CTB(dBc) = IM3(dBc) log(3n 2 /8) 10 5

6 UWB Second Order Inter Modulation Floor V IN = A Cos(a) + B Cos(b) + C Cos(c) V OUT = k 1 V IN + k 2 V IN2 + k 3 V 3 IN k 2 V 2 IN = ½ k 2 A 2 + ½ k 2 B 2 + ½ k 3 B 2 + k 2 ABcos(a +/- b) + k 2 ACcos(a +/- c) + k 2 BCcos(b +/- c) + ½ k 2 A 2 cos(2a) + ½ k 2 B 2 cos(2b) + ½ k 2 C 2 cos(2c) ~ N f1 f2 beats ~ N/2 f1 + f2 beats carrier frequencies 3250 CSO products are out of band in RF path Generate Signal dependent DC offsets at LNA output Reduced By Low-Q L-C Filtering Before Down Conversion [] 11 Multi- OFDM System Parameters Info. Data Rate Modulation/Constellation FFT Size 110 Mbps OFDM/QPSK Mbps OFDM/QPSK Mbps OFDM/QPSK Coding Rate (K=7) R = 11/32 R = 5/8 R = 3/4 Spreading Rate Information Tones Data Tones Info. Length ns ns ns Cyclic Prefix Guard Interval Symbol Length Channel Bit Rate Frequency Multi-path Tolerance 60.6 ns 9.5 ns ns 640 Mbps ns 60.6 ns 9.5 ns ns 640 Mbps ns 60.6 ns 9.5 ns ns 640 Mbps ns ) Tolerant of Inter-Mods, Image, and Synthesizer Noise 2) Fast Synthesizer 9.5nS for System ~ 2nS for RFIC 3) Short In-Channel Settling Times for RFIC 4) Frequencies Readily Obtained on CMOS RFIC 12 6

7 Link Budget and Receiver Sensitivity Assumption: AWGN and 0 dbi gain at TX/RX antenna Parameter Value Value Value Information Data Rate Average TX Power Total Path Loss 110 Mb/s dbm 64.2 db (@ 10 meters) 200 Mb/s dbm 56.2 db (@ 4 meters) 480 Mb/s dbm 50.2 db (@ 2 meters) 1 Average RX Power dbm dbm dbm Noise Power Per Bit RX Noise Figure Total Noise Power Required Eb/N0 Implementation Loss dbm 6.6 db dbm 4.0 db 3.0 db dbm 6.6 db dbm 4.7 db 3.0 db dbm 6.6 db dbm 4.9 db 3.0 db 2 3 Link Margin 5.5 db 10.2 db 12.2 db RX Sensitivity Level dbm dbm db 1) Very Low TX Power Fully Integrated PA 2) 6.5dB for switch + filter + receiver ~ 4.5dB for RFIC 3) Tolerant of Inter-Mods, Image, and Synthesizer Noise 13 0 Direct Conversion UWB Transceiver Low Power, Low Noise ~ 4dB, Low Cost, 480MBPS 1 Antenna Mixers RF Base Synthesizer Off-Chip Filter LNA VGA Local Oscillator 3432@0º, 90º 3960@0º, 90º Or 4488@0º, 90º PA Mixers Filter RX BBI RX BBQ TX BBI TX BBQ ADC DAC 0 0 Channel Switching Time ~ 2nS (~10,000 Times Faster Than ) Complex Frequency Synthesis & Frequency Conversion Low TX Power ~ -10dBm RMS Fully Integrated PA Very Low Noise RFIC Required NF ~ 4dB

8 0 Direct Conversion UWB Transceiver Low Power, Low Noise ~ 4dB, Low Cost, 480MBPS Mixers RF Base Synthesizer LNA Local Oscillator 4224@0º, 90º +/-264@0º, 90º Or 792@0º, 90º PA Mixers Filters VGA RX BBI RX BBQ TX BB I ADC DAC TX BB Q 0 0 Channel Switching Time ~ 2nS, Two RF LO Frequencies Needed Unique Frequency Synthesis & Frequency Conversion Low TX Power ~ -10dBm RMS Fully Integrated PA More Complex Dual Stage RX/TX Simpler Frequency Synthesis MBOA UWB: Frequency Synthesis Fast Frequency Hopping Necessary condition for multi-band proposals Frequency switching time < 2ns Standard Closed Loop PLL Design is Far Too Slow Frequency Synthesis Using Single-Sideband Generation All Frequencies Derived From Multiples of 16 All IC cells fully synchronous ADC outputs, mixer LOs, RX & TX digital base band, 16 8

9 Frequency Synthesis (Generating 3 Frequencies from 1) VCO center frequency = 4224 = 264 x output = 1056, 16 output = 264 Single sideband generation principle:? 2 =Sine Wave Cos(ω 1 t) Cos(ω 2 t)-sin(ω 1 t) Sin(ω 2 t) = Cos[(ω 1 +ω 2 )t] Cos(ω 1 t) Sin(ω 2 t)+sin(ω 1 t) Cos(ω 2 t) = Sin[(ω 1 +ω 2 )t] Cos(ω 1 t) Cos(ω 2 t)+sin(ω 1 t) Sin(ω 2 t) = Cos[(ω 1 -ω 2 )t] Cos(ω 1 t) Sin(ω 2 t)-sin(ω 1 t) Cos(ω 2 t) = Sin[(ω 1 -ω 2 )t] Unwanted Frequency Rejected ~ 30dB All three frequencies can be generated rapidly 792 = Channel 1: = 3432 Channel 2: = 3960 Channel 3: = Quadrature Voltage Controlled Oscillators Dividers 2f Oscillator D DNQN Q D Q DNQN Ring Oscillator Quadrature Output VCO No Separate Phase Splitter Lower Operating Frequency Better Yield? Variable MOS capacitors set frequency to f Oscillator (8448) Reduced 1f Radiation Reduced VCO Pulling Smaller Implementation Higher Inductor Q s Two-Stage D Flip-Flop Dividers Divided Clocks in Quadruture 18 9

10 UWB Synthesizer Dual Output Frequency Channel Select ~2nS; Outputs: f 1 =4224, f 2 = +/-264 Or 792 Crystal PLL Coarse Tune On-Chip PFD Off-Chip LO 2 N 4224 I/Q 264 I/Q Output I/Q 1056 I/Q +/- Output I/Q +/- 264 I/Q 19 UWB Synthesizer: Single Output Frequency Channel Select ~2nS; Outputs: 3432, 3960 Or 4488 Crystal PLL PFD Coarse t uning LO On-Chip Off-Chip N 4224 I/Q I/Q 1056 I/Q 264 I/Q +/- 792 I/Q +/- 264 I/Q Outputs: 3432 I/Q 3960 I/Q 4488 I/Q 20 10

11 Non-Linear Frequency Conversion: Spurs!? f? f? f 3? f 5? f /-?f +/- 3?f +/- 5?f. Single sideband generation principle:? f =? 2 /2π=Square wave {Cos(ω 1 t) Cos(ω 2 t)-sin(ω 1 t) Sin(ω 2 t) = Cos[(ω 1 +ω 2 )t]} +{Cos(ω 1 t) Cos(3ω 2 t)+sin(ω 1 t) Sin(3ω 2 t) = Cos[(ω 1-3ω 2 )t]}/3 +{Cos(ω 1 t) Cos(5ω 2 t)+sin(ω 1 t) Sin(5ω 2 t) = Cos[(ω 1 +5ω 2 )t]}/5 +?f 264 = 264 & -792 & 1320 &?f 792 = 792 & & Channel 1 Output = 3432, 6600, 264, Channel 2 Output = 3960, 5016, 2904, Channel 3 Output = 2376, 3432, 4488, 21 LO Spurious & Multiple Pico Nets Desired LO Output 4488 Actual LO Output [] 4224 [] LO Spurious Mix Channel 1 on Top of Channel 3 Transmit on Channel 1 When Channel 3 is Selected Prevent Coexistence of Multiple Pico-Nets Mix Undesired Wireless Standards Into UWB Receive s Transmits UWB Data Into Spectrum Allocated to Other Standards Hampers Coexistence with Other Wireless Standards 22 11

12 Base Filters RX Channel Select Filter (528MSPS ADC) 3 rd Order All Pole Response F c ~ 250 On-Chip Auto Tuning of Filter Corner Filter can be integrated into the VGA Real pole at Output of Mixer Complex pole can be combined with VGA Op-Amp TX Image Reject Filter (1056MSPS DAC) Second Order Response +0 to 250 Auto Tuning of Filter Corner 23 MBOA UWB Base Filters (One-Half of Differential Section Shown) V OUT V IN V IN V OUT V IN V OUT Sallen& Key Low-Q Stable Moderate power Requires Buffer No Voltage Gain Op-Amp Based Higher-Q Stability Issues Moderate Power Low-Z Drive Has Gain L-C Moderate-Q Most Stable Zero power Requires Buffer No Gain 24 12

13 Base Self-Calibration: Example LO Base Filter Phase Detector Tuned Capacitor U/D Counter Fine Line CMOS Negligible Switching Parasitic for Filters, Matching Networks and VCO s Below ~ 10GHz Filter Self-Calibration Higher Yield & Lower Costs Higher Realized Performance RF/Analog Self Testing at DC Probe 25 Antenna Crystal ADC Spec/Issues for UWB Receiver RX/TX Switch Off-Chip Filter LNA Synthesizer Or 4488 MixersFilter VGA RX BBI RX BBQ CLK 528 ADC: 5bits/528 Power Hungry Component in UWB VGA & Base Filters Large Gain Range Flat Response to ~ 240 Can Combine Base Filters With Gain Blocks May Need 50O Drive More Complex Synthesizer LO Spurs Standard Receive Mixers Gain Step in LNA 5B/ 528Msps ADC ADC Mixers RF Base 26 13

14 Antenna Crystal ADC Spec/Issues for UWB Receiver RX/TX Switch Off-Chip Filter LNA Synthesizer Crystal +/-264 Or 792 Mixers Filter VGA CLK 528 ADC: 5bits/528 Power Hungry Component in UWB VGA & Base Filters Large Gain Range Flat Response to ~ 240 Can Combine Base Filters With Gain Blocks May Need 50O Drive Less Complex Synthesizer Dual Stage Receive Mixers LO Spurs Gain Step in LNA 5B/ 528Msps ADC ADC RX BBI RX BBQ Mixers RF Base 27 V REF V IN Continuous time signal with infinite resolution Basic Flash ADC Discrete time signal with finite resolution A A A A A Decoder Digital Output Structure Input Capacitance ~ 2 # of Bits Pre-Amps & Comparators ~ 2 # of Bits Area & Power ~ 2 # of Bits Sample & Hold Not Required Performance Issues Input Feed-Through to Reference Comparator Kickback Clock Jitter 28 14

15 Transmitter 1 for MBOA UWB DAC TX BBI DAC TX BBQ Filter 1056 PA Synthesizer Or 4488 Off-Chip Filter RX/TX Switch Crystal Requirements DAC: 1.056GHz Sampling Rate Low pass Filter Flat To ~ 240 Suppresses ( ) and Beyond Simple Up-Conversion Mixers A Single RF Output Synthesizer Shared with DAC & Receiver Higher Complexity LO Generation LO Spurs Antenna Mixers RF Base 29 Transmitter 2 for MBOA UWB DAC TX BBI DAC TX BBQ Filter 1056 PA Off-Chip Filter Synthesizer /-264 Or 792 RX/TX Switch Requirements DAC: 1.056GHz Sampling Rate Low pass Filter Flat To ~ 240 Suppresses ( ) and Beyond Two Stage Up-Conversion Mixers Spurious Issues Simpler Dual RF Output Synthesizer Shared with DAC & Receiver Switching Time < 2ns Antenna Crystal Mixers RF Base 30 15

16 Set #1 Emission Mask Proposal GSM800 CDMA GSM900 GPS PCS1900, GSM1800 IMT2000 WiFi UMTS extension Bluetooth (optional) WiFi Emission level Emission level, dbm/ FCC mask -90 Proposed mask Optional part Frequency, 31 TX Base Output Spectrum: No Filter High level simulation (DAC and mixer) 2 nd left sided image in GPS band Violates TX Mask 32 16

17 Base Output Spectrum with Filtering Simple Low-pass filter 5dB Margin Additional RF Filtering Improves Margin 33 UWB Transceiver Design Approach Digital Baseband ADC DAC 1GHz 6bits CMOS RFIC Next Generation (SoC) Baseband ADC DAC CMOS RFIC Multi-Chip to Full System on a Chip Self Calibration: RF/VCO/Analog Base Cross Talk Suppression: System & Design Level 34 17

18 Advantages System on a Chip Reduced Implementation Cost Improved Vender Acceptance Challenges Cost of Lower Yield Device Modeling Cross Talk 35 Cross Talk ~ 2V Digital RF Input 20 to 50uV LNA 0 /90 Base Digital LO 2V RF 0 /90 PA Output ~ 2V RF PA Base Digital On-Chip Coupling TX Output/Harmonics Pull VCO Strong RF Input/Harmonics Pull VCO Digital Contaminates Base or RF Digital Over-Drives RF or Base Input TX Output Over-Drives RX Input (UMTS) TX/RX Mode Changes Kick VCO VCO Feed Though Violates FCC Max Power 36 18

19 Inductive Cross Talk Incident Field Reflected Field Current Inductive Vector Potential: Substrate Reflected Incident Field Field dk k z E + c, 0 ρ ρ z 0 kz 2π 40 ρ ρ ik z z ik z 2 2 ( f ρ, z) I J ( k ρ )[ e + Ae ], f = k k V E(2GHz, ρ, z) ρ ( µ m) + Static Component E (V/m) Im E Re E ρ(µm) Dynamic Component: Weakly Spatially Dependent 37 Magneto Static Cross Talk (No Simple Board Level Solution) Standard Layout Field Cancellation VCO Currents 1.5mm Electric Field Input +v -v Matching -v -v Inductors

20 Cross Talk Suppression Standard Layout Electro Magnetic Isolation Anti-Symmetric Layout Anti-Symmetric Layout: ~ 20dB More Isolation System Level & On-Chip Cross Talk Suppression Digital Spectral Content Far From RF VCO Electromagnetically Isolated and Resistant to LF Pulling LNA Input Narrow and Electromagnetically Isolated Layout/Floor Plan Optimized with Electromagnetic Solver 39 Electrostatic Cross Talk Shielded Scalar Potential: φ i ~ q r r i 1 j 1 dl j r r 2zzˆ i j Polysilicon Parasitic Shield Capacitance Shield Currents Frequency Independent Decreases Rapidly for r r >2z ~10 m i j µ Shielding Requirements: R Shield << R Substrate with C parasitic X [R Shield R Substrate ] << (2πf) -1 R Substrate ρ ~ 4π Substrate A 4π 1 dr 2 r Substrate Currents Parasitic Currents are Shunted to Ground Through Low Loss Substrate Shielding Improves Q Greatly Reduces Cross Talk 40 20

21 Conclusion MBOA UWB Was Developed for a High Performance CMOS Implementation. VCO Core Requirements & Many RX/TX Requirements are More Relaxed Than Other Wireless Standards. LO Spurious Requirements for MBOA UWB and Base width are the Primary Design Challenges MBOA UWB Was Developed for a Direct Migration to Full, Low-Cost System on a Chip 41 21