24 GHz ISM Band Integrated Transceiver Preliminary Technical Documentation MAIC

Transcription

1 FEATURES Millimeter-wave (mmw) integrated transceiver Direct up and down conversion architecture 24 GHz ISM band GHz frequency of operation 1.5 Volt operation, low-power consumption LO Quadrature tuning capability Zero-IF and Low-IF mode I/Q Analog baseband interface for TX and RX DC < BW < 50 MHz Supports a wide range of waveforms e.g. single carrier, GFSK, OFDM. APPLICATIONS Communications Data-link: point to point, point to multi-point Wireless LAN / WPAN Frequency modulated radar GENERAL DESCRIPTION The is a fully integrated transceiver chip for applications such as digital communications in the 24 GHz ISM band and can operate from 23.5 GHz to 25.5 GHz. This IC is designed using CMOS technology and provides a high level of integration and low power consumption. The architecture uses differential signal paths to minimize cross-talk between the blocks and optimizes isolation between the ports. The receiver and transmitter require an LO signal at 8 GHz. Future evolution of the IC will integrate the synthesizer. The IC is programmed via an SPI to adjust the settings of the receive, transmit and LO paths. The direct-conversion receiver provides a low-noise figure, good linearity and does not require external components such as SAW filters. Only passive components for power supply decoupling and a microwave balun are needed for proper downconversion operations. The cut-off frequency of the baseband amplifier for the in-phase and Quadrature signals is fixed to 50 MHz, enabling a maximum baseband bandwidth of 100 MHz when operating in the Zero-IF mode. Additional baseband filtering and gain can be achieved by adding an external baseband amplifier or active filter. TX RX mmw IC Transmitter LO/I LO/Q Receiver Digital control LO/I LO/Q LO quadrature LO/I LO/Q Figure 1. Block diagram SPI BB / I BB / Q BB / I BB / Q The transmit path also implements a directconversion architecture. The in-phase and quadrature baseband signals are up-converted by an I/Q modulator and amplified to K-band. An external balun is required to perform the differential-to-single-ended conversion. The down- and up- conversions require an LO signal at third the frequency of the RF signal. The input port is differential and the LO path generates the LO in-phase and quadrature signals to drive the I/Q modulator and demodulator. The transceiver chip is controlled via a 4-wire serial port interface and is powered from a regulated 1.5 V supply. LO This data is controlled in accordance with Export Administration Regulations ECCN EAR99. Diversion contrary to U.S. law is prohibited. In accordance with U.S. law (Title 15 CFR Part 746 and Supplement No. 1 to Part 774; and Title 31 CFR) transfer to certain designated countries is prohibited without the prior written consent of the U.S. Department of Commerce. Information given by Cobham is believed to be accurate and reliable. This is a preliminary technical document. Specifications are subject to change without notice. Rev. 0.1, Page 1 of 14

2 SPECIFICATIONS 24 GHz ISM Band Integrated Transceiver Table 1. Transmitter specifications Transmitter Parameter Typ. Units Conditions / Comments RF frequency GHz Design optimized for operation in 24 GHz ISM band IF frequency DC MHz Zero-IF, Low-IF mode capable Input -3dB BW 50 MHz Output P-1 db 1 dbm Image rejection < -40 db LO rejection < -40 db THD2, 3 & 5 rejection < -30 db Input impedance > 1K differential Output impedance 50 differential LO common mode voltage 1 V LO drive -4 dbm Total current consumption 210 ma Transmit path OFDM mode EVM db 64QAM-OFDM / 54 Mbps P average OFDM -5 dbm 64QAM-OFDM / 54 Mbps a baseband PHY layer transmitted at 24 GHz Test conditions Parameter Temperature V dd _xx V ss _xx V sub _xx V shield _xx LO input mode V cm _lo Ibias_100u V cm _sh TX output mode Baseband input mode / transmit Sideband and carrier suppression Conditions / Comments 25 C 1.5 V 0 V 0 V 0 V Differential 1 V 100 ua V Differential Differential The DC offset of the baseband differential I and Q signals are adjusted for optimum carrier suppression. The quadrature and balance of the signal are tuned to optimize the sideband rejection Page 2 of 14

3 Table 2. Receiver specifications Receiver Parameter Typ. Units Conditions / Comments RF frequency GHz Design optimized for operation in 24 GHz ISM band IF frequency DC MHz Zero-IF, Low-IF mode capable Output -3dB BW 50 MHz 100 MHz available in Zero-IF mode Voltage gain 32 db Noise figure 7 db Single side 10 MHz. 4 db NF DSB in Zero-IF mode Input P-1 db -35 dbm IIP3-25 dbm Image rejection -36 db Gain mismatch 0.4 db Output common mode voltage 500 mv Output static DC offset < 25 mv Input impedance 50 differential Output load > 1000 differential LO common mode voltage 1 V LO drive -5 dbm Total current consumption 102 ma Receive path OFDM mode a baseband PHY layer received at 24 GHz EVM -22 db 64QAM-OFDM / 54 Mbps P average OFDM -68 dbm 64QAM-OFDM / 54 Mbps Test conditions Parameter Temperature V dd _xx V ss _xx V sub _xx Vshield_xx V cm _lo I bias_100u V cm _sh LO input mode RX input mode Baseband output mode / receive Conditions / Comments 25 C 1.5 V 0 V 0 V 0 V 1 V 100 ua 0 V Differential Differential Differential Rev. 0.1, Page 3 of 14

4 Table 3. Logic specifications LOGIC Parameter Typ. Units Conditions / Comments Input high voltage, V INH 0.7 Vdd_dig V Input low voltage, V INL 0.2 Vdd_dig V Input current, I INH /V INL TBD μa Input capacitance, C IN TBD pf TIMING CHARACTERISTICS V dd _xx = 1.5 V; V ss _xx = 0 V; V sub _xx = 0 V; V shield _xx = 0 V; temperature = 25 C Page 4 of 14

5 PAD CONFIGURATION AND FUNCTION DESCRIPTIONS 24 GHz ISM Band Integrated Transceiver vdd_pa 1 vss_pa 2 vsub_pa 3 tx_rfp 4 tx_rfn 5 vshield_pa 6 gd_pad 7 vsub_rxrf 8 rx_rfp 9 rx_rfn 10 vshield_rxrf 11 vss_rxrf 12 vdd_rxrf tx_qp tx_qn tx_ip tx_in CLR Din RCK SCK rx_qp rx_qn rx_ip rx_in vdd_lo vss_lo vshield_lo lop lon vsub_lo vcm_lo gd_lo gd_chip vdd_txif vss_txif vsub_txif vshield_txif vcm_sh vdd_bb vss_bb vsub_bb ibias_100u vddd vssd Figure 2. Pad configuration Table 4. Pad function descriptions Pad num. Pad name Type Description 1 vdd_pa Supply Vdd PA section 2 vss_pa Supply Vss PA section 3 vsub_pa Supply Substrate connection to ground, PA section 4 tx_rfp Analog (out) Diff. positive output of TX signal 5 tx_rfn Analog (out) Diff. negative output of TX signal 6 vshield_pa Supply Shield connection to ground, PA section 7 gd_pad Supply Ground of pad-ring 8 vsub_rxrf Supply Substrate connection to ground, RX section 9 rx_rfp Analog (in) Diff. positive input of RX signal 10 rx_rfn Analog (in) Diff. negative input of RX signal 11 vshield_rxrf Supply Shield connection to ground, RX section 12 vss_rxrf Supply Vss RX section 13 vdd_rxrf Supply Vdd RX section 14 vdd_lo Supply Vdd LO path section 15 vss_lo Supply Vss LO path section Rev. 0.1, Page 5 of 14

6 16 vshield_lo Supply Shield connection to ground, LO path section 17 lop Analog (in) Diff. positive input of LO signal 18 lon Analog (in) Diff. negative input of LO signal 24 GHz ISM Band Integrated Transceiver 19 vsub_lo Supply Substrate connection to ground, LO path section 20 vcm_lo Analog (in) Common-mode voltage of LO path 21 gd_lo Supply Ground of LO path pad-ring 22 rx_in Analog (out) Diff. negative output of BB/I signal (RX) 23 rx_ip Analog (out) Diff. positive output of BB/I signal (RX) 24 rx_qn Analog out) Diff. negative output of BB/Q signal (RX) 25 rx_qp Analog (out) Diff. positive output of BB/Q signal (RX) 26 SCK Digital-in Serial bus clock 27 RCK Digital-in Register write/reset control 28 Din Digital-in Serial bus data 29 CLR Digital-in Reset register enable 30 tx_in Analog (in) Diff. negative input of BB/I signal (TX) 31 tx_ip Analog (in) Diff. positive input of BB/I signal (TX) 32 tx_qn Analog (in) Diff. negative input of BB/Q signal (TX) 33 tx_qp Analog (in) Diff. positive input of BB/Q signal (TX) 34 vssd Supply Vss digital 35 vddd Supply Vdd digital 36 ibias_100u Analog (in) Reference current for biasing circuit 37 vsub_bb Supply Substrate connection to ground, BB section of TX, RX and biasing circuit 38 vss_bb Supply Vss BB section of TX, RX and biasing circuit 39 vdd_bb Supply Vdd BB section of TX, RX and biasing circuit 40 vcm_sh Analog (in) Common-mode voltage of SH up-mixer TX 41 vshield_txif Supply Shield connection to ground, TX/IF section 42 vsub_txif Supply Substrate connection to ground, TX/IF section 43 vss_txif Supply Vss TX/IF section 44 vdd_txif Supply Vdd TX/IF section 45 gd_chip Supply Ground of chip guard-ring Page 6 of 14

7 Amplitude (db) IQ accuracy (db) Gain (db) NF ssb (db) Return loss (db) V BB (dbvp) Gain (db) 24 GHz ISM Band Integrated Transceiver TYPICAL PERFORMANCE CHARACTERISTICS Receiver Frequency (GHz) Figure 3. Return loss of the RX input port Channel I Channel Q Frequency (GHz) Figure 5. Gain vs RF frequency. F IF = 500 KHz, P RF = -40 dbm, F LO = F RF / db F Image F IF Frequency (MHz) Figure 7. Image rejection in the baseband spectrum. F IF = 500 KHz, F RF = 24 GHz, F LO = 8 GHz IP-1 db = - 35 dbm RF power (dbm) Figure 4. Gain and base band voltage vs input power. F RF = 24 GHz, F IF = 500 KHz, F LO = 8 GHz P LO Output Baseband frequency (MHz) Figure 6. NF vs LO power (P LO = -7 to 0 dbm). F RF = 24 GHz. F LO = 8 GHz Frequency (GHz) Figure 8. Quadrature accuracy vs F RF. F IF = 500 KHz, P RF = -40 dbm, F LO = F RF / Rev. 0.1, Page 7 of 14

8 Output power (dbm) Output power (dbm) Rejection (dbc) Output power (dbm) Rejection (dbc) Transmitter 24 GHz ISM Band Integrated Transceiver F IMAG F LO F HD Frequency (GHz) Figure 9. Output power vs frequency. F IF = 1 MHz. F LO = F RF / Frequency (GHz) Figure 10. LO, image and HD3 rejection vs frequency F IF = 1 MHz, F LO = F LO / F IMAG F LO F HD LO power (dbm) Figure 11. Output power vs LO power. F IF = 1 MHz, F RF = 24 GHz, F LO = F RF / LO power (dbm) Figure 12. LO, Image and HD3 rejection vs LO power. F IF = 1 MHz, F RF = 24 GHz, F LO = F RF / OP-1 db = 1 dbm Vbb (dbv) Figure 13. Output power vs input voltage. F IF = 1 MHz, F RF = 24 GHz, F LO = F RF /3 Page 8 of 14

9 CIRCUIT DESCRIPTIONS To be completed. REGISTER DESCRIPTIONS To be completed. Rev. 0.1, Page 9 of 14

10 OUTLINE DIMENSIONS Figure 14. Outline dimensions. Dimension shown in micrometers. Chip edge Figure 15. Pad dimension details. Dimension shown in micrometers The Figure 14 describes the dimensions of the transceiver die and the locations of the pads. All the dimensions are given in micrometers. Figure 15 gives the details of the pads. The pitch between pads is 150 μm. Page 10 of 14

11 ASSEMBLY DIAGRAM Paddle/ground Chip Board pad Figure 16. Assembly diagram The Figure 16 presents the assembly diagram of the IC. The chip is mounted on paddle to provide grounds to the chip via down wire bonds. Most of the chip pads are connected to board pads, to transmission lines or to the paddle with single wire bonds or down wire bonds. We recommend to use double wire bonds for the TX (tx_rfp, tx_rfn) and RX (rx_rfp, rx_rfn) ports in order to reduce the inductive effect at microwave frequencies. This will make easier the 50 Ohm impedance matching at RF ports of the chip. We generally recommend to use minimum distance allowed byt the PC board technology between the paddle and the pad or transmission lines to reduce the length of the wire bond and consequently minimize the inductive effect. Rev. 0.1, Page 11 of 14

12 MOUNTING AND BONDING Epoxy mm laminate substrate Via hole Figure 17. Wire bond profile. Dimension shown in micrometers unless specified otherwise Epoxy mm laminate substrate Via hole Figure 18. Down wire bond profile. Dimension shown in micrometers unless specified otherwise. Mounting The Figure 17 and Figure 18 give a possible mounting configuration of the die on board. The die should be attached on a ground plane/paddle with epoxy having high thermal conductivity. A minimum amount of epoxy should be applied to the paddle in order to avoid any fillets around the perimeter of the die and make possible the formation of the down wire bond. We recommend to use as many as via holes allowed by the PC board technology underneath the paddle in order to ease the heat transfer and minimize the effect of floating ground. The mounting configuration and the profiles of the wire bonds should be optimize to reduce the inductive effect. Page 12 of 14

13 Wire bonding Ball or wedge bond can be used. The length of the wire bond should be keep as short as possible. Considering the size of the chip pad it is difficult to form double wire bond next to each other for the RX and TX ports. 24 GHz ISM Band Integrated Transceiver Figure 19. Top view of the die assembly showing the die mounting and wire bonding diagram. Figure 20. Side view of the die assembly showing the wire bond profiles We recommend to make first a wire bond starting from the middle of the chip pad and then to make the second by starting on the top of the first one. The Figure 19 and Figure 20 show pictures of the die assembly of our demo board based on our recommendation Rev. 0.1, Page 13 of 14

14 APPLICATION EXAMPLE To be completed. Cobham Electronic Systems Sensor Systems Lowell, MA USA Steve Fetter Tel: Status: Product Development Current as of: 06/14/2012 Cobham reserves the right to make changes to the product(s) or information contained herein without notice. Cobham makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Cobham assume any liability whatsoever arising out of the use or application of any product(s) or information. This is a preliminary technical document. Page 14 of 14