The Impact of Jitter on the Signal-to-Noise Ratio in Uniform Bandpass Sampling Receivers

Size: px
Start display at page:

Download "The Impact of Jitter on the Signal-to-Noise Ratio in Uniform Bandpass Sampling Receivers"

Transcription

1 The Impact of Jitter on the Signal-to-Noise Ratio in Uniform Bandpass Sampling Receivers Boern Almeroth and Gerhard Fettweis Vodafone Chair Mobile Communications Systems Technische Universität Dresden, 0106 Dresden, Germany {boern.almeroth, Abstract Receiver front-ends, enabling multi-mode multiband operation, are essential for future ef cient mobile communications and require a proper parametrization to achieve certain performance requirements. A key component in the receive chain is the analog-to-digital converter ADC). To determine feasible con gurations of the ADC, an abstract model is investigated in order to evaluate the performance in terms of the signal-to-noise ratio SNR) of bandpass sampling receivers. It models the available types of sampling circuits, the impact of stationary and non-stationary itter processes, as well as limited quantization resolution. The derived ADC model is used to determine the dominating itter effect, either aperture or clock itter, depending on the receiver setup. Furthermore, required root mean square itter values are derived analytically for a prede ned receiver noise gure. A properly designed bandpass sampling receiver, matching the proposed maximum itter requirements, avoids signi cant SNR performance losses and can be employed in mobile communications. I. INTRODUCTION In these days, devices for mobile communications typically support a variety oommunications protocols. This is realized by implementing dedicated receiver front-ends in parallel. The approach is simple, but it lacks in terms of size and costs. Hence, reusing key processing elements in the receiver chain is much smarter. Another trend in receiver architectures, motivated by Mitola s vision of a software radio architecture [1], pushes the digital signal processing closer to the receive antenna to have a more versatile front-end. As a consequence, the ADC is shifted towards the antenna. Thus, the selected sampling rate f s and quantization resolution b are set much higher to achieve a competitive performance while sampling the signal in bandpass BP) domain. Furthermore, the impact of sampling time uncertainty, also called itter, has to be treated more carefully for BP signal reception, especially if the carrier frequency of the receive signals is in the gigahertz range. Basic investigations have been carried out by [], rst. In [3], itter is categorized into three types: 1) input signal itter, ) sampling circuit itter, and 3) sampling clock itter. Here, we focus on the impact of sampling circuit itter, most likely aperture itter, and sampling clock itter, called clock itter, on the overall system performance. A general analysis of this two types of itter has been presented in [4]. In order to design bandpass sampling receiver frontends, a link budget analysis of the ADC has to be performed to explore the performance limiting elements cp. [5]). But Fig. 1: System model of the bandpass sampling ADC. still, there is no detailed analysis in the literature about nding feasible parameter ranges to calibrate the ADC. In this paper an abstract model of an ADC, applicable for bandpass sampling applications, is investigated as shown in Fig. 1. It comprises three main parts. First, the sampling stage modeling the impact of realistic sampling circuits by means of a linear lter function h s t) concatenated with the ideal sampler operating at the sampling rate f s. The second stage models the impact of time itter as an additive noise source n [m] cp. [6]). In the last part, the additive error n q [m] models quantization error. It depends on the limited resolution b in bits, and the properties of the signal as peakto-average-power ratio PAPR) and oversampling ratio OSR). The presented model is used to evaluate the acceptable itter of the ADC, analytically. In addition, the model is utilized to assess the absolute power levels of the desired and the interference signals as well as their SNR to perform a detailed link budget analysis. The reminder of this paper is organized as follows. In Section II, the system model and the metric of the effective SNR γ eff is introduced for general system evaluation. Then Section III investigates the impact of stationary and nonstationary itter processes on the SNR performance of the ADC. Incorporating this result, Section IV discusses the derivation of the required itter performance and studies the link budget of the complete receiver chain. Finally, Section V draws the conclusions. II. SYSTEM MODEL The actual sampling time t m of the m-th sample is modeled as the ideal sampling time mt s and an additive stochastic itter process J with it realizations J m. t m = mt s + J m m Z 1)

2 The impact of the timing error J m on the amplitude distortion n [m] =smt s + J m ) smt s ) is determined by the rstorder Taylor series expansion [6]: dst) s mt s + J m ) smt s )+J m dt. ) t=mts This holds for any sampled signal st) that has its highest frequency components at f max 1 J. Here, 1 J denotes the inverse standard deviation of the itter process J. The evaluation of the system performance of the bandpass ADC is carried out by using the effective in-band SNR γ eff at its output. It is described as the ratio between the inband signal power x = E[x[m] ] to the contributions of the ltered thermal noise power n w, and the power by the ittered sampling n and the quantization stage n q : x γ eff = n w + n + n. 3) q Here, the sampled signal is de ned as the sum of the desired signal and the noise: s[m] =x[m]+n w [m]. We will now rewrite 3) as a function of the SNRs of each stage to ease the computation of the effective in-band SNR γ eff. Moreover, this also allows us to introduce an input-output relation of the in-band SNR, which is used to nd feasible con gurations for a prede ned noise gure α of the ADC. In what follows, we will model the SNRs after the deterministic sampling γ s, after the itter stage γ, and after the quantization γ q in greater detail. The signal-to-sampling-noise ratio SSNR) γ s, after itterfree sampling, is de ned as a function of the selected sampling rate f s and the type of sampling circuit with transfer function H s f,d) = F{h s t, d)} with variable duty cycle d. Here, the duty cycle denotes the ratio while the sampling switch is closed to the sampling period T s. Here, we use the track-andhold circuit with the characteristic of resistor-capacitor RC) circuit. Furthermore, we assume that the carrier frequency and the bandwidth B of the receive signal xt) are known such that we de ne the SSNR as follows: γ s f s,d)= x n w = γ in f H c,b sf,d) df i f H c,b sf if s,d) df f s,d) α nw f s,d). 4) Here, the power spectral density PSD) of the input signal is assumed to be rectangular shaped with center and width B = f g. The term f g is the cutoff frequency of the signal xt). This allows to detach the impact of the sampling circuit H s f,d) from the input signal characteristics. First, the in-band SNR of the input signal γ in is determined by the ratio of the signal power x and the noise power n w. Then the sampling circuit characteristics are modeled for the desired signal and the noise, separately. The term αf s,d) = f H c,b sf,d) df describes the gain of the desired signal due to sampling stage, and α nw f s,d) models the gain of the noise. The term inherently includes the receive signal properties as carrier frequency and bandwidth B, the impact of the sampling circuit H s f,d), and the impact of the sampling rate f s. As a result, the SSNR is modeled as the the input SNR times the degradation factor /α nw. It should be noted that sampling rates are most likely considered to be in the range of B <f s <, since we focus on applications of bandpass sampling ADCs. The impact of time itter on the sampled signal is generally modeled as the signal-to-itter-noise ratio SJNR). It can be de ned as the ratio of the total input power, here the contribution from desired signal and noise, to the itter error power n : γ = x + n w α nw n. 5) This term for evaluating the SJNR will be replaced by a itter speci c expression in Section III. At this stage it used to derive the general relation between effective in-band SNR at the ADC output to its input SNR and the ADC noise gure. Finally, the impact due to the quantization of the sampled signal is formulated by the signal-to-quantization-noise ratio SQNR) as γ q b, β, η) = x + n w α nw + n n q 3 4 b β η. 6) The additive quantization error n q [m], and the quantization noise power n q can be assumed to be generated by a white noise process for suf cient large resolution b cp. [7]). Eq. 6) can now be approximated by a general expression to evaluate the SQNR as a function of the resolution of b bits, an oversampling ratio OSR) β, and a peak-to-average-power ratio PAPR) η. Using 4), 5), and 6) to rewrite 3) as a function of the individual SNRs leads to the following equation of the effective in-band SNR at the ADC output: γ eff = γ q γ γ s γ q +1)γ + γ s +1)+γ γ s. 7) This approach eases the understanding of the in uences of the single stages of the ADC on the overall SNR. Furthermore, it allows to trade-off individual ADC parameters in each stage. To obtain a direct input-output relation of the SNR, we have to subsitute 4) into 7) yielding γ q γ γ in γ eff = ) = γ in γ q +1) γ +1) αnw + γ in + γ γ α. 8) in Now, we can de ne the denominator, α, as the SNR loss or ADC noise gure between the input SNR and the SNR at the output of the bandpass ADC. Further, it is used as a performance indicator of the receiver front-end. It can be assumed that α 1 for realistic ADC models. In the following sections, the parametrization of the ADC bases on the assumption of a maximum SNR loss α.

3 of the mean SJNR. Substituting 10) into 9) leads to: Fig. : Effect of aperture itter ap =0.5 ps) on the SJNR γ of three different input signals: 1) BP signal with rectangular PSD at =10GHz and variable bandwidth B =f g, ) bandlimited BL) white Gaussian noise with B =f g baseband), and 3) sine wave signal at frequency f g. III. JITTER IN BANDPASS ADCS This section investigates the impact two common types of itter processes, stationary and non-stationary, on the SJNR of a bandpass sampling ADC. The following investigations are based on the analysis of the mean SJNR values, as shown in [4]. To simplify the notation, the lowest signal frequency is de ned as = f g and the highest frequency as f h = + f g. In general, the SJNR γ is de ned as γ = M S ss f)df M 1 m=0 S ss f)1 E{e πfjm }) df. 9) Here, S ss f) refers to the rectangular shaped PSD of the sampled signal s[m] and M is the number of samples per block. Furthermore, E{e πfjm } describes the characteristic function of the underlying itter process J. To incorporate this equation into the overall SNR of the BP ADC, we will investigate a simpli ed rule for computation and to determine the dominating itter effect. A. Stationary Processes: Aperture Jitter The time uncertainty in the state transition of the sampling circuit switches is called aperture itter. It is mainly caused by thermal noise in electrical circuits and it is described as an i.i.d. Gaussian distributed process J ap) with zero mean and variance ap. Applying this properties, the characteristic function for the aperture itter is de ned as E{e πfjap) m } = e π f ap 1 π f ap. 10) The resulting term is independent from the actual sampling time instance m. Hence, it is stationary. Furthermore, a linear approximation, under the assumption that highest signal frequency f max ap 1, is applied to simplify the computation γ ap) S ss f)df ap ap 4π f S ss f)df. 11) ap is evaluated for In Fig., the results for the SJNR γ ap) three common signal classes. The standard deviation of the itter is assumed to be ap =0.5 ps. The dotted line shows the SJNR of an sinusoidal input signal located at frequency f g and the dashed gives the SJNR performance for baseband white Gaussian noise signal with cutoff frequency f g. By applying a bandpass signal with a xed carrier frequency of = 10 GHz and a variable bandwidth of B = f g,we can now observe the following. Given that we use narrowband signaling f g / 1 then the SJNR of the BP signal is independent from the signal bandwidth B and can be approximated by using the sine wave equation at carrier frequency. Hence, we can make use of the existing sine wave approximation to calculate the SJNR for narrow-band BP signals as γ ap) 4π fc ap ) 1 if f g 1 f h ap 1. 1) B. Non-Stationary Processes: Clock Jitter In contrast to the aperture itter, the clock itter process is non-stationary in its nature. Clock itter describes the variation of the sampling period duration caused due to the oscillator phase noise. For the free-running oscillator, it is modeled as accumulated itter with i.i.d. Gaussian increments i N0,cT s ). The derived clock itter process J clk) N 0,clk mt ) s)=cmt s depends on the cycle-tocycle itter ct s, has a linearly increasing variance by the time index m, and is hence non-stationary. Applying a similar assumptions as in 10) leads to the following equation for the characteristic function: E{e πfjclk) m } = e π f clk mts) 1 π f clkmt s ). 13) The only difference to 11) is that the SJNR, assuming clock itter, is now dependent on the number of samples per block M. Thus, the mean SJNR can be evaluated by deriving a mean clock itter variance clk : γ clk) clk M 1 1 M clkmt s ) m=0 }{{} clk S ss f)df 4π f S ss f)df 14) For suf cient block length, the mean clock itter variance can be computed by clk = ct sm 1)/ ct s M/ for M 1. To simplify 14) further, the PSD S ss f) is assumed to be rectangular shaped in the desired band as used earlier. γ clk) clk ) 3 clk π B +1fc ). 15)

4 Fig. 3: Comparing the impact of aperture itter and clock itter on the SJNR γ for two different sampling rates f s,1,f s, and a xed sampling block duration of M T s =1ms. Under the narrow-band assumption as in 1), the SJNR due to clock itter can be computed by the following approximation: γ clk) 1 4π fc clk if f 1 g 1 f h clk. 16) C. Find the Prevailing Type of Jitter After characterizing both types of itter by their SJNRs separately, the prevailing type of itter for a given application scenario shall be derived. The results of this section have a direct relation to determine the itter speci cations for circuit design. In Fig. 3, the SJNRs for a given aperture itter according to 1) and clock itter from 16) are shown. The dominating type of itter can now be found under the assumption of a xed block length M T s, e.g., a block length of 1 ms for one transmission time interval TTI) in LTE, and a sampling rate f s. Furthermore, the intersection between the two types, aperture itter solid line) and clock itter dashed or dotted line), can be determined analytically by using 1) and 15) in order to nd the prevailing type of itter: M =1+ ap ct s 1 3 fg ) ) 1 +1 ap. 17) ct s As a result, the number of samples per block M for narrowband signals is obtained by the ratio of the aperture itter variance ap to half of the cycle-to-cycle itter variance ct s. For the given scenario above, the number of samples per block for f s,1 is M = 4787 and for f s, is M = We can compare the results from the former analysis 17) with the minimum required number of samples per block M = T f s in a practical scenario, where T is the reference duration of a block, to nd the dominating itter effect: { n ap if M M, 18) clk if M M. Fig. 3 examines this analysis for two sampling rates f s,1 and f s, with a reference block length of T =1ms. For both rates, the number of samples in one block is much bigger than the calculated M M 1 M. Thus, the dominating itter is due to the used clock signal and limits the SJNR to γ 9.8 db. In this case, the effect of aperture itter can be neglected. In addition, we can not observe a direct in uence of the chosen sampling rate f s on the SJNR γ. Thus, the carrier frequency of the bandpass signal has a maor impact on the SJNR cp. Fig. 3). In conclusion, the limiting type of itter for the application scenario is determined by the sampling block duration and the sampling rate as well as the properties of the sampling circuit and sampling clock. IV. REQUIRED JITTER AND LINK BUDGET ANALYSIS Traditionally, the required values for the itter are determined by assuming that the itter noise power n has to be smaller than the quantization noise power n q cp. [8]). This approach is valid for the conversion of baseband or low-if signals with a Nyquist-ADC, but it does not take into account the characteristics of the input signal and the sampling frontend, including sampling circuit h s t) and sampling rate f s, in case direct RF sampling applications. Hence, the proposed approach incorporates the complete bandpass sampling ADC based on the evaluation of the effective in-band SNR γ eff at the ADC output. The basic relation between the output SNR γ eff as a function of the input SNR γ in and a prede ned SNR loss α has been introduced in 8). The link budget, in terms of power levels and SNR at the output of each element, for a direct RF sampling receiver and an exemplary signal reception is shown in Fig. 4. The individual parts of the receiver are connected in serial fashion and are explained in Tab. I. In this example, we concentrate on the comparison of itter-free sampling with ittered sampling. The in-band SNR at the input of the ADC is set to γ in =41dB. This results from a signal power of 60 dbm and a in-band noise power of 101 dbm. After sampling, the in-band SNR of the signal s[m] is reduced to 40 db due to the effect of aliasing. Observing the individual power levels after the sampling circuit, it can be seen that the absolute power of signal and noise is heavily attenuated by 13 db due to its lowpass characteristics. Now, for the case of ittered sampling, the SJNR is further limited to a calculated value of 9.8 db, which can also be observed in Fig. 3. This is 10 db less compared to the itterfree case. The results would change for an smaller input SNR of γ in < 30 db. In this case, the SNR degradation due to itter will be very minor since the itter error n [m] is smaller then the noise contributions of the preceding elements. A similar behavior can be observed for the impact of the quantization noise power on the SNR performance of the

5 Fig. 4: 1) Power levels and ) SNR values at the output of each element. Parameters are chosen according to Tab. I. Receiver Stage BPF LNA AGC SC Sampling Jitter Quantization DSP BP Filter TABLE I: Con guration Parameters Parameter and Description Passband:.3.4) GHz, 0 db attenuation Stopband: 30 db attenuation Gain =15dB; NF =db; no lter characteristics Gain =5dB; NF =1dB; no lter characteristics Track-and-Hold with f 3dB = 545 MHz f s = 383 MHz Aperture Jitter: ap =0.5 ps RMS Clock Jitter with c =10 0 s, M = : clk =.4 ps see Fig. 3) Resolution of b =8bit and PAPR =1dB MC) Out-of-Band attenuation of 30 db receiver. In case of itter-free sampling, a SNR performance degradation is observable in Fig. 4, while ittered sampling shows approximately no SNR loss. In order to nd the required itter values, which will then give us a similar performance as in the itter-free case, we use 8) to derive the required SJNR as αnw + γ in 1 + γ q ) γ γ in,γ q,α) αγ q γ in αnw 1 + γ q ). 19) Moreover, the relation is used to get the required root-mean squared RMS) itter value by applying 1) or 16): 1 3 4b β η α αnw b β η γ in. 0) π αnw + γ in b β η As a consequence, the obtained RMS itter values can be used to select feasible oscillators for the appropriate application based on their oscillator constant c, e.g., the required oscillator constant to achieve the same performance as in the itter-free case for the given example is c req = s. Furthermore, the required quality of the sampling circuit switches based on their RMS aperture itter can be de ned in advance. V. SUMMARY In this paper we have modeled and investigated the effective in-band SNR performance of the bandpass sampling receiver architecture with ittered sampling. We have shown how to determine the prevailing type of itter for a given system architecture and the application based on sampling block length M, signal characteristics,b), and the speci c itter values for aperture ap and mean clock itter clk. Furthermore, we gave guidelines to determine the required itter values for the design of a feasible receiver. Finally, an exemplary link budget analysis is performed for the complete direct RF sampling receiver. Here, the input signal is assumed to be bandpass. It has been shown that the SNR performance is quite sensitive to itter errors in the SNR range of γ in > 30 db. Thus, itter errors have to be considered carefully in bandpass sampling architectures. REFERENCES [1] J. Mitola, The software radio architecture, IEEE Communications Magazine, vol. 33, no. 5, pp. 6 38, May [] A. Balakrishnan, On the problem of time itter in sampling, IRE Transactions on Information Theory, vol. 44, pp , 196. [3] M. Shinagawa, Y. Akazawa, and T. Wakimoto, Jitter analysis of highspeed sampling systems, Solid-State Circuits, IEEE Trans. on, vol. 5, no. 1, pp. 0 4, [4] M. Löhning and G. Fettweis, The effects of aperture itter and clock itter in wideband ADCs, in in Proc. of the International Workshop on ADC Modelling and Testing IWADC), Perugia, Italy, 003, pp [5] S. Rodriguez-Parera, A. Bourdoux, F. Horlin, J. Carrabina, and L. Van der Perre, Front-End ADC Requirements for Uniform Bandpass Sampling in SDR, in in Proceedings of the 65th IEEE Vehicular Technology Conference VTC-Spring), Dublin, Ireland, 007, pp [6] N. Da Dalt, M. Harteneck, C. Sandner, and A. Wiesbauer, On the itter requirements of the sampling clock for analog-to-digital converters, IEEE Trans. on Circuits and Systems I: Fundamental Theory and Applications, vol. 49, no. 9, pp , Sep. 00. [7] B. Widrow and I. Kollar, Statistical theory of quantization, IEEE Trans. on Instrumentation and Measurement, vol. 45, no., pp , [8] V. Arkestein, A. Klumperink, and B. Nauta, Jitter requirements of the sampling clock in software radio receivers, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 53, no., pp , 006.

The Effects of Aperture Jitter and Clock Jitter in Wideband ADCs

The Effects of Aperture Jitter and Clock Jitter in Wideband ADCs The Effects of Aperture Jitter and Clock Jitter in Wideband ADCs Michael Löhning and Gerhard Fettweis Dresden University of Technology Vodafone Chair Mobile Communications Systems D-6 Dresden, Germany

More information

DESIGN CONSIDERATIONS FOR DIRECT RF SAMPLING RECEIVER IN GNSS ENVIRONMENT. Ville Syrjälä, Mikko Valkama, Markku Renfors

DESIGN CONSIDERATIONS FOR DIRECT RF SAMPLING RECEIVER IN GNSS ENVIRONMENT. Ville Syrjälä, Mikko Valkama, Markku Renfors DESIGN CONSIDERATIONS FOR DIRECT RF SAMPLING RECEIVER IN GNSS ENVIRONMENT Ville Syrjälä, Mikko Valkama, Markku Renfors Tampere University of Technology Institute of Communications Engineering P.O Box 553,

More information

Compensation of Analog-to-Digital Converter Nonlinearities using Dither

Compensation of Analog-to-Digital Converter Nonlinearities using Dither Ŕ periodica polytechnica Electrical Engineering and Computer Science 57/ (201) 77 81 doi: 10.11/PPee.2145 http:// periodicapolytechnica.org/ ee Creative Commons Attribution Compensation of Analog-to-Digital

More information

CHAPTER. delta-sigma modulators 1.0

CHAPTER. delta-sigma modulators 1.0 CHAPTER 1 CHAPTER Conventional delta-sigma modulators 1.0 This Chapter presents the traditional first- and second-order DSM. The main sources for non-ideal operation are described together with some commonly

More information

Noise and Distortion in Microwave System

Noise and Distortion in Microwave System Noise and Distortion in Microwave System Prof. Tzong-Lin Wu EMC Laboratory Department of Electrical Engineering National Taiwan University 1 Introduction Noise is a random process from many sources: thermal,

More information

ANALOGUE TRANSMISSION OVER FADING CHANNELS

ANALOGUE TRANSMISSION OVER FADING CHANNELS J.P. Linnartz EECS 290i handouts Spring 1993 ANALOGUE TRANSMISSION OVER FADING CHANNELS Amplitude modulation Various methods exist to transmit a baseband message m(t) using an RF carrier signal c(t) =

More information

BandPass Sigma-Delta Modulator for wideband IF signals

BandPass Sigma-Delta Modulator for wideband IF signals BandPass Sigma-Delta Modulator for wideband IF signals Luca Daniel (University of California, Berkeley) Marco Sabatini (STMicroelectronics Berkeley Labs) maintain the same advantages of BaseBand converters

More information

Channelized Digital Receivers for Impulse Radio

Channelized Digital Receivers for Impulse Radio Channelized Digital Receivers for Impulse Radio Won Namgoong Department of Electrical Engineering University of Southern California Los Angeles CA 989-56 USA ABSTRACT Critical to the design of a digital

More information

Dimensional analysis of the audio signal/noise power in a FM system

Dimensional analysis of the audio signal/noise power in a FM system Dimensional analysis of the audio signal/noise power in a FM system Virginia Tech, Wireless@VT April 11, 2012 1 Problem statement Jakes in [1] has presented an analytical result for the audio signal and

More information

6.976 High Speed Communication Circuits and Systems Lecture 20 Performance Measures of Wireless Communication

6.976 High Speed Communication Circuits and Systems Lecture 20 Performance Measures of Wireless Communication 6.976 High Speed Communication Circuits and Systems Lecture 20 Performance Measures of Wireless Communication Michael Perrott Massachusetts Institute of Technology Copyright 2003 by Michael H. Perrott

More information

Summary Last Lecture

Summary Last Lecture Interleaved ADCs EE47 Lecture 4 Oversampled ADCs Why oversampling? Pulse-count modulation Sigma-delta modulation 1-Bit quantization Quantization error (noise) spectrum SQNR analysis Limit cycle oscillations

More information

Reference Clock Distribution for a 325MHz IF Sampling System with over 30MHz Bandwidth, 64dB SNR and 80dB SFDR

Reference Clock Distribution for a 325MHz IF Sampling System with over 30MHz Bandwidth, 64dB SNR and 80dB SFDR Reference Clock Distribution for a 325MHz IF Sampling System with over 30MHz Bandwidth, 64dB SNR and 80dB SFDR Michel Azarian Clock jitter introduced in an RF receiver through reference clock buffering

More information

! Multi-Rate Filter Banks (con t) ! Data Converters. " Anti-aliasing " ADC. " Practical DAC. ! Noise Shaping

! Multi-Rate Filter Banks (con t) ! Data Converters.  Anti-aliasing  ADC.  Practical DAC. ! Noise Shaping Lecture Outline ESE 531: Digital Signal Processing! (con t)! Data Converters Lec 11: February 16th, 2017 Data Converters, Noise Shaping " Anti-aliasing " ADC " Quantization "! Noise Shaping 2! Use filter

More information

2.4 A/D Converter Survey Linearity

2.4 A/D Converter Survey Linearity 2.4 A/D Converter Survey 21 mum and minimum power spectral density (PSD) levels. In the case of a single-channel receiver, this implies the gain control range of the VGA, while in a multi-channel receiver

More information

Advanced Digital Signal Processing Part 2: Digital Processing of Continuous-Time Signals

Advanced Digital Signal Processing Part 2: Digital Processing of Continuous-Time Signals Advanced Digital Signal Processing Part 2: Digital Processing of Continuous-Time Signals Gerhard Schmidt Christian-Albrechts-Universität zu Kiel Faculty of Engineering Institute of Electrical Engineering

More information

SAMPLING FREQUENCY SELECTION SCHEME FOR A MULTIPLE SIGNAL RECEIVER USING UNDERSAMPLING

SAMPLING FREQUENCY SELECTION SCHEME FOR A MULTIPLE SIGNAL RECEIVER USING UNDERSAMPLING SAMPLING FREQUENCY SELECTION SCHEME FOR A MULTIPLE SIGNAL RECEIVER USING UNDERSAMPLING Yoshio Kunisawa (KDDI R&D Laboratories, yokosuka, kanagawa, JAPAN; kuni@kddilabs.jp) ABSTRACT A multi-mode terminal

More information

User Guide. 1-Clock duty cycle 2-Clock jitter 3-Voltage references 4-Input bandwidth 5-Differential approach. Marc Sabut - STMicroelectronics 1

User Guide. 1-Clock duty cycle 2-Clock jitter 3-Voltage references 4-Input bandwidth 5-Differential approach. Marc Sabut - STMicroelectronics 1 User Guide -Clock duty cycle 2-Clock jitter 3-Voltage references 4-Input bandwidth 5-Differential approach Marc Sabut - STMicroelectronics User Guide -Clock duty cycle Marc Sabut - STMicroelectronics 2

More information

EE247 Lecture 22. Figures of merit (FOM) and trends for ADCs How to use/not use FOM. EECS 247 Lecture 22: Data Converters 2004 H. K.

EE247 Lecture 22. Figures of merit (FOM) and trends for ADCs How to use/not use FOM. EECS 247 Lecture 22: Data Converters 2004 H. K. EE247 Lecture 22 Pipelined ADCs Combining the bits Stage implementation Circuits Noise budgeting Figures of merit (FOM) and trends for ADCs How to use/not use FOM Oversampled ADCs EECS 247 Lecture 22:

More information

Radio Receiver Architectures and Analysis

Radio Receiver Architectures and Analysis Radio Receiver Architectures and Analysis Robert Wilson December 6, 01 Abstract This article discusses some common receiver architectures and analyzes some of the impairments that apply to each. 1 Contents

More information

EE4512 Analog and Digital Communications Chapter 6. Chapter 6 Analog Modulation and Demodulation

EE4512 Analog and Digital Communications Chapter 6. Chapter 6 Analog Modulation and Demodulation Chapter 6 Analog Modulation and Demodulation Chapter 6 Analog Modulation and Demodulation Amplitude Modulation Pages 306-309 309 The analytical signal for double sideband, large carrier amplitude modulation

More information

New Features of IEEE Std Digitizing Waveform Recorders

New Features of IEEE Std Digitizing Waveform Recorders New Features of IEEE Std 1057-2007 Digitizing Waveform Recorders William B. Boyer 1, Thomas E. Linnenbrink 2, Jerome Blair 3, 1 Chair, Subcommittee on Digital Waveform Recorders Sandia National Laboratories

More information

Analog-to-Digital Converter Survey & Analysis. Bob Walden. (310) Update: July 16,1999

Analog-to-Digital Converter Survey & Analysis. Bob Walden. (310) Update: July 16,1999 Analog-to-Digital Converter Survey & Analysis Update: July 16,1999 References: 1. R.H. Walden, Analog-to-digital converter survey and analysis, IEEE Journal on Selected Areas in Communications, vol. 17,

More information

Receiver Architecture

Receiver Architecture Receiver Architecture Receiver basics Channel selection why not at RF? BPF first or LNA first? Direct digitization of RF signal Receiver architectures Sub-sampling receiver noise problem Heterodyne receiver

More information

ON THE VALIDITY OF THE NOISE MODEL OF QUANTIZATION FOR THE FREQUENCY-DOMAIN AMPLITUDE ESTIMATION OF LOW-LEVEL SINE WAVES

ON THE VALIDITY OF THE NOISE MODEL OF QUANTIZATION FOR THE FREQUENCY-DOMAIN AMPLITUDE ESTIMATION OF LOW-LEVEL SINE WAVES Metrol. Meas. Syst., Vol. XXII (215), No. 1, pp. 89 1. METROLOGY AND MEASUREMENT SYSTEMS Index 3393, ISSN 86-8229 www.metrology.pg.gda.pl ON THE VALIDITY OF THE NOISE MODEL OF QUANTIZATION FOR THE FREQUENCY-DOMAIN

More information

A Subsampling UWB Radio Architecture By Analytic Signaling

A Subsampling UWB Radio Architecture By Analytic Signaling EE209AS Spring 2011 Prof. Danijela Cabric Paper Presentation Presented by: Sina Basir-Kazeruni sinabk@ucla.edu A Subsampling UWB Radio Architecture By Analytic Signaling by Mike S. W. Chen and Robert W.

More information

Reconfigurable Low-Power Continuous-Time Sigma-Delta Converter for Multi- Standard Applications

Reconfigurable Low-Power Continuous-Time Sigma-Delta Converter for Multi- Standard Applications ECEN-60: Mixed-Signal Interfaces Instructor: Sebastian Hoyos ASSIGNMENT 6 Reconfigurable Low-Power Continuous-Time Sigma-Delta Converter for Multi- Standard Applications ) Please use SIMULINK to design

More information

Summary Last Lecture

Summary Last Lecture EE47 Lecture 5 Pipelined ADCs (continued) How many bits per stage? Algorithmic ADCs utilizing pipeline structure Advanced background calibration techniques Oversampled ADCs Why oversampling? Pulse-count

More information

Lecture 6. Angle Modulation and Demodulation

Lecture 6. Angle Modulation and Demodulation Lecture 6 and Demodulation Agenda Introduction to and Demodulation Frequency and Phase Modulation Angle Demodulation FM Applications Introduction The other two parameters (frequency and phase) of the carrier

More information

EFFECT OF SAMPLING JITTER ON SIGNAL TRACKING IN A DIRECT SAMPLING DUAL BAND GNSS RECEIVER FOR CIVIL AVIATION

EFFECT OF SAMPLING JITTER ON SIGNAL TRACKING IN A DIRECT SAMPLING DUAL BAND GNSS RECEIVER FOR CIVIL AVIATION Antoine Blais, Christophe Macabiau, Olivier Julien (École Nationale de l'aviation Civile, France) (Email: antoine.blais@enac.fr) EFFECT OF SAMPLING JITTER ON SIGNAL TRACKING IN A DIRECT SAMPLING DUAL BAND

More information

Fundamentals of Digital Communication

Fundamentals of Digital Communication Fundamentals of Digital Communication Network Infrastructures A.A. 2017/18 Digital communication system Analog Digital Input Signal Analog/ Digital Low Pass Filter Sampler Quantizer Source Encoder Channel

More information

APPLICATION NOTE 3942 Optimize the Buffer Amplifier/ADC Connection

APPLICATION NOTE 3942 Optimize the Buffer Amplifier/ADC Connection Maxim > Design Support > Technical Documents > Application Notes > Communications Circuits > APP 3942 Maxim > Design Support > Technical Documents > Application Notes > High-Speed Interconnect > APP 3942

More information

Real Time Jitter Analysis

Real Time Jitter Analysis Real Time Jitter Analysis Agenda ı Background on jitter measurements Definition Measurement types: parametric, graphical ı Jitter noise floor ı Statistical analysis of jitter Jitter structure Jitter PDF

More information

Gábor C. Temes. School of Electrical Engineering and Computer Science Oregon State University. 1/25

Gábor C. Temes. School of Electrical Engineering and Computer Science Oregon State University. 1/25 Gábor C. Temes School of Electrical Engineering and Computer Science Oregon State University temes@ece.orst.edu 1/25 Noise Intrinsic (inherent) noise: generated by random physical effects in the devices.

More information

Problems from the 3 rd edition

Problems from the 3 rd edition (2.1-1) Find the energies of the signals: a) sin t, 0 t π b) sin t, 0 t π c) 2 sin t, 0 t π d) sin (t-2π), 2π t 4π Problems from the 3 rd edition Comment on the effect on energy of sign change, time shifting

More information

MASH 2-1 MULTI-BIT SIGMA-DELTA MODULATOR FOR WLAN L 2 ( ) ( ) 1( 1 1 1

MASH 2-1 MULTI-BIT SIGMA-DELTA MODULATOR FOR WLAN L 2 ( ) ( ) 1( 1 1 1 MASH 2- MULTI-BIT SIGMA-DELTA MODULATOR FOR WLAN Yu hang, Ning Xie, Hui Wang and Yejun He College of Information Engineering, Shenzhen University, Shenzhen, Guangdong 58060, China kensouren@yahoo.com.cn

More information

The Case for Oversampling

The Case for Oversampling EE47 Lecture 4 Oversampled ADCs Why oversampling? Pulse-count modulation Sigma-delta modulation 1-Bit quantization Quantization error (noise) spectrum SQNR analysis Limit cycle oscillations nd order ΣΔ

More information

ELT Receiver Architectures and Signal Processing Fall Mandatory homework exercises

ELT Receiver Architectures and Signal Processing Fall Mandatory homework exercises ELT-44006 Receiver Architectures and Signal Processing Fall 2014 1 Mandatory homework exercises - Individual solutions to be returned to Markku Renfors by email or in paper format. - Solutions are expected

More information

CT-516 Advanced Digital Communications

CT-516 Advanced Digital Communications CT-516 Advanced Digital Communications Yash Vasavada Winter 2017 DA-IICT Lecture 17 Channel Coding and Power/Bandwidth Tradeoff 20 th April 2017 Power and Bandwidth Tradeoff (for achieving a particular

More information

Receiver Architectures - Part 2. Increasing the role of DSP in receiver front-ends

Receiver Architectures - Part 2. Increasing the role of DSP in receiver front-ends TLT-5806/RxArch2/1 Receiver Architectures - Part 2 Increasing the role of DSP in receiver front-ends Markku Renfors Department of Communications Engineering Tampere University of Technology, Finland markku.renfors@tut.fi

More information

Pipeline vs. Sigma Delta ADC for Communications Applications

Pipeline vs. Sigma Delta ADC for Communications Applications Pipeline vs. Sigma Delta ADC for Communications Applications Noel O Riordan, Mixed-Signal IP Group, S3 Semiconductors noel.oriordan@s3group.com Introduction The Analog-to-Digital Converter (ADC) is a key

More information

Multirate DSP, part 3: ADC oversampling

Multirate DSP, part 3: ADC oversampling Multirate DSP, part 3: ADC oversampling Li Tan - May 04, 2008 Order this book today at www.elsevierdirect.com or by calling 1-800-545-2522 and receive an additional 20% discount. Use promotion code 92562

More information

ECE 359 Spring 2003 Handout # 16 April 15, SNR for ANGLE MODULATION SYSTEMS. v(t) = A c cos(2πf c t + φ(t)) for FM. for PM.

ECE 359 Spring 2003 Handout # 16 April 15, SNR for ANGLE MODULATION SYSTEMS. v(t) = A c cos(2πf c t + φ(t)) for FM. for PM. ECE 359 Spring 23 Handout # 16 April 15, 23 Recall that for angle modulation: where The modulation index: ag replacements SNR for ANGLE MODULATION SYSTEMS v(t) = A c cos(2πf c t + φ(t)) t 2πk f m(t )dt

More information

CMOS Analog to Digital Converters : State-of-the-Art and Perspectives in Digital Communications ADC

CMOS Analog to Digital Converters : State-of-the-Art and Perspectives in Digital Communications ADC CMOS Analog to Digital Converters : State-of-the-Art and Perspectives in Digital Communications ADC Hussein Fakhoury and Hervé Petit C²S Research Group Presentation Outline Introduction Basic concepts

More information

Outline. Noise and Distortion. Noise basics Component and system noise Distortion INF4420. Jørgen Andreas Michaelsen Spring / 45 2 / 45

Outline. Noise and Distortion. Noise basics Component and system noise Distortion INF4420. Jørgen Andreas Michaelsen Spring / 45 2 / 45 INF440 Noise and Distortion Jørgen Andreas Michaelsen Spring 013 1 / 45 Outline Noise basics Component and system noise Distortion Spring 013 Noise and distortion / 45 Introduction We have already considered

More information

Speech, music, images, and video are examples of analog signals. Each of these signals is characterized by its bandwidth, dynamic range, and the

Speech, music, images, and video are examples of analog signals. Each of these signals is characterized by its bandwidth, dynamic range, and the Speech, music, images, and video are examples of analog signals. Each of these signals is characterized by its bandwidth, dynamic range, and the nature of the signal. For instance, in the case of audio

More information

Lecture Outline. ESE 531: Digital Signal Processing. Anti-Aliasing Filter with ADC ADC. Oversampled ADC. Oversampled ADC

Lecture Outline. ESE 531: Digital Signal Processing. Anti-Aliasing Filter with ADC ADC. Oversampled ADC. Oversampled ADC Lecture Outline ESE 531: Digital Signal Processing Lec 12: February 21st, 2017 Data Converters, Noise Shaping (con t)! Data Converters " Anti-aliasing " ADC " Quantization "! Noise Shaping 2 Anti-Aliasing

More information

ELT Receiver Architectures and Signal Processing Exam Requirements and Model Questions 2018

ELT Receiver Architectures and Signal Processing Exam Requirements and Model Questions 2018 TUT/ICE 1 ELT-44006 Receiver Architectures and Signal Processing Exam Requirements and Model Questions 2018 General idea of these Model Questions is to highlight the central knowledge expected to be known

More information

EE 230 Lecture 39. Data Converters. Time and Amplitude Quantization

EE 230 Lecture 39. Data Converters. Time and Amplitude Quantization EE 230 Lecture 39 Data Converters Time and Amplitude Quantization Review from Last Time: Time Quantization How often must a signal be sampled so that enough information about the original signal is available

More information

HY448 Sample Problems

HY448 Sample Problems HY448 Sample Problems 10 November 2014 These sample problems include the material in the lectures and the guided lab exercises. 1 Part 1 1.1 Combining logarithmic quantities A carrier signal with power

More information

Spread Spectrum (SS) is a means of transmission in which the signal occupies a

Spread Spectrum (SS) is a means of transmission in which the signal occupies a SPREAD-SPECTRUM SPECTRUM TECHNIQUES: A BRIEF OVERVIEW SS: AN OVERVIEW Spread Spectrum (SS) is a means of transmission in which the signal occupies a bandwidth in excess of the minimum necessary to send

More information

Digital Processing of Continuous-Time Signals

Digital Processing of Continuous-Time Signals Chapter 4 Digital Processing of Continuous-Time Signals 清大電機系林嘉文 cwlin@ee.nthu.edu.tw 03-5731152 Original PowerPoint slides prepared by S. K. Mitra 4-1-1 Digital Processing of Continuous-Time Signals Digital

More information

ISSN Vol.03,Issue.15 July-2014, Pages:

ISSN Vol.03,Issue.15 July-2014, Pages: www.semargroup.org, www.ijsetr.com ISSN 2319-8885 Vol.03,Issue.15 July-2014, Pages:3218-3222 SANTOSH KUMAR YADAV 1, ANIL KUMAR 2, ARVIND KUMAR JAISWAL 3 1 Dept of ECE, Sam Higginbottom Institute of Agriculture,

More information

ESE 531: Digital Signal Processing

ESE 531: Digital Signal Processing ESE 531: Digital Signal Processing Lec 12: February 21st, 2017 Data Converters, Noise Shaping (con t) Lecture Outline! Data Converters " Anti-aliasing " ADC " Quantization " Practical DAC! Noise Shaping

More information

DYNAMIC BEHAVIOR MODELS OF ANALOG TO DIGITAL CONVERTERS AIMED FOR POST-CORRECTION IN WIDEBAND APPLICATIONS

DYNAMIC BEHAVIOR MODELS OF ANALOG TO DIGITAL CONVERTERS AIMED FOR POST-CORRECTION IN WIDEBAND APPLICATIONS XVIII IMEKO WORLD CONGRESS th 11 WORKSHOP ON ADC MODELLING AND TESTING September, 17 22, 26, Rio de Janeiro, Brazil DYNAMIC BEHAVIOR MODELS OF ANALOG TO DIGITAL CONVERTERS AIMED FOR POST-CORRECTION IN

More information

A Closer Look at 2-Stage Digital Filtering in the. Proposed WIDAR Correlator for the EVLA. NRC-EVLA Memo# 003. Brent Carlson, June 29, 2000 ABSTRACT

A Closer Look at 2-Stage Digital Filtering in the. Proposed WIDAR Correlator for the EVLA. NRC-EVLA Memo# 003. Brent Carlson, June 29, 2000 ABSTRACT MC GMIC NRC-EVLA Memo# 003 1 A Closer Look at 2-Stage Digital Filtering in the Proposed WIDAR Correlator for the EVLA NRC-EVLA Memo# 003 Brent Carlson, June 29, 2000 ABSTRACT The proposed WIDAR correlator

More information

Some Radio Implementation Challenges in 3G-LTE Context

Some Radio Implementation Challenges in 3G-LTE Context 1 (12) Dirty-RF Theme Some Radio Implementation Challenges in 3G-LTE Context Dr. Mikko Valkama Tampere University of Technology Institute of Communications Engineering mikko.e.valkama@tut.fi 2 (21) General

More information

Effect of Oscillator Phase Noise and Processing Delay in Full-Duplex OFDM Repeaters

Effect of Oscillator Phase Noise and Processing Delay in Full-Duplex OFDM Repeaters Effect of Oscillator Phase Noise and Processing Delay in Full-Duplex OFDM Repeaters Taneli Riihonen, Pramod Mathecken, and Risto Wichman Aalto University School of Electrical Engineering, Finland Session

More information

FYS3240 PC-based instrumentation and microcontrollers. Signal sampling. Spring 2015 Lecture #5

FYS3240 PC-based instrumentation and microcontrollers. Signal sampling. Spring 2015 Lecture #5 FYS3240 PC-based instrumentation and microcontrollers Signal sampling Spring 2015 Lecture #5 Bekkeng, 29.1.2015 Content Aliasing Nyquist (Sampling) ADC Filtering Oversampling Triggering Analog Signal Information

More information

Clock Jitter Estimation and Suppression in OFDM Systems Employing Bandpass Σ ADC

Clock Jitter Estimation and Suppression in OFDM Systems Employing Bandpass Σ ADC Clock Jitter Estimation and Suppression in OFDM Systems Employing Bandpass Σ ADC Bakti Darma Putra and Gerhard Fettweis Vodafone Chair Mobile Communications Systems Technische Universität Dresden, D-01062

More information

Digital Processing of

Digital Processing of Chapter 4 Digital Processing of Continuous-Time Signals 清大電機系林嘉文 cwlin@ee.nthu.edu.tw 03-5731152 Original PowerPoint slides prepared by S. K. Mitra 4-1-1 Digital Processing of Continuous-Time Signals Digital

More information

EE247 Lecture 14. To avoid having EE247 & EE 142 or EE290C midterms on the same day, EE247 midterm moved from Oct. 20 th to Thurs. Oct.

EE247 Lecture 14. To avoid having EE247 & EE 142 or EE290C midterms on the same day, EE247 midterm moved from Oct. 20 th to Thurs. Oct. Administrative issues EE247 Lecture 14 To avoid having EE247 & EE 142 or EE29C midterms on the same day, EE247 midterm moved from Oct. 2 th to Thurs. Oct. 27 th Homework # 4 due on Thurs. Oct. 2 th H.K.

More information

A Closer Look at 2-Stage Digital Filtering in the. Proposed WIDAR Correlator for the EVLA

A Closer Look at 2-Stage Digital Filtering in the. Proposed WIDAR Correlator for the EVLA NRC-EVLA Memo# 1 A Closer Look at 2-Stage Digital Filtering in the Proposed WIDAR Correlator for the EVLA NRC-EVLA Memo# Brent Carlson, June 2, 2 ABSTRACT The proposed WIDAR correlator for the EVLA that

More information

PERFORMANCE ANALYSIS OF DIFFERENT M-ARY MODULATION TECHNIQUES IN FADING CHANNELS USING DIFFERENT DIVERSITY

PERFORMANCE ANALYSIS OF DIFFERENT M-ARY MODULATION TECHNIQUES IN FADING CHANNELS USING DIFFERENT DIVERSITY PERFORMANCE ANALYSIS OF DIFFERENT M-ARY MODULATION TECHNIQUES IN FADING CHANNELS USING DIFFERENT DIVERSITY 1 MOHAMMAD RIAZ AHMED, 1 MD.RUMEN AHMED, 1 MD.RUHUL AMIN ROBIN, 1 MD.ASADUZZAMAN, 2 MD.MAHBUB

More information

ESE 531: Digital Signal Processing

ESE 531: Digital Signal Processing ESE 531: Digital Signal Processing Lec 11: February 20, 2018 Data Converters, Noise Shaping Lecture Outline! Review: Multi-Rate Filter Banks " Quadrature Mirror Filters! Data Converters " Anti-aliasing

More information

Interference Issues between UMTS & WLAN in a Multi-Standard RF Receiver

Interference Issues between UMTS & WLAN in a Multi-Standard RF Receiver Interference Issues between UMTS & WLAN in a Multi-Standard RF Receiver Nastaran Behjou, Basuki E. Priyanto, Ole Kiel Jensen, and Torben Larsen RISC Division, Department of Communication Technology, Aalborg

More information

Timing Error Analysis in Digital-to-Analog Converters

Timing Error Analysis in Digital-to-Analog Converters Timing Error Analysis in Digital-to-Analog Converters - Effects of Sampling Clock Jitter and Timing Skew (Glitch) - Shinya Kawakami, Haruo Kobayashi, Naoki Kurosawa, Ikkou Miyauchi, Hideyuki Kogure, Takanori

More information

DIGITAL processing has become ubiquitous, and is the

DIGITAL processing has become ubiquitous, and is the IEEE TRANSACTIONS ON SIGNAL PROCESSING, VOL. 59, NO. 4, APRIL 2011 1491 Multichannel Sampling of Pulse Streams at the Rate of Innovation Kfir Gedalyahu, Ronen Tur, and Yonina C. Eldar, Senior Member, IEEE

More information

Clock signal requirement for high-frequency, high dynamic range acquisition systems

Clock signal requirement for high-frequency, high dynamic range acquisition systems REVIEW OF SCIENTIFIC INSTRUMENTS 76, 115103 2005 Clock signal requirement for high-frequency, high dynamic range acquisition systems Ivo Viščor and Josef Halámek Institute of Scientific Instruments, Academy

More information

SHF Communication Technologies AG. Wilhelm-von-Siemens-Str. 23D Berlin Germany. Phone Fax

SHF Communication Technologies AG. Wilhelm-von-Siemens-Str. 23D Berlin Germany. Phone Fax SHF Communication Technologies AG Wilhelm-von-Siemens-Str. 23D 12277 Berlin Germany Phone +49 30 772051-0 Fax ++49 30 7531078 E-Mail: sales@shf.de Web: http://www.shf.de Application Note Jitter Injection

More information

Problem Sheet 1 Probability, random processes, and noise

Problem Sheet 1 Probability, random processes, and noise Problem Sheet 1 Probability, random processes, and noise 1. If F X (x) is the distribution function of a random variable X and x 1 x 2, show that F X (x 1 ) F X (x 2 ). 2. Use the definition of the cumulative

More information

Receiver Architectures - Part 2. Increasing the role of DSP in receiver front-ends

Receiver Architectures - Part 2. Increasing the role of DSP in receiver front-ends ELT-44007/RxArch2/1 Receiver Architectures - Part 2 Increasing the role of DSP in receiver front-ends Markku Renfors Laboratory of Electronics and Communications Engineering Tampere University of Technology,

More information

Analog-to-Digital Converters

Analog-to-Digital Converters EE47 Lecture 3 Oversampled ADCs Why oversampling? Pulse-count modulation Sigma-delta modulation 1-Bit quantization Quantization error (noise) spectrum SQNR analysis Limit cycle oscillations nd order ΣΔ

More information

Computing TIE Crest Factors for Telecom Applications

Computing TIE Crest Factors for Telecom Applications TECHNICAL NOTE Computing TIE Crest Factors for Telecom Applications A discussion on computing crest factors to estimate the contribution of random jitter to total jitter in a specified time interval. by

More information

Satellite Communications: Part 4 Signal Distortions & Errors and their Relation to Communication Channel Specifications. Howard Hausman April 1, 2010

Satellite Communications: Part 4 Signal Distortions & Errors and their Relation to Communication Channel Specifications. Howard Hausman April 1, 2010 Satellite Communications: Part 4 Signal Distortions & Errors and their Relation to Communication Channel Specifications Howard Hausman April 1, 2010 Satellite Communications: Part 4 Signal Distortions

More information

CONTINUOUS-TIME (CT) ΔΣ modulators have gained

CONTINUOUS-TIME (CT) ΔΣ modulators have gained 530 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS, VOL. 56, NO. 7, JULY 009 DT Modeling of Clock Phase-Noise Effects in LP CT ΔΣ ADCs With RZ Feedback Martin Anderson, Member, IEEE, and

More information

l To emphasize the measurement issues l To develop in-depth understanding of noise n timing noise, phase noise in RF systems! n noise in converters!

l To emphasize the measurement issues l To develop in-depth understanding of noise n timing noise, phase noise in RF systems! n noise in converters! Purpose! Measurement Methods and Applications to High-Performance Timing Test! Mani Soma! Univ of Washington, Seattle! l To emphasize the measurement issues critical in high-frequency test! l To develop

More information

Performance Analysis of Cognitive Radio based on Cooperative Spectrum Sensing

Performance Analysis of Cognitive Radio based on Cooperative Spectrum Sensing Performance Analysis of Cognitive Radio based on Cooperative Spectrum Sensing Sai kiran pudi 1, T. Syama Sundara 2, Dr. Nimmagadda Padmaja 3 Department of Electronics and Communication Engineering, Sree

More information

Multipath can be described in two domains: time and frequency

Multipath can be described in two domains: time and frequency Multipath can be described in two domains: and frequency Time domain: Impulse response Impulse response Frequency domain: Frequency response f Sinusoidal signal as input Frequency response Sinusoidal signal

More information

Receiver Designs for the Radio Channel

Receiver Designs for the Radio Channel Receiver Designs for the Radio Channel COS 463: Wireless Networks Lecture 15 Kyle Jamieson [Parts adapted from C. Sodini, W. Ozan, J. Tan] Today 1. Delay Spread and Frequency-Selective Fading 2. Time-Domain

More information

Appendix A Comparison of ADC Architectures

Appendix A Comparison of ADC Architectures Appendix A Comparison of ADC Architectures A comparison of continuous-time delta-sigma (CT ), pipeline, and timeinterleaved (TI) SAR ADCs which target wide signal bandwidths (greater than 100 MHz) and

More information

Computer Networks - Xarxes de Computadors

Computer Networks - Xarxes de Computadors Computer Networks - Xarxes de Computadors Outline Course Syllabus Unit 1: Introduction Unit 2. IP Networks Unit 3. Point to Point Protocols -TCP Unit 4. Local Area Networks, LANs 1 Outline Introduction

More information

System on a Chip. Prof. Dr. Michael Kraft

System on a Chip. Prof. Dr. Michael Kraft System on a Chip Prof. Dr. Michael Kraft Lecture 5: Data Conversion ADC Background/Theory Examples Background Physical systems are typically analogue To apply digital signal processing, the analogue signal

More information

Timing Noise Measurement of High-Repetition-Rate Optical Pulses

Timing Noise Measurement of High-Repetition-Rate Optical Pulses 564 Timing Noise Measurement of High-Repetition-Rate Optical Pulses Hidemi Tsuchida National Institute of Advanced Industrial Science and Technology 1-1-1 Umezono, Tsukuba, 305-8568 JAPAN Tel: 81-29-861-5342;

More information

ORTHOGONAL frequency division multiplexing (OFDM)

ORTHOGONAL frequency division multiplexing (OFDM) 144 IEEE TRANSACTIONS ON BROADCASTING, VOL. 51, NO. 1, MARCH 2005 Performance Analysis for OFDM-CDMA With Joint Frequency-Time Spreading Kan Zheng, Student Member, IEEE, Guoyan Zeng, and Wenbo Wang, Member,

More information

THE RECENT surge of interests in wireless digital communication

THE RECENT surge of interests in wireless digital communication IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 46, NO. 6, JUNE 1999 699 Noise Analysis for Sampling Mixers Using Stochastic Differential Equations Wei Yu and Bosco

More information

Course 2: Channels 1 1

Course 2: Channels 1 1 Course 2: Channels 1 1 "You see, wire telegraph is a kind of a very, very long cat. You pull his tail in New York and his head is meowing in Los Angeles. Do you understand this? And radio operates exactly

More information

Part A: Spread Spectrum Systems

Part A: Spread Spectrum Systems 1 Telecommunication Systems and Applications (TL - 424) Part A: Spread Spectrum Systems Dr. ir. Muhammad Nasir KHAN Department of Electrical Engineering Swedish College of Engineering and Technology March

More information

BANDPASS delta sigma ( ) modulators are used to digitize

BANDPASS delta sigma ( ) modulators are used to digitize 680 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS, VOL. 52, NO. 10, OCTOBER 2005 A Time-Delay Jitter-Insensitive Continuous-Time Bandpass 16 Modulator Architecture Anurag Pulincherry, Michael

More information

Sigma-Delta ADC Tutorial and Latest Development in 90 nm CMOS for SoC

Sigma-Delta ADC Tutorial and Latest Development in 90 nm CMOS for SoC Sigma-Delta ADC Tutorial and Latest Development in 90 nm CMOS for SoC Jinseok Koh Wireless Analog Technology Center Texas Instruments Inc. Dallas, TX Outline Fundamentals for ADCs Over-sampling and Noise

More information

Module 10 : Receiver Noise and Bit Error Ratio

Module 10 : Receiver Noise and Bit Error Ratio Module 10 : Receiver Noise and Bit Error Ratio Lecture : Receiver Noise and Bit Error Ratio Objectives In this lecture you will learn the following Receiver Noise and Bit Error Ratio Shot Noise Thermal

More information

Center for Advanced Computing and Communication, North Carolina State University, Box7914,

Center for Advanced Computing and Communication, North Carolina State University, Box7914, Simplied Block Adaptive Diversity Equalizer for Cellular Mobile Radio. Tugay Eyceoz and Alexandra Duel-Hallen Center for Advanced Computing and Communication, North Carolina State University, Box7914,

More information

RECOMMENDATION ITU-R SM Method for measurements of radio noise

RECOMMENDATION ITU-R SM Method for measurements of radio noise Rec. ITU-R SM.1753 1 RECOMMENDATION ITU-R SM.1753 Method for measurements of radio noise (Question ITU-R 1/45) (2006) Scope For radio noise measurements there is a need to have a uniform, frequency-independent

More information

Waveform Encoding - PCM. BY: Dr.AHMED ALKHAYYAT. Chapter Two

Waveform Encoding - PCM. BY: Dr.AHMED ALKHAYYAT. Chapter Two Chapter Two Layout: 1. Introduction. 2. Pulse Code Modulation (PCM). 3. Differential Pulse Code Modulation (DPCM). 4. Delta modulation. 5. Adaptive delta modulation. 6. Sigma Delta Modulation (SDM). 7.

More information

Algorithm to Improve the Performance of OFDM based WLAN Systems

Algorithm to Improve the Performance of OFDM based WLAN Systems International Journal of Computer Science & Communication Vol. 1, No. 2, July-December 2010, pp. 27-31 Algorithm to Improve the Performance of OFDM based WLAN Systems D. Sreenivasa Rao 1, M. Kanti Kiran

More information

Data Converter Topics. Suggested Reference Texts

Data Converter Topics. Suggested Reference Texts Data Converter Topics Basic Operation of Data Converters Uniform sampling and reconstruction Uniform amplitude quantization Characterization and Testing Common ADC/DAC Architectures Selected Topics in

More information

PLL FM Demodulator Performance Under Gaussian Modulation

PLL FM Demodulator Performance Under Gaussian Modulation PLL FM Demodulator Performance Under Gaussian Modulation Pavel Hasan * Lehrstuhl für Nachrichtentechnik, Universität Erlangen-Nürnberg Cauerstr. 7, D-91058 Erlangen, Germany E-mail: hasan@nt.e-technik.uni-erlangen.de

More information

SIR PADAMPAT SINGHANIA UNIVERSITY UDAIPUR Sample Question Paper for Ph.D. (Electronics & Communication Engineering) SPSAT 18

SIR PADAMPAT SINGHANIA UNIVERSITY UDAIPUR Sample Question Paper for Ph.D. (Electronics & Communication Engineering) SPSAT 18 INSTRUCTIONS SIR PADAMPAT SINGHANIA UNIVERSITY UDAIPUR Sample Question Paper for Ph.D. (Electronics & Communication Engineering) SPSAT 18 The test is 60 minutes long and consists of 40 multiple choice

More information

Adjacent Channel Interference Mitigation Schemes for Software Defined Radio Receiver

Adjacent Channel Interference Mitigation Schemes for Software Defined Radio Receiver Adjacent Channel Interference Mitigation Schemes for Software Defined Radio Receiver July 2008 Anas Bin Muhamad Bostamam DISSERTATION Submitted to the School of Integrated Design Engineering, Keio University,

More information

Exercises for chapter 2

Exercises for chapter 2 Exercises for chapter Digital Communications A baseband PAM system uses as receiver filter f(t) a matched filter, f(t) = g( t), having two choices for transmission filter g(t) g a (t) = ( ) { t Π =, t,

More information

ALMA Memo 452: Passband Shape Deviation Limits Larry R. D Addario 2003 April 09

ALMA Memo 452: Passband Shape Deviation Limits Larry R. D Addario 2003 April 09 ALMA Memo 452: Passband Shape Deviation Limits Larry R. D Addario 23 April 9 Abstract. Beginning with the ideal passband, which is constant from Nf s /2 to (N + 1)f s /2 and zero elsewhere, where N =,

More information