HIGH SPEED TRANSISTOR OPTOCOUPLERS

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1 DESCRIPTION The, and optocouplers consist of an AlGaAs LED optically coupled to a high speed photodetector transistor housed in a compact 8pin smalloutline package. A separate connection for the bias of the photodiode improves the speed by several orders of magnitude over conventional phototransistor optocouplers by reducing the basecollector capacitance of the input transistor. Package Dimensions FEATURES High speed1 MBit/s Superior CMR1 kv/µs CTR guaranteed 7 C U.L. recognized (File # E97) APPLICATIONS Line receivers Pulse transformer replacement Output interface to CMOSLSTTLTTL Wide bandwidth analog coupling N/C V F _ 3 N/C 4 5 GND V CC V B, *BASE NOT CONNECTED FOR * S EAT ING PLAN E Pin (3.63).123 (3.13).22 (5.13).182 (4.63).164 (4.16).144 (3.66).8 (.2).21 (.53).3 (.8).11 (.28).5 (1.27) TYP Lead Coplanarity :.4 (.1) MAX.244 (6.19).224 (5.69) NOTE All dimensions are in inches (millimeters).19 [.48].1 (.25).6 (.16) ABSOLUTE MAXIMUM RATINGS (T A = 25 C unless otherwise specified) Parameter Symbol Value Units Storage Temperature TSTG 55 to +125 C Operating Temperature TOPR 55 to +1 C Reflow Temperature Profile (Refer to fig. 11) EMITTER DC/Average Forward Input Current IF (avg) 25 ma Peak Forward Input Current (5% duty cycle, 1 ms P.W.) I F (pk) 5 ma Peak Transient Input Current ( 1 µs P.W., 3 pps) IF (trans) A Reverse Input Voltage VR 5 V Input Power Dissipation PD 45 mw DETECTOR Average Output Current (Pin 6) IO (avg) 8 ma Peak Output Current IO (pk) 16 ma EmitterBase Reverse Voltage (Except ) VEBR 5 V Supply Voltage VCC.5 to 3 V Output Voltage VO.5 to 2 V Base Current (Except ) IB 5 ma Output power dissipation PD 1 mw 1 OF 9

2 ELECTRICAL CHARACTERISTICS (T A = to 7 C Unless otherwise specified) INDIVIDUAL COMPONENT CHARACTERISTICS Parameter Test Conditions Symbol Device EMITTER (I F = 16 ma, T A =25 C) V F All Input Forward Voltage (IF = 16 ma) 1. 8 Input Reverse Breakdown Voltage (I R = 1 µa) BV R All 5. V Temperature coefficient of forward voltage (I F = 16 ma) ( V F / T A ) All 1.6 mv/ C DETECTOR Logic high output current Logic low supply current Logic high supply current Min Typ** (I F = ma, = V CC = 5.5 V) All.1.5 (T A =25 C) (I F = ma, = V CC = 15 V) (T A =25 C) Max Unit I OH µa All.5 1 (I F = ma, = V CC = 15 V) All 5 (I F = 16 ma, = Open) (V CC = 15 V) (I F = ma, = Open, V CC = 15 V) (T A =25 C) (I F = ma, = Open) (V CC = 15 V) I CCL All 12 2 µa All.1 1 I CCH µa All 2 V TRANSFER CHARACTERISTICS (TA = to 7 C Unless otherwise specified) Parameter COUPLED Current transfer ratio (Note 5) Logic low output voltage output voltage Test Conditions (I F = 16 ma, =.4 V) Symbol Device (V CC = 4.5 V, T A =25 C) (I F = 16 ma, =.5 V) CTR Min Typ** Max (V CC = 4.5 V) (I F = 16 ma, I O = 1.1 ma) (V CC = 4.5 V, T A =25 C) (I F = 16 ma, I O = 3 ma) (V CC = 4.5 V, T A =25 C) (IF = 16 ma, I O =.8 ma) (V CC = 4.5 V) L (I F = 16 ma, I O = 2.4 ma) (V CC = 4.5 V) Unit % V ** All typicals at T A = 25 C 2 OF 9

3 SWITCHING CHARACTERISTICS (T A = to 7 C unless otherwise specified., V CC = 5 V) Parameter Test Conditions Symbol Device Min Typ** Max Unit T A = 25 C, (R L = 4.1 k, I F = 16 ma) (Note 6) (Fig. 9) (R L = 1.9 k, I F = 16 ma) (Note 7) (Fig. 9).45.8 Propagation delay TA = 25 C T time to logic low PHL (R L = 4.1 k, I F = 16 ma) (Note 6) (Fig. 9) 2. µs (R L = 1.9 k, I F = 16 ma) (Note 7) (Fig. 9) T A = 25 C, (R L = 4.1 k, I F = 16 ma) (Note 6) (Fig. 9) (R L = 1.9 k, I F = 16 ma) (Note 7) (Fig. 9).3.8 Propagation delay TA = 25 C T time to logic high PLH (R L = 4.1 k, I F = 16 ma) (Note 6) (Fig. 9) 2. µs Common mode transient immunity at logic high Common mode transient immunity at logic low (R L = 1.9 k, I F = 16 ma) (Note 7) (Fig. 9) (I F = ma, V CM = 1 V PP, R L = 4.1 k ) (Note 8) (Fig. 1) T A = 25 C (I F = ma, V CM = 1 V PP ) CM H T A = 25 C, (R L = 1.9 k ) (Note 8) (Fig. 1) (I F = 16 ma, V CM = 1 V PP, R L = 4.1 k ) (Note 8) (Fig. 1) T A = 25 C (I F = 16 ma, V CM = 1 V PP ) CM L (R L = 1.9 k ) (Note 8) (Fig. 1) 1, 1, 1, 1, V/µs V/µs ISOLATION CHARACTERISTICS (T A = C to +7 C Unless otherwise specified.) Characteristics Test Conditions Symbol Min Typ** Max Unit InputOutput Isolation Voltage (f = 6 Hz, t = min) (9,1) V ISO 25 Vac RMS Isolation Resistance (VIO R ISO 1 11 Isolation Capacitance (V IO =, f = MHz) (9) C ISO.2 pf ** All typicals at T A = 25 C 3 OF 9

4 NOTES 1. Derate linearly above 7 C freeair temperature at a rate of.8 ma/ C. 2. Derate linearly above 7 C freeair temperature at a rate of 1.6 ma/ C. 3. Derate linearly above 7 C freeair temperature at a rate of.9 mw/ C. 4. Derate linearly above 7 C freeair temperature at a rate of 2. mw/ C. 5. Current Transfer Ratio is defined as a ratio of output collector current, I O, to the forward LED input current, I F, times 1%. 6. The 4.1 k load represents 1 LSTTL unit load of.36 ma and 6.1k pullup resistor. 7. The 1.9 k load represents 1 TTL unit load of 1.6 ma and 5.6 k pullup resistor. 8. Common mode transient immunity in logic high level is the maximum tolerable (positive) dv cm /dt on the leading edge of the common mode pulse signal V CM, to assure that the output will remain in a logic high state (i.e., 2. V). Common mode transient immunity in logic low level is the maximum tolerable (negative) dv cm /dt on the trailing edge of the common mode pulse signal, V CM, to assure that the output will remain in a logic low state (i.e.,.8 V). 9. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together VAC RMS for 1 minute duration is equivalent to 3 VAC RMS for 1 second duration. 4 OF 9

5 C TR CURRENT T RANSFER R A TIO (% ) N ORMALIZED CURRENT T RANSFER R A TIO INPUT FO W ARD CURRENT (ma ) N ORMALIZED CURRENT T RANSFER R A TIO 1 Fig. 1 Input Forward Current vs. Input Forward Voltage 1.5 Fig. 2 Current Transfer Ratio vs. Input Current 1 1 IF R Normalized I F = 16 ma =.4 V V CC = = 5 V V F INPUT FORWARD VOLTAGE (V) I F INPUT CURRENT (ma) Fig. 3 Current Tansfer Ratio vs. Input Forward Current Fig. 4 Current Transfer Ratio vs. Temperature T A = 85 C T A = 7 C T A = C 2 1 T A = 4 C.8.7 Normalized I F = 16 ma =.4 V V CC = 5 V I F INPUT FORWARD CURRENT (ma) TA TEMPERATURE ( C) 5 OF 9

6 LOGIC HIGH OUTPUT CURRENT (na P OPAGA T ION DEL A Y (µs ) W SUPP L Y CURRENT (µa ) C C LOGIC L O OUTPUT CURRENT (ma 16 V CC = 5 V Fig. 5 DC Transfer Characteristics I F = 4 ma I F = 35 ma 2 V CC = 15 V Fig. 6 Logic Low Supply Current vs. Input Current IO ) I F = 3 ma I F = 25 ma I F = 2 ma I F = 15 ma I F = 1 ma I F = 5 ma OUTPUT VOLTAGE (V) I L I F INPUT CURRENT (ma) Fig. 7 Logic High Output Current vs. Temperature Fig. 8 Propagation Delay vs. Temperature t PHL 1 V CC = = 5 V.4 t PLH I O H ) tp R.2. I F = 16 ma HCPL5/452 tested at R= 4.1kΩ T A TEMPERATURE ( C) T A TEMPERATURE ( C) 6 OF 9

7 Pulse Generator I tr = 5ns F Z O = 5 1% D.C. I/ < 1 s f I Monitor F R m + V F Noise 1 Shield V CC V B VO 5 GND R L.1 µf +5 V C L = 1.5 µf I F T PHL 1.5 V 1.5 V L TPLH 5 V Fig. 9 Switching Time Test Circuit I F Noise 1 Shield 8 V CC +5 V V CM 1 V 1% V 9% 9% 1% V B R L t r t f V FF B A V F 3 4 V 6 O 5 GND.1 µf Switch at A : I = ma F 5 V + V CM Pulse Gen Switch at B : I = 16 ma F L Fig. 1 Common Mode Immunity Test Circuit 7 OF 9

8 ORDERING INFORMATION Option R1 R2 Order Entry Identifier.R1.R2 Description Tape and Reel (5 per reel) Tape and Reel (25 per reel) QT Carrier Tape Specifications 3.5 ±.2.3 MAX 4. ±.1 8. ±.1 2 ±.5 Ø1.5 MIN 1.75 ± ± ± ± ±.2.1 MAX 6.4 ±.2 Ø / User Direction of Feed C:1 sec to 4 sec 225 C Time>183 C:12 sec to18 sec 5 Time (Min) RECOMMENDED IR REFLOW PROFILE: JSTD2 Fig. 11 JEDEC Reflow Profile 8 OF 9

9 DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body,or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 9 OF 9

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