AC/DC to Logic Interface Optocouplers Technical Data
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1 H AC/DC to Logic Interface Optocouplers Technical Data HCPL-37 HCPL-376 Features Standard (HCPL-37) and Low Input Current (HCPL-376) Versions AC or DC Input Programmable Sense Voltage Hysteresis Logic Compatible Output Thresholds Guaranteed over Temperature Thresholds Independent of LED Optical Parameters Recognized under UL 1577 and CSA Approved for Dielectric Withstand Proof Test Voltage of 25 Vac, 1 Minute Description The HCPL-37 and HCPL-376 are voltage/current threshold detection optocouplers. The HCPL-376 is a low-current version of the HCPL-37. To obtain lower current operation, the HCPL-376 uses a highefficiency AlGaAs LED which provides higher light output at lower drive currents. Both devices utilize threshold sensing input buffer ICs which permit control of threshold levels over a wide range of input voltages with a single external resistor. Functional Diagram The input buffer incorporates several features: hysteresis for extra noise immunity and switching immunity, a diode bridge for easy use with ac input signals, and internal clamping Applications Limit Switch Sensing Low Voltage Detector 5 V-24 V AC/DC Voltage Sensing Relay Contact Monitor Relay Coil Voltage Monitor Current Sensing Microprocessor Interfacing AC DC+ DC- AC V CC NC V O GND TRUTH TABLE (POSITIVE LOGIC) INPUT OUTPUT H L L H CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD E
2 diodes to protect the buffer and LED from a wide range of overvoltage and over-current transients. Because threshold sensing is done prior to driving the LED, variations in optical coupling from the LED to the detector will have no effect on the threshold levels. The HCPL-37's input buffer IC has a nominal turn on threshold of 2.5 ma (I TH +) and 3.7 volts (V TH +). The buffer IC for the HCPL-376 was redesigned to permit a lower input current. The nominal turn on threshold for the HCPL-376 is 1.2 ma (I TH +) and 3.7 volts (V TH +). The high gain output stage features an open collector output providing both TTL compatible saturation voltages and CMOS compatible breakdown voltages. By combining several unique functions in a single package, the user is provided with an ideal component for industrial control computer input boards and other applications where a predetermined input threshold level is desirable. Ordering Information Specify Part Number followed by Option Number (if desired) Example HCPL-37#XXX 3 = Gull Wing Surface Mount Option 5 = Tape/Reel Package Option (1 K min.) Option data sheets available. Contact your Hewlett-Packard sales representative or authorized distributor for information. Schematic 1-349
3 UR Package Outline Drawings Standard DIP Package 9.4 (.37) 9.9 (.39) PIN ONE HP XXXX YYWW TYPE NUMBER DATE CODE UL RECOGNITION 6.1 (.24) 6.6 (.26) 7.36 (.29) 7. (.31).2 (.).33 (.13) 5 TYP (.47) MAX. 1.7 (.7) MAX. 4.7 (.15) MAX. 1 AC V CC.76 (.3) 1.4 (.56) 2.92 (.115) MIN..65 (.25) MAX. 2.2 (.9) 2. (.11).51 (.2) MIN DC+ DC- AC NC V O GND DIMENSIONS IN MILLIMETERS AND (INCHES) Gull Wing Surface Mount Option ±.25 (.3 ±.1) PAD LOCATION (FOR REFERENCE ONLY) 1.16 (.4) (.47) TYPE NUMBER DATE CODE 7 6 HP XXXX YYWW UR ±.25 (.25 ±.1) 4.26TYP. (.19) 9.39 (.37) 9.96 (.39) MOLDED UL RECOGNITION (.47) 1.77 (.7).31 (.15).635 (.25) 1.19 (.47) MAX. 1.7 (.7) MAX (.165) MAX ±.25 (.3 ±.1) 7.62 ±.25 (.3 ±.1).2 (.).33 (.13) 1. ±.32 (.43 ±.13) 2.54 (.1) BSC.635 ±.13 (.25 ±.5) DIMENSIONS IN MILLIMETERS (INCHES). TOLERANCES (UNLESS OTHERWISE SPECIFIED): xx.xx =.1 xx.xxx =.5 LEAD COPLANARITY MAXIMUM:.12 (.4).635 ±.25 (.25 ±.1) 12 NOM. 1-35
4 Maximum Solder Reflow Thermal Profile TEMPERATURE C T = 145 C, 1 C/SEC T = 115 C,.3 C/SEC T = 1 C, 1.5 C/SEC TIME MINUTES (NOTE: USE OF NON-CHLORINE ACTIVATED FLUXES IS RECOMMENDED.) Regulatory Information The HCPL-37/6 has been approved by the following organizations: UL Recognized under UL 1577, component recognition program, File E CSA Approved under CSA Component Acceptance Notice #5, File CA
5 Insulation and Safety Related Specifications Parameter Symbol Value Units Conditions Min. External Air Gap L(IO1) 7.1 mm Measured from input terminals to output terminals, (External Clearance) shortest distance through air Min. External Tracking L(IO2) 7.4 mm Measured from input terminals to output terminals, Path (External Creepage) shortest distance path along body Min. Internal Plastic. mm Through insulation distance, conductor to conductor, Gap (Internal Clearance) usually the direct distance between the photoemitter and photodetector inside the optocoupler cavity Tracking Resistance CTI 2 V DIN IEC 112/VDE 33 PART 1 (Comparative Tracking Index) Isolation Group IIIa Material Group (DIN VDE 11, 1/9, Table 1) Option 3 surface mount classification is Class A in accordance with CECC 2. Absolute Maximum Ratings (No derating required up to 7 C) Parameter Symbol Min. Max. Units Note Storage Temperature T S C Operating Temperature T A -4 5 C Lead Soldering Cycle Temperature 26 C 1 Time 1 s Input Current Average 5 2 Surge I IN 14 ma 2, 3 Transient 5 Input Voltage (Pins 2-3) V IN -.5 V Input Power Dissipation P IN 23 mw 4 Total Package Power Dissipation P T 35 mw 5 Output Power Dissipation P O 21 mw 6 Output Current Average I O 3 ma 7 Supply Voltage (Pins -5) V CC V Output Voltage (Pins 6-5) V O V Solder Reflow Temperature Profile See Package Outline Drawings section Recommended Operating Conditions Parameter Symbol Min. Max. Units Note Supply Voltage V CC 2 1 V Operating Temperature T A 7 C Operating Frequency f 4 khz 1-352
6 Electrical Specifications Over Recommended Temperature T A = C to 7 C, Unless Otherwise Specified. Parameter Sym. Device Min. Typ. [9] Max. Units Conditions Fig. Note Input Threshold I TH+ HCPL ma V IN = V TH+ ; V CC = 4.5 V; 2, 3 14 Current HCPL V O =.4 V; I O 4.2 ma I TH- HCPL V IN = V TH- ; V CC = 4.5 V; HCPL V O = 2.4 V; I OH 1 µa Input DC V TH V V IN = V 2 - V 3 ; Pins 1 & 4 Open Threshold (Pins 2, 3) V CC = 4.5 V; V O =.4 V; Voltage I O 4.2 ma V TH V V IN = V 2 - V 3 ; Pins 1 & 4 Open V CC = 4.5 V; V O = 2.4 V; I O 1 µa AC V TH V V IN = V 1 - V 4 ; 14, 15 (Pins 1, 4) Pins 2 & 3 Open V CC = 4.5 V; V O =.4 V; I O 4.2 ma V TH V V IN = V 1 - V 4 ; Pins 2 & 3 Open V CC = 4.5 V; V O = 2.4 V; I O 1 µa Hysteresis I HYS HCPL ma I HYS = I TH+ I TH- 2 HCPL V HYS 1.2 V V HYS = V TH+ V TH- Input Clamp Voltage V IHC V V IHC1 = V 2 - V 3 ; V 3 = GND; 1 I IN = 1 ma; Pins 1 & 4 Connected to Pin 3 V IHC V V IHC2 = V 1 - V 4 ; I IN = 1 ma; Pins 2 & 3 Open V IHC V V IHC3 = V 2 - V 3 ; V 3 = GND; I IN = 15 ma; Pins 1 & 4 Open V ILC -.76 V V ILC = V 2 - V 3 ; V 3 = GND; I IN = -1 ma Input Current I IN HCPL ma V IN = V 2 V 3 = 5. V 5 HCPL Pins 1 & 4 Open Bridge Diode V D1,2 HCPL V I IN = 3 ma Forward Voltage HCPL I IN = 1.5 ma V D3,4 HCPL I IN = 3 ma HCPL I IN = 1.5 ma Logic Low Output V OL.1.4 V V CC = 4.5 V; I OL = 4.2 ma 5 14 Voltage Logic High I OH 1 µa V OH = V CC = 1 V 14 Output Current Logic Low Supply I CCL HCPL ma V 2 V 3 = 5. V; V O = Open; 6 Current HCPL V CC = 5. V Logic High Supply I CCH.2 4 µa V CC = 1 V; V O = Open 4 14 Current Input Capacitance C IN 5 pf f = 1 MHz; V IN = V, Pins 2 & 3, Pins 1 & 4 Open 1-353
7 Switching Specifications T A = 25 C, V CC = 5. V, Unless Otherwise Specified. Parameter Sym. Device Min. Typ. Max. Units Test Conditions Fig. Note Propagation Delay HCPL Time to Logic Low t PHL 15. µs R L = 4.7 kω, C L = 3 pf 1 at Output HCPL , 1 Propagation Delay HCPL Time to Logic High t PLH 4. µs R L = 4.7 kω, C L = 3 pf 11 at Output HCPL-376. HCPL-37 2 Output Rise Time t r µs R L = 4.7 kω, C L = 3 pf (1-9%) HCPL HCPL-37.3 Output Fall Time t f µs R L = 4.7 kω, C L = 3 pf (9-1%) HCPL Common Mode I IN = ma, R L = 4.7 kω, Transient Immunity CM H 4 V/µs V O min = 2. V, V CM = 14 V at Logic High Output Common Mode HCPL-37 I IN = 3.11 ma R L = 4.7 kω, Transient Immunity CM L 6 V/µs V O max =. V, at Logic Low Output HCPL-376 I IN = 1.56 ma V CM = 14 V 9, 11 12, 13 Package Characteristics Over Recommended Temperature T A = C to 7 C, Unless Otherwise Specified. Parameter Sym. Min. Typ. [9] Max. Units Conditions Fig. Note Input-Output Momentary V ISO 25 V rms RH 5%, t = 1 min; 16, Withstand Voltage* T A = 25 C 17 Input-Output Resistance R I-O 1 12 Ω V I-O = 5 Vdc 16 Input-Output Capacitance C I-O.6 pf f = 1 MHz; V I-O = Vdc *The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the VDE 4 Insulation Characteristics Table (if applicable), your equipment level safety specification, or HP Application Note 174, Optocoupler Input-Output Endurance Voltage
8 Notes: 1. Measured at a point 1.6 mm below seating plane. 2. Current into/out of any single lead. 3. Surge input current duration is 3 ms at 12 Hz pulse repetition rate. Transient input current duration is 1 µs at 12 Hz pulse repetition rate. Note that maximum input power, P IN, must be observed. 4. Derate linearly above 7 C free-air temperature at a rate of 4.1 mw/ C. Maximum input power dissipation of 23 mw allows an input IC junction temperature of 125 C at an ambient temperature of T A = 7 C with a typical thermal resistance from junction to ambient of θ JA1 = 24 C/W. Excessive P IN and T J may result in IC chip degradation. 5. Derate linearly above 7 C free-air temperature at a rate of 5.4 mw/ C. 6. Derate linearly above 7 C free-air temperature at a rate of 3.9 mw/ C. Maximum output power dissipation of 21 mw allows an output IC junction temperature of 125 C at an ambient temperature of T A = 7 C with a typical thermal resistance from junction to ambient of θ JA = 265 C/W. 7. Derate linearly above 7 C free-air temperature at a rate of.6 ma/ C.. Maximum operating frequency is defined when output waveform Pin 6 obtains only 9% of V CC with R L = 4.7 kω, C L = 3 pf using a 5 V square wave input signal. 9. All typical values are at T A = 25 C, V CC = 5. V unless otherwise stated. 1. The t PHL propagation delay is measured from the 2.5 V level of the leading edge of a 5. V input pulse (1 µs rise time) to the 1.5 V level on the leading edge of the output pulse (see Figure 1). 11. The t PLH propagation delay is measured from the 2.5 V level of the trailing edge of a 5. V input pulse (1 µs fall time) to the 1.5 V level on the trailing edge of the output pulse (see Figure 1). 12. Common mode transient immunity in Logic High level is the maximum tolerable (positive) dv CM /dt on the leading edge of the common mode pulse, V CM, to insure that the output will remain in a Logic High state (i.e., V O > 2. V). Common mode transient immunity in Logic Low level is the maximum tolerable (negative) dv CM /dt on the trailing edge of the common mode pulse signal, V CM, to insure that the output will remain in a Logic Low state (i.e., V O <. V). See Figure In applications where dv CM /dt may exceed 5, V/µs (such as static discharge), a series resistor, R CC, should be included to protect the detector IC from destructively high surge currents. The recommended value for R CC is 24 Ω per volt of allowable drop in V CC (between Pin and V CC ) with a minimum value of 24 Ω. 14. Logic low output level at Pin 6 occurs under the conditions of V IN V TH+ as well as the range of V IN > V TH once V IN has exceeded V TH+. Logic high output level at Pin 6 occurs under the conditions of V IN V TH- as well as the range of V IN < V TH+ once V IN has decreased below V TH AC voltage is instantaneous voltage. 16. Device considered a two terminal device: Pins 1, 2, 3, 4 connected together, and Pins 5, 6, 7, connected together. 17. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 3 V rms for 1 second (leakage detection current limit, I i-o 5 µa). Figure 1. Typical Input Characteristics, I IN vs. V IN (AC Voltage is Instantaneous Value)
9 INPUT DEVICE TH + TH CONNNECTION I TH HCPL ma 1.3 ma PINS 2, 3 HCPL ma.6 ma OR 1, 4 V TH(dc) BOTH 3.7 V 2.6 V PINS 2, 3 V TH(ac) BOTH 4.9 V 3.7 V PINS 1, 4 Figure 2. Typical Transfer Characteristics. 4.2 HCPL HCPL V TH VOLTAGE THRESHOLD V V TH+ I TH+ V TH- I TH I TH CURRENT THRESHOLD ma V TH VOLTAGE THRESHOLD V V TH+ I TH+ V TH- I TH I TH CURRENT THRESHOLD ma Figure 3. Typical DC Threshold Levels vs. Temperature
10 I CCH HIGH LEVEL SUPPLY CURRENT µa I CCH V CC = 1 V V O = OPEN I IN = ma I CCH Figure 4. Typical High Level Supply Current, I CCH vs. Temperature. 4.2 HCPL HCPL I IN INPUT CURRENT ma I IN V IN = 5. V (PINS 2, 3) V CC = 5. V V OL V CC = 5. V I OL = 4.2 ma V OL LOW LEVEL OUTPUT VOLTAGE mv I IN INPUT CURRENT ma I IN V IN = 5. V (PINS 2, 3) V CC = 5. V V OL V CC = 5. V I OL = 4.2 ma V OL LOW LEVEL OUTPUT VOLTAGE mv Figure 5. Typical Input Current, I IN, and Low Level Output Voltage, V OL, vs. Temperature. I CCL LOGIC LOW SUPPLY CURRENT ma HCPL I CCL LOGIC LOW SUPPLY CURRENT ma HCPL V CC SUPPLY VOLTAGE V V CC SUPPLY VOLTAGE V Figure 6. Typical Logic Low Supply Current vs. Supply Voltage
11 t p PROPAGATION DELAY µs HCPL-37 R L = 4.7 kω C L = 3 pf V CC = 5. V 5. V V IN = 1 ms PULSE WIDTH f = 1 Hz t r, t f = 1 µs (1-9%) t PLH t PHL t p PROPAGATION DELAY µs HCPL-376 R L = 4.7 kω C L = 3 pf V CC = 5. V 5. V V IN = 1 ms PULSE WIDTH f = 1 Hz t r, t f = 1 µs (1-9%) t PLH t PHL Figure 7. Typical Propagation Delay vs. Temperature. t r RISE TIME µs HCPL-37 R L = 4.7 kω C L = 3 pf V CC = 5. V 5. V V IN = 1 ms PULSE WIDTH f = 1 Hz t r, t f = 1 µs (1-9%) t r t f t f FALL TIME ns t r RISE TIME µs t f t r HCPL-376 V IN = R L = 4.7 kω C L = 3 pf V CC = 5. V 5. V 1 ms PULSE WIDTH f = 1 Hz t r, t f = 1 µs (1-9%) t f FALL TIME ns Figure. Typical Rise, Fall Times vs. Temperature. CM COMMON MODE TRANSIENT IMMUNITY V/ µs V CC = 5. V I IN = 3.11 ma (37) I IN = 1.53 ma (376) V OL =. V R L = 4.7 kω T A = 25 C CM L V CC = 5. V I IN = ma V OH = 2. V R L = 4.7 kω T A = 25 C CM H V CM COMMON MODE TRANSIENT AMPLITUDE V Figure 9. Common Mode Transient Immunity vs. Common Mode Transient Amplitude. 1-35
12 Figure 1. Switching Test Circuit. Figure 11. Test Circuit for Common Mode Transient Immunity and Typical Waveforms. V TH+ = 3.7 V V TH = 2.6 V V TH+ = 4.9 V V TH = 3.7 V I TH+ = 2.5 ma I TH = 1.3 ma T A = 25 C Figure 12. Typical External Threshold Characteristics, V ± vs. R X
13 Figure 13. External Threshold Voltage Level Selection. Electrical Considerations The HCPL-37/376 optocouplers have internal temperature compensated, predictable voltage and current threshold points which allow selection of an external resistor, R X, to determine larger external threshold voltage levels. For a desired external threshold voltage, V ±, a corresponding typical value of R X can be obtained from Figure 12. Specific calculation of R X can be obtained from Equation (1). Specification of both V + and V - voltage threshold levels simultaneously can be obtained by the use of R X and R P as shown in Figure 13 and determined by Equations (2) and (3). R X can provide over-current transient protection by limiting input current during a transient condition. For monitoring contacts of a relay or switch, the HCPL-37/376 in combination with R X and R P can be used to allow a specific current to be conducted through the contacts for cleaning purposes (wetting current). The choice of which input voltage clamp level to choose depends upon the application of this device (see Figure 1). It is recommended that the low clamp condition be used when possible. The low clamp condition in conjunction with the low input current feature will ensure extremely low input power dissipation. In applications where dv CM /dt may be extremely large (such as static discharge), a series resistor, R CC, should be connected in series with V CC and Pin to protect the detector IC from destructively high surge currents. See Note 13 for determination of R CC. In addition, it is recommended that a ceramic disc bypass capacitor of.1 µf be placed between Pins and 5 to reduce the effect of power supply noise. For interfacing ac signals to TTL systems, output low pass filtering can be performed with a pullup resistor of 1.5 kω and 2 µf capacitor. This application requires a Schmitt trigger gate to avoid slow rise time chatter problems. For ac input applications, a filter capacitor can be placed across the dc input terminals for either signal or transient filtering. Either ac (Pins 1, 4) or dc (Pins 2, 3) input can be used to determine external threshold levels. For one specifically selected external threshold voltage level V + or V -, R X can be determined without use of R P via V + - V TH+ (-) (-) R X = (1) I TH+(-) For two specifically selected external threshold voltage levels, V + and V -, the use of R X and R P will permit this selection via equations (2), (3) provided the following conditions are met. If the denominator of equation (2) is positive, then V + V TH+ V + - V TH+ I TH+ and < V - V TH- V - - V TH- I TH- Conversely, if the denominator of equation (2) is negative, then V + V TH+ V + - V TH+ I TH+ and > V - V TH- V - - V TH- I TH- R X = V TH- (V + ) - V TH+ (V - ) (2) I TH+ (V TH- ) - I TH- (V TH+ ) V TH- (V + ) - V TH+ (V - ) R P = (3) I TH+ (V - -V TH- )+I TH- (V TH+ -V + ) 1-36
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More informationDistributed by: www.jameco.com -8-8-22 The content and copyrights of the attached material are the property of its owner. HCPL-M, HCPL-M, HCPL-M Small Outline, Lead, High CMR, High Speed, Logic Gate Optocouplers
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High CMR, High Speed TTL Compatible Optocouplers Technical Data N HCNW HCNW HCNW HCPL- HCPL- HCPL- HCPL- HCPL- HCPL- HCPL- HCPL- HCPL- HCPL- HCPL- Features kv/µs Minimum Common Mode Rejection (CMR) at
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