Single Channel, High Speed Optocouplers Technical Data

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1 Single Channel, High Speed Optocouplers Technical Data N5/ HCNW5/ HCNW45/ HCPL-5 HCPL-45/ HCPL-5/ HCPL-45/ Features 5 kv/µs Minimum Common Mode Transient Immunity at V CM = 5 V (45/45) High Speed: Mb/s TTL Compatible Available in -Pin DIP, SO-, Widebody Packages Open Collector Output Guaranteed Performance from Temperature: C to 7 C Safety Approval UL Recognized 75 V rms for minute (5 V rms for minute for HCNW and Option devices) per UL577 CSA Approved IEC/EN/DIN EN Approved V IORM = V peak for HCPL-45# V IORM = 44 V peak for HCNW devices Dual Channel Version Available (5X/454/5X/ 54) MIL-PRF-54 Hermetic Version Available (55XX/ 5XX/4N55) Applications High Voltage Insulation Video Signal Isolation Power Transistor Isolation in Motor Drives Line Receivers Feedback Element in Switched Mode Power Supplies High Speed Logic Ground Isolation TTL/TTL, TTL/ CMOS, TTL/LSTTL Replaces Pulse Transformers Replaces Slow Phototransistor Isolators Analog Signal Ground Isolation Functional Diagram NC ANODE CATHODE 7 V CC * V B V O NC 4 5 GND * NOTE: FOR 45/, 45/, PIN 7 IS NOT CONNECTED. Description These diode-transistor optocouplers use an insulating layer between a LED and an integrated photodetector to provide electrical insulation between input and output. Separate connections for the photodiode bias and output-transistor collector increase the speed up to a hundred times that of a conventional phototransistor coupler by reducing the base-collector capacitance. TRUTH TABLE (POSITIVE LOGIC) LED V O ON LOW OFF HIGH A. µf bypass capacitor must be connected between pins 5 and. CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.

2 These single channel optocouplers are available in -Pin DIP, SO- and Widebody package configurations. The N5, HCPL-5, and HCNW5 are for use in TTL/ CMOS, TTL/LSTTL or wide bandwidth analog applications. Current transfer ratio (CTR) for these devices is 7% minimum at I F = ma. The N, HCPL-5, HCPL-5, and HCNW are designed for high speed TTL/TTL applications. A standard ma TTL sink current through the input LED will provide enough Selection Guide output current for TTL load and a 5. kω pull-up resistor. CTR for these devices is 9% minimum at I F = ma. The HCPL-45, HCPL-45, and HCNW45 provide the electrical and switching performance of the N, HCPL-5, and HCNW with increased ESD protection. The HCPL-45, HCPL-45, and HCNW45 are similar to the HCPL-45, HCPL-45, and HCNW45 optocouplers but have increased common mode transient immunity of 5 kv/µs minimum at V CM = 5 V guaranteed. Schematic ANODE CATHODE + V F I F SHIELD HCPL-45/45 HCNW45 I B 7 * V B I CC I O * NOTE: FOR HCPL-45/-, HCPL-45/, HCNW45/, PIN 7 IS NOT CONNECTED. Widebody Minimum CMR -Pin DIP ( Mil) Small-Outline SO- (4 Mil) Hermetic Current Single Dual Single Dual Single Single and dv/dt V CM Transfer Channel Channel Channel Channel Channel Dual Channel (V/µs) (V) Ratio (%) Package Package* Package Package* Package Packages*, 7 N5 HCPL-5 HCPL-5 HCPL-5 HCNW5 9 N HCPL-5 HCPL-5 HCPL-5 HCNW HCPL-45 HCPL-45 HCNW45 5 HCPL-5 5, 5 9 HCPL-45 HCPL-454 HCPL-45 HCPL-54 HCNW45, 9 HCPL-55XX HCPL-5XX 4N55 V CC V O 5 GND *Technical data for these products are on separate Agilent publications. Pin 7, transistor base, is not connected. Ordering Information Specify Part Number followed by Option Number (if desired). Example: HCPL-45#XXXX = UL 5 V rms/ Minute Option* = IEC/EN/DIN EN V IORM = V peak Option** = Gull Wing Surface Mount Option 5 = Tape and Reel Packaging Option XXXE = Lead Free Option Option data sheets available. Contact your Agilent sales representative or authorized distributor for information. *For N5/ and HCPL-45/ only. **For HCPL-45 only. Combination of Option and Option is not available. Gull wing surface mount option applies to through hole parts only. Remarks: The notation # is used for existing products, while (new) products launched since 5th July and lead free option will use -

3 UR Package Outline Drawings -Pin DIP Package (N5/, HCPL-45/, HCPL-5) 9.5 ±.5 (. ±.) 7. ±.5 (. ±.) TYPE NUMBER 7 A XXXXZ 5 OPTION CODE* DATE CODE.5 ±.5 (.5 ±.) YYWW 4 UL RECOGNITION.9 (.47) MAX..5 ±. (.4 ±.5).7 (.7) MAX. 4.7 (.5) MAX. 5 TYP (. +.) -.).9 (.5) MIN..5 (.) MIN.. ±. (.4 ±.).5 (.5) MAX..54 ±.5 (. ±.) DIMENSIONS IN MILLIMETERS AND (INCHES). *MARKING CODE LETTER FOR OPTION NUMBERS "L" = OPTION "V" = OPTION OPTION NUMBERS AND 5 NOT MARKED. NOTE: FLOATING LEAD PROTRUSION IS.5 mm ( mils) MAX. -Pin DIP Package with Gull Wing Surface Mount Option (N5/, HCPL-45/) LAND PATTERN RECOMMENDATION 9.5 ±.5 (. ±.). (.4) ±.5 (.5 ±.).9 (.4) 4.7 (.5). (.).9 (.47) MAX..7 (.7) MAX..5 ±. (.4 ±.5) 9.5 ±.5 (. ±.) 7. ±.5 (. ±.) (. +.) -.). ±. (.4 ±.).54.5 ±. (.) (.5 ±.5) BSC DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY =. mm (.4 INCHES)..5 ±.5 (.5 ±.) NOM. NOTE: FLOATING LEAD PROTRUSION IS.5 mm ( mils) MAX.

4 4 Small Outline SO- Package (HCPL-5/, HCPL-45/) LAND PATTERN RECOMMENDATION.97 ±.7 (.55 ±.5) PIN ONE 7 5 XXX YWW.4 ±.7 (. ±.).7 (.5) BSC ±. (. ±.) TYPE NUMBER (LAST DIGITS) DATE CODE.4 (.5).9 (.75) 7.49 (.95) * 5. ±.7 (. ±.5) 7 45 X.4 (.7).75 ±.7 (.5 ±.5).54 (.) ~ 7. ±.5 (.9 ±.) * TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH) 5.7 ±.54 (.5 ±.) DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY =. mm (.4 INCHES) MAX..5 (.) MIN.. ±. (. ±.4) -Pin Widebody DIP Package (HCNW5/, HCNW45/).5 ±.5 (.44 ±.) 7 A HCNWXXXX YYWW 5 TYPE NUMBER DATE CODE. MAX. (.4) 9. ±.5 (.54 ±.) 4.55 (.) MAX. 7 TYP. 5. (.) MAX.. (.4) TYP (. +.) -.). (.).9 (.54).5 (.) MIN..54 (.) TYP..7 ±.5 (.7 ±.).4 (.).5 (.) DIMENSIONS IN MILLIMETERS (INCHES). NOTE: FLOATING LEAD PROTRUSION IS.5 mm ( mils) MAX.

5 5 -Pin Widebody DIP Package with Gull Wing Surface Mount Option (HCNW5/, HCNW45/).5 ±.5 (.44 ±.) LAND PATTERN RECOMMENDATION ±.5 (.54 ±.).5 (.54) 4. (.5).9 (.9).55 (.) MAX.. ±. (.44 ±.). MAX. (.4) 4. (.5) MAX..7 ±.5 (.7 ±.).54 (.) BSC DIMENSIONS IN MILLIMETERS (INCHES)..75 ±.5 (. ±.) LEAD COPLANARITY =. mm (.4 INCHES).. ±.5 (.9 ±.) 7 NOM (. +.) -.) NOTE: FLOATING LEAD PROTRUSION IS.5 mm ( mils) MAX. Solder Reflow Temperature Profile TEMPERATURE ( C) PREHEATING RATE C + C/.5 C/SEC. REFLOW HEATING RATE.5 C ±.5 C/SEC. C 5 C 4 C C + C/.5 C.5 C ±.5 C/SEC. PREHEATING TIME 5 C, 9 + SEC. PEAK TEMP. 45 C SEC. SEC. 5 SEC. PEAK TEMP. 4 C SOLDERING TIME C PEAK TEMP. C ROOM TEMPERATURE TIME (SECONDS) TIGHT TYPICAL LOOSE

6 Recommended Pb-Free IR Profile TEMPERATURE T p +/-5 C T L 7 C RAMP-UP C/SEC. MAX. T smax 5 - C T smin t s PREHEAT to SEC. t p t L TIME WITHIN 5 C of ACTUAL PEAK TEMPERATURE -4 SEC. RAMP-DOWN C/SEC. MAX. to 5 SEC. 5 t 5 C to PEAK TIME NOTES: THE TIME FROM 5 C to PEAK TEMPERATURE = MINUTES MAX. T smax = C, T smin = 5 C Regulatory Information The devices contained in this data sheet have been approved by the following organizations: UL Recognized under UL 577, Component Recognition Program, File E55. CSA Approved under CSA Component Acceptance Notice #5, File CA 4. IEC/EN/DIN EN Approved under IEC :997 + A: EN : + A: DIN EN (VDE 4 Teil ):- (HCNW and Option only) Insulation and Safety Related Specifications -Pin DIP Widebody ( Mil) SO- (4 Mil) Parameter Symbol Value Value Value Units Conditions Minimum External L() mm Measured from input terminals Air Gap (External to output terminals, shortest Clearance) distance through air. Minimum External L() mm Measured from input terminals Tracking (External to output terminals, shortest Creepage) distance path along body. Minimum Internal... mm Through insulation distance, Plastic Gap conductor to conductor, usually (Internal Clearance) the direct distance between the photoemitter and photodetector inside the optocoupler cavity. Minimum Internal NA NA 4. mm Measured from input terminals Tracking (Internal to output terminals, along Creepage) internal cavity. Tracking Resistance CTI Volts DIN IEC /VDE Part (Comparative Tracking Index) Isolation Group IIIa IIIa IIIa Material Group (DIN VDE, /9, Table ) Option - surface mount classification is Class A in accordance with CECC.

7 7 IEC/EN/DIN EN Insulation Related Characteristics (HCPL-45 OPTION ONLY) Description Symbol Characteristic Units Installation classification per DIN VDE /.9, Table for rated mains voltage V rms I-IV for rated mains voltage 45 V rms I-III Climatic Classification 55// Pollution Degree (DIN VDE /.9) Maximum Working Insulation Voltage V IORM V peak Input to Output Test Voltage, Method b* V IORM x.75 = V PR, % Production Test with t m = sec, V PR V peak Partial Discharge < 5 pc Input to Output Test Voltage, Method a* V IORM x.5 = V PR, Type and sample test, V PR 945 V peak t m = sec, Partial Discharge < 5 pc Highest Allowable Overvoltage* (Transient Overvoltage, t ini = sec) V IOTM V peak Safety Limiting Values (Maximum values allowed in the event of a failure, also see Figure 9, Thermal Derating curve.) Case Temperature T S 75 C Input Current I S,INPUT ma Output Power P S,OUTPUT mw Insulation Resistance at T S, V IO = 5 V R S 9 Ω IEC/EN/DIN EN Insulation Related Characteristics (HCNW5/, HCNW45/ ONLY) Description Symbol Characteristic Units Installation classification per DIN VDE /.9, Table for rated mains voltage V rms I-IV for rated mains voltage V rms I-III Climatic Classification 55/5/ Pollution Degree (DIN VDE /.9) Maximum Working Insulation Voltage V IORM 44 V peak Input to Output Test Voltage, Method b* V IORM x.75 = V PR, % Production Test with t m = sec, V PR 5 V peak Partial Discharge < 5 pc Input to Output Test Voltage, Method a* V IORM x.5 = V PR, Type and sample test, V PR V peak t m = sec, Partial Discharge < 5 pc Highest Allowable Overvoltage* (Transient Overvoltage, t ini = sec) V IOTM V peak Safety Limiting Values (Maximum values allowed in the event of a failure, also see Figure 9, Thermal Derating curve.) Case Temperature T S 5 C Input Current I S,INPUT 4 ma Output Power P S,OUTPUT 7 mw Insulation Resistance at T S, V IO = 5 V R S 9 Ω *Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section IEC/EN/DIN EN , for a detailed description. Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in application.

8 Absolute Maximum Ratings Parameter Symbol Device Min. Max. Units Note Storage Temperature* T S C Operating Temperature* T A -Pin DIP -55 C SO- Widebody Average Forward Input Current* I F(AVG) 5 ma Peak Forward Input Current* I F(PEAK) -Pin DIP (5% duty cycle, ms pulse width) SO- 5 ma (5% duty cycle, ms pulse width) Widebody 4 Peak Transient Input Current* I F(TRANS) -Pin DIP A ( µs pulse width, pps) SO- Widebody. Reverse LED Input Voltage* (Pin -) V R -Pin DIP 5 V SO- Widebody Input Power Dissipation* P IN -Pin DIP 45 mw SO- Widebody 4 Average Output Current* (Pin ) I O(AVG) ma Peak Output Current* I O(PEAK) ma Emitter-Base Reverse Voltage* V EBR 5 V (Pin 5-7, except 45/, 45/) Supply Voltage (Pin -5) V CC -.5 V Output Voltage (Pin -5) V O -.5 V Supply Voltage* (Pin -5) V CC V Output Voltage* (Pin -5) V O V Base Current* (Pin 7, except 45/, 45/) I B 5 ma Output Power Dissipation* P O mw 4 Lead Solder Temperature* (Through-Hole Parts Only). mm below seating plane, seconds T LS -Pin DIP C up to seating plane, seconds Widebody C Reflow Temperature Profile T RP SO- and Option *Data has been registered with JEDEC for the N5/N. See Package Outline Drawings section

9 9 Electrical Specifications (DC) Over recommended temperature (T A = C to 7 C) unless otherwise specified. See note. Parameter Symbol Device Min. Typ.** Max. Units Test Conditions Fig. Note Current CTR* N5 7 5 % T A = 5 C V O =.4 V I F = ma,,, 5, Transfer Ratio HCPL-5 V CC = 4.5 V 4 HCNW5 5 9 V O =.5 V HCPL-5 5 T A = 5 C V O =.4 V 5 5 V O =.5 V N T A = 5 C V O =.4 V HCPL-45/ HCPL V O =.5 V HCPL-45/ HCNW HCNW45/ Logic Low V OL N5..4 V T A = 5 C I O =. ma I F = ma, Output Voltage HCPL-5 V CC = 4.5 V HCNW5..5 I O =. ma N..4 T A = 5 C I O =. ma HCPL-5 HCPL-45/..5 I O =.4 ma HCPL-5 HCPL-45/ HCNW HCNW45/ Logic High I OH *..5 µa T A = 5 C V O = V CC = 5.5 V I F = ma 7 Output Current. T A = 5 C V O = V CC = 5 V 5 V O = V CC = 5 V Logic Low I CCL 5 µa I F = ma, V O = Open, V CC = 5 V Supply Current Logic High I CCH *. µa T A = 5 C I F = ma, V O = Open, Supply Current V CC = 5 V Input Forward V F * -Pin DIP.5.7 V T A = 5 C I F = ma Voltage SO-. Widebody T A = 5 C I F = ma.5.95 Input Reverse BV R * -Pin DIP 5 V I R = µa Breakdown SO- Voltage Widebody I R = µa Temperature V F / -Pin DIP -. mv/ C I F = ma Coefficient of T A SO- Forward Voltage Widebody -.9 Input C IN -Pin DIP pf f = MHz, V F = V Capacitance SO- Widebody 9 Transistor DC h FE -Pin DIP 5 V O = 5 V, I O = ma Current Gain SO- V O =.4 V, I B = µa Widebody V O = 5 V, I O = ma V O =.4 V, I B = µa *For JEDEC registered parts. **All typicals at T A = 5 C.

10 Switching Specifications (AC) Over recommended temperature (T A = C to 7 C), V CC = 5 V, I F = ma unless otherwise specified. Parameter Sym. Device Min. Typ.** Max. Units Test Conditions Fig. Note Propagation t PHL * N5..5 µs T A = 5 C R L = 4. kω 5,,, 9 Delay Time HCPL-5. to Logic Low at Output HCNW5 N.. T A = 5 C R L =.9 kω HCPL-5 HCPL-45/ HCPL-5 HCPL-45/. HCNW HCNW45/ Propagation t PLH * N5..5 µs T A = 5 C R L = 4. kω 5,,, 9 Delay Time to HCPL-5. Logic High at Output HCNW5 N.. T A = 5 C R L =.9 kω HCPL-5 HCPL-45/ HCPL-5 HCPL-45/. HCNW HCNW45/ Common Mode CM H N5 kv/µs R L = 4. kω I F = ma, T A = 5 C, 7,, Transient HCPL-5 V CM = V p-p 9 Immunity at HCNW5 C L = 5 pf Logic High N R L =.9 kω Level Output HCPL-5 HCPL-45 HCPL-5 HCPL-45 HCNW45 HCPL-45 5 R L =.9 kω I F = ma, T A = 5 C, HCPL-45 V CM = 5 V p-p, HCNW45 C L = 5 pf Common Mode CM L N5 kv/µs R L = 4. kω I F = ma, T A = 5 C, 7,, Transient HCPL-5 V CM = V p-p 9 Immunity at HCNW5 C L = 5 pf Logic Low N R L =.9 kω Level Output HCPL-5 HCPL-45 HCPL-5 HCPL-45 HCNW45 HCPL-45 5 R L =.9 kω I F = ma, T A = 5 C, HCPL-45 V CM = 5 V p-p, HCNW45 C L = 5 pf Bandwidth BW N5/ 9 MHz See Test Circuit, HCPL-5 HCPL-5/ HCNW5/ *For JEDEC registered parts. **All typicals at T A = 5 C.

11 Package Characteristics Over recommended temperature (T A = C to 7 C) unless otherwise specified. Parameter Sym. Device Min. Typ.* Max. Units Test Conditions Fig. Note Input-Output V ISO -Pin DIP 75 V rms RH < 5%,, 4 Momentary SO- t = min., Withstand Widebody 5 T A = 5 C, 5 Voltage** -Pin DIP 5,, (Option ) 5 I I-O -Pin DIP µa 45% RH, t = 5 s,, V I-O = kvdc, T A = 5 C Input-Output R I-O -Pin DIP Ω V I-O = 5 Vdc Resistance SO- Widebody T A = 5 C T A = C Input-Output C I-O -Pin DIP. pf f = MHz Capacitance SO- Widebody.5. *All typicals at T A = 5 C. **The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN Insulation Related Characteristics Table (if applicable), your equipment level safety specification or Agilent Application Note 74 entitled Optocoupler Input-Output Endurance Voltage, publication number 59-E. Notes:. Derate linearly above 7 C free-air temperature at a rate of. ma/ C (-Pin DIP). Derate linearly above 5 C free-air temperature at a rate of.5 ma/ C (SO-).. Derate linearly above 7 C free-air temperature at a rate of. ma/ C (-Pin DIP). Derate linearly above 5 C free-air temperature at a rate of. ma/ C (SO-).. Derate linearly above 7 C free-air temperature at a rate of.9 mw/ C (-Pin DIP). Derate linearly above 5 C free-air temperature at a rate of. mw/ C (SO-). 4. Derate linearly above 7 C free-air temperature at a rate of. mw/ C (-Pin DIP). Derate linearly above 5 C free-air temperature at a rate of. mw/ C (SO-). 5. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, I O, to the forward LED input current, I F, times.. Device considered a two-terminal device: Pins,,, and 4 shorted together and Pins 5,, 7, and shorted together. 7. Common mode transient immunity in a Logic High level is the maximum tolerable (positive) dv CM /dt on the leading edge of the common mode pulse signal, V CM, to assure that the output will remain in a Logic High state (i.e., V O >. V). Common mode transient immunity in a Logic Low level is the maximum tolerable (negative) dv CM /dt on the trailing edge of the common mode pulse signal, V CM, to assure that the output will remain in a Logic Low state (i.e., V O <. V).. The.9 kω load represents TTL unit load of. ma and the 5. kω pull-up resistor. 9. The 4. kω load represents LSTTL unit load of. ma and. kω pull-up resistor.. The frequency at which the ac output voltage is db below its mid-frequency value.. The JEDEC registration for the N specifies a minimum CTR of 5%. Agilent guarantees a minimum CTR of 9%.. See Option data sheet for more information.. Use of a. µf bypass capacitor connected between pins 5 and is recommended. 4. In accordance with UL 577, each optocoupler is proof tested by applying an insulation test voltage 45 V rms for second (leakage detection current limit, I I-O 5 µa). This test is performed before the % Production test shown in the IEC/EN/DIN EN Insulation Related Characteristics Table if applicable. 5. In accordance with UL 577, each optocoupler is proof tested by applying an insulation test voltage V rms for second (leakage detection current limit, I I-O 5 µa). This test is performed before the % Production test shown in the IEC/EN/DIN EN Insulation Related Characteristics Table if applicable.. This rating is equally validated by an equivalent ac proof test.

12 I O OUTPUT CURRENT ma 5 T A = 5 C V CC = 5. V PIN DIP, SO- 4 ma 5 ma ma 5 ma ma 5 ma ma I F = 5 ma I O OUTPUT CURRENT ma 4 T A = 5 C V CC = 5. V WIDEBODY 4 ma 5 ma ma 5 ma ma 5 ma ma I = 5 ma F V O OUTPUT VOLTAGE V V O OUTPUT VOLTAGE V Figure. DC and Pulsed Transfer Characteristics. NORMALIZED CURRENT TRANSFER RATIO.5. PIN DIP, SO- N5, HCPL-5 N, HCPL-45/, HCPL-5 HCPL-5/45/45.5 NORMALIZED I F = ma V O =.4 V V CC = 5 V T A = 5 C. NORMALIZED CURRENT TRANSFER RATIO.5. WIDEBODY HCNW5/, HCNW45/.5 NORMALIZED I F = ma V O =.4 V V CC = 4.5 V T A = 5 C I F INPUT CURRENT ma I F INPUT CURRENT ma Figure. Current Transfer Ratio vs. Input Current. I F FORWARD CURRENT ma... + V F I F PIN DIP, SO T = 5 C A.5. I F FORWARD CURRENT ma... T = 5 C A WIDEBODY I F + V F.7. V F FORWARD VOLTAGE VOLTS V F FORWARD VOLTAGE VOLTS Figure. Input Current vs. Forward Voltage.

13 NORMALIZED CURRENT TRANSFER RATIO...9. NORMALIZED I F = ma V O =.4 V V CC = 5 V T A = 5 C PIN DIP, SO- N5, HCPL-5.7 N, HCPL-45/, HCPL-5 HCPL-5, 45, NORMALIZED CURRENT TRANSFER RATIO WIDEBODY HCNW5/, HCNW45/. NORMALIZED I F = ma V O =.4 V.5 V CC = 5 V T A = 5 C T A TEMPERATURE C T A TEMPERATURE C Figure 4. Current Transfer Ratio vs. Temperature. t p PROPAGATION DELAY ns 5 5 PIN DIP, SO- I F = ma, V CC = 5. V N5, HCPL-5 (R L = 4. kω) N, HCPL-5, HCPL-5 HCPL-45/ (R L =.9 kω) HCPL-45/ t PLH t PHL t p PROPAGATION DELAY ns 4 I F = ma, V CC = 5. V HCNW5 (R L = 4. kω) HCNW (R L =.9 kω) HCNW45/ t PLH WIDEBODY t PHL T A TEMPERATURE C T A TEMPERATURE C Figure 5. Propagation Delay vs. Temperature. t P PROPAGATION DELAY µs PIN DIP, SO-. I F = ma I F = ma. V CC = 5. V T A = 5 C.. t PLH..4 t PHL R L LOAD RESISTANCE (kω) t P PROPAGATION DELAY µs WIDEBODY. I F = ma. I t = ma 4. V CC = 5. V T A = 5 C tplh.. tphl R L LOAD RESISTANCE (kω) Figure. Propagation Delay Time vs. Load Resistance.

14 4 I OH LOGIC HIGH OUTPUT CURRENT na PIN DIP, SO- +4 I F = + V O= V CC = 5. V I OH LOGIC HIGH OUTPUT CURRENT na WIDEBODY + I F = V + O = V CC = 5 V T A TEMPERATURE C T A TEMPERATURE C Figure 7. Logic High Output Current vs. Temperature. IO I SMALL SIGNAL CURRENT TRANSFER RATIO F... PIN DIP, SO- T A = 5 C, R L = Ω, V CC = 5 V 4 5 I F QUIESCENT INPUT CURRENT ma IO SMALL SIGNAL CURRENT TRANSFER RATIO IF WIDEBODY T A = 5 C, R L = Ω, V CC = 5 V 4 5 I F QUIESCENT INPUT CURRENT ma Figure. Small-Signal Current Transfer Ratio vs. Quiescent Input Current. OUTPUT POWER P S, INPUT CURRENT I S HCPL-45 OPTION P S (mw) I S (ma) T S CASE TEMPERATURE C OUTPUT POWER P S, INPUT CURRENT I S HCNW5/, HCNW45/ P S (mw) I S (ma) T S CASE TEMPERATURE C 75 Figure 9. Thermal Derating Curve, Dependence of Safety Limiting Value with Case Temperature per IEC/EN/DIN EN

15 5 NORMALIZED RESPONSE - db N5/, HCPL-5/, HCPL-5 T A = 5 C -.. f - FREQUENCY - MHz + V. µf 47 µf V FF 5 Ω. KΩ Ω KΩ N45 Q R T Ω N5/, HCPL-5/, HCPL TRIM FOR UNITY GAIN 7. µf. KΩ 5 KΩ 9. KΩ Q, Q, Q : N94 Ω Q TYPICAL LINEARITY = ± % AT V IN = V p-p TYPICAL SNR = 5dB TYPICAL R T = 75 Ω TYPICAL V O dc =. V TYPICAL I F = 9 ma Q 47 Ω. µf + V V O ( MΩ pf TEST INPUT) HCNW5/ HCNW5/ Figure. Frequency Response.

16 I F V O.5 V 5 V.5 V V OL PULSE GEN. Z O = 5 Ω t r = 5 ns % DUTY CYCLE /f < µs I F MONITOR I F *.µf R L +5 V V O C L =.5 µf t PHL t PLH R M * PIN 7 UNCONNECTED IN HCPL-45/, HCPL-45/, HCNW45/ Figure. Switching Test Circuit. IF +5 V B V CM % 9% 9% % V t r t f A 7 *. µf R L V O VO SWITCH AT A: I = ma F 5 V VFF 4 5 V O SWITCH AT B: I = ma F V OL V CM + PULSE GEN. *PIN 7 UNCONNECTED IN HCPL-45/, HCPL-54/, HCNW45/ Figure. Test Circuit for Transient Immunity and Typical Waveforms. For product information and a complete list of distributors, please go to our web site. For technical assistance call: Americas/Canada: + () 5- or (9) 7-7 Europe: +49 () China: 5 7 Hong Kong: (+5) India, Australia, New Zealand: (+5) Japan: (+ ) 5-5 (Domestic/International), or -- (Domestic Only) Korea: (+5) Singapore, Malaysia, Vietnam, Thailand, Philippines, Indonesia: (+5) Taiwan: (+5) Data subject to change. Copyright 4 Agilent Technologies, Inc. Obsoletes 599-5EN December, EN

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