Multilayer control for inverters in parallel operation without signal interconnection

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1 Downoaded rom vbn.aau.dk on: marts 21, 219 Aaborg niversitet Mutiayer contro or inverters in rae operation without signa interconnection Hua, Ming ; Hu, Haibing ; Xing, Yan ; Guerrero, Josep M. Pubished in: Proceedings o the 37th Annua Conerence o IEEE Industria Eectronics Society, IECO 211 DOI (ink to pubication rom Pubisher: 1.119/IECO Pubication date: 211 Document Version Eary version, aso known as pre-print ink to pubication rom Aaborg niversity Citation or pubished version (APA: Hua, M., Hu, H., Xing, Y., & Guerrero, J. M. (211. Mutiayer contro or inverters in rae operation without signa interconnection. In Proceedings o the 37th Annua Conerence o IEEE Industria Eectronics Society, IECO 211 (pp IEEE Press. Genera rights Copyright and mora rights or the pubications made accessibe in the pubic porta are retained by the authors and/or other copyright owners and it is a condition o accessing pubications that users recognise and abide by the ega requirements associated with these rights.? sers may downoad and print one copy o any pubication rom the pubic porta or the purpose o private study or research.? You may not urther distribute the materia or use it or any proit-making activity or commercia gain? You may reey distribute the R identiying the pubication in the pubic porta? Take down poicy I you beieve that this document breaches copyright pease contact us at vbn@aub.aau.dk providing detais, and we wi remove access to the work immediatey and investigate your caim.

2 Mutiayer Contro or Inverters in Parae Operation without Interconnection Ming Hua 1, Haibing Hu 1, Yan Xing 1, Josep M. Guerrero 2 1. Jiangsu Key aboratory o ew Energy Generation and Power Conversion, anjing niversity o Aeronautics and Astronautics, anjing 2116, P.R. China. E-mai: huaming@nuaa.edu.cn 2. Dept. Energy Technoogy, Aaborg niversity, DK-922, Aaborg, Denmark E-mai: joz@et.aau.dk Abstract- A mutiayer contro is proposed or inverters with wireess rae operation in this per. It consists o three ayers. The irst ayer is based on an improved droop method, which shares the active and reactive power in each modue by adjusting the phase and ampitude o the output votage respectivey. The second ayer is to compensate the droop votage caused by the droop contro and thus improve the oad reguation perormance o the inverter. The third ayer imits the phase deviation between the inverter and the shared ac bus in order to ensure a the raeed inverters keeping in phase. The operationa principe and impementation are anayzed in detais. A prototype, conigured by two raeed inverters, is set up. Experimenta resuts veriy the vaidity o the proposed contro. I. ITRODCTIO 1 More and more DC and AC power suppy systems requiring arge cacity, high reiabiity, and standard structure are reaized by mutipe power modues operating in rae. Many methods or the rae inverter system have been proposed. In genera, these contro methods may be categorized as centraized contro, distributed contro and wireess contro [1]-[2]. Wireess contro has been caught great attention due to its simpicity in hardware impementation [3]-[13]. The main idea o wireess contro is based on droop method, which reaizes the rae operation by reguating the requency and ampitude reerences according to the inverter output active and reactive power [14]. However, conventiona wireess contro has an unstabe issue as it may introduce a positive eedback. For exampe, suppose the output active power rom one inverter is arger than that rom other inverter whie the phase in the irst inverter is agging that in the second ones, under this condition, the system woud end in instabiity i the conventiona contro is appied. To avoid the possibe positive eedback, reerence [15] proposed a decouping contro, which decoupes both the requency votage droops with their votage and requency by taking into consideration the ine impedance and oad. But the decouping contro is compex because it depends on the rameters o ines and oads. The poor transient response and poor hot-swap perormance are aso the imitations o conventiona droop method. What is 1 This work was rty supported by the Speciaized Research Fund or the Doctora Program o Higher Education (o and rty by Foundation o State Key ab o Power System (o. SKD9KM9. more, the main disadvantage is oad-dependent externa characteristics which causes poor oad reguation and is hard to meet the standards [16]. Hierarchica contro appied to power distching in AC power systems is we known and it has been used extensivey or decades [17]. CTE (nion or the Co-ordination o Transmission o Eectricity, Continenta Europe has deined a hierarchica contro or arge power system, which is supposed to operate over arge synchronous machines with high inertias and inductive networks [18]. With hep o a hierarchica contro, the ampitude and requency deviations rom the nomina vaues are imited and thus the power quaity, system saety and stabiity are improved. In this per, reerring to the hierarchica contro, the mutiayer contro or wireess contro is proposed and the coordinated contro or a the contro eves is studied. The dynamic characteristics, stabiity and reiabiity o the rae system are enhanced, and the oad reguation and externa characteristics are improved as we. II. PRICIPE OF MTIAYER COTRO Three-phase three-eg inverter is used or this study. The dua cosed-oop PI contro and sce vector moduation are empoyed to reaize stabe output votage or each modue, whie mutiayer contro is used or rae operation. The principe o mutiayer contro is described as oows: (1 The irst ayer is an improved PQ droop method. By the oca active and reactive power o the inverter (P and Q, the droop vaues or given requency r, phase ange and ampitude, P, θ P and u, are obtained. With these ine adjustments o the requency, initia phase ange and ampitude o votage reerence, the rae operation can be reaized. (2 In order to compensate or the requency and ampitude deviations caused by the contro in the irst ayer, a second ayer is proposed. Reerencing the requency reguation or arge power system and RMS contro oop or PS, the ampitude and requency o common ac bus are sensed and comred with the ac bus ampitude and requency reerence, busr and busr, respectivey. The inverters votage reerence is compensated by error reguator. (3 To eectivey suppress the inrush currents among inverters during the raeing pugging-in operation and thus enhance the reiabiity, the third ayer contro, direct 1

3 synchronization contro, is empoyed. The phase ange θ ac o common ac bus votage is sensed and used as the reerence o this ayer contro. Beore connecting the common ac bus, the phase ange o the inverter, θ, is reguated to be cosed to θ ac in order to suppress the inrush current at hot pug-in. In steady state, θ is measured in rea time. The direct synchronization contro is empoyed, in which θ is reguated rapidy and directy to oow θ ac when the error between θ and θ ac exceeds the imitation (or exampe 5. When the error between θ and θ ac within the range (or exampe 3, the synchronization is reguated by the irst ayer contro and the direct synchronization contro is disabed. A. First ayer contro The principe o conventiona droop method can be expressed as: rm r P r kp remr rem u rem kq * Q (1 dre remr qre where rem, proportiona to r in / mode, is the ampitude o the reerence signa. rm and remr are requency and ampitude o new reerence signa reguated by droop method. k P and k Q are the positive proportiona coeicients o activepower-requency and reactive-power-ampitude droops. dre and qre are votages in the d and q axis reerences rame. In order to improve the transient behavior, the improved droop method is proposed, which can be expressed as: rm r kp remr rem kq * Q P kp (2 dre remr cos( P qre remr sin( P where k Pθ is the positive proportiona coeicient o activepower-phase droop. Taking two inverters in rae operation as exampe, the phase ange o each inverter can be obtained as oows rom (2. Inverter1: 1 2 ( r P1 dt P1 (3 Inverter2: 2 2 ( r P2 dt P2 (4 Subtracting (4 rom (3, the phase ange dierence can be obtained: 2 ( dt ( 1 2 P1 P2 P1 P2 2 k [ ( P P ] dt k [ ( P P ] P 1 2 P 1 2 From (5, it is cear that the phase error, θ 1 -θ 2, can be controed by active power error (P 1 -P 2. I deining k Pθ =, equation (2 is simpiied to conventiona droop method. The requency o the inverter is reguated by active power, and the phase error, θ 1 -θ 2, is controed using active power error (P 1 -P 2 with I controer. Thereore during (5 steady state the active power o two inverters is equa (P 1 =P 2 and the two inverters are kept in phase with each other (θ 1 =θ 2. This contro method has no steady error. I deining k P =, the phase ange o the inverter is reguated by active power to reaize the synchronization contro. And the phase error, θ 1 -θ 2, is controed using active power error (P 1 -P 2 with P controer, which has steady error. Even though the active powers o two inverters are not equa (P 1 P 2, the raeed system can sti maintain stabe. Comred to the I controer, the P controer has aster transient response. As indicated in expression (2, the perormance o power sharing reguation both in steady state and dynamic state is improved. B. Second ayer contro Current sharing inductors,, are connected between the inverters and common ac bus. Because is not incuded in contro oops, it induces the dierences between the votages o common ac bus and that o the inverters. The second ayer contro is introduced to improve the oad reguation. The requency and ampitude o the common ac bus are sensed and comred with the reerences and the errors are used to reguate the reerences o the inverters to correct the output votage requency and ampitude. The second ayer contro is shown in Fig. 1. rm and remr are the requency and ampitude reerences o the inverter. rm + c and remr + mc are the reguated requency and ampitude reerences o the inverter by the secondary contro. c and mc are the compensation vaues o requency and ampitude respectivey. As shown in Fig. 1, the requency and ampitude deviate rom the rated vaues when the active and reactive power increases. The contro agorithm can be obtained as oows: rm r kp G *( busr buss c remr rem kq * Q Gu *( busr buss mc P kp dre remr cos( P qre remr sin( P where busr and busr are the requency and ampitude reerences (rated vaues o common ac bus, and buss and buss are the sensed requency and ampitude o common ac bus. G and G u are the requency and ampitude compensators. r rm rm c remr } } c P rem remr without contro with contro Fig. 1 Compensation principe o the secondary contro mc mc Q (6 2

4 C. Third ayer contro According to expression (1, ony under the conditions where the dierences o the ampitude and requency are sma, the approximation o the reguation among the active power, requency, reactive power and ampitude are reasonabe. On the other hand, during dynamic response such as hot swap, the circuating current coud be high because o the sow power cacuation using the conventiona droop method. As a resut, the phase and ampitude o the inverters shoud be controed to be cose to each other beore raeing. And the errors between each modue shoud be reguated and imited within a sma range during dynamic response. Simutaneousy, the potentia positive eedback o conventiona droop contro woud cause out-o-phase, resuting in system unstabe. With the third ayer contro, which can be caed direct synchronization contro, the phase anges o each inverter, θ, are reguated to be cose to the phase ange o common ac bus (θ ac so that the inrush current can be suppressed during hot pug-in. And the errors between θ and θ ac, Δθ s, can be controed within a setting range when the inverters operate in steady state in order to avoid osing synchronism. Δθ s can be expressed as oowing: (7 s A positive Δθ s means the phase ange o the inverter agging the common ac bus and a negative Δθ s means eading. In steady state, Δθ s is judged and the oowing expression is achieved: 1 s SC _ u SC _ S 1 or SC _ s SC _ u (8 s SC _ where SC_θ u and SC_θ are the upper and ower imits o the errors Δθ s, respectivey. SC_S is the ag o starting the third ayer contro using hysteresis ogic, where 1 ( means starting (stopping the third ayer and 1or means intermediate state. 1or represents that SC_S remains the same vaue as previous. For exampe, i SC_S is equa to 1 in ast period, it remains 1 in present period. The ogic diagram is shown in Fig. 2. With mutiayer contro, the phase ange θ m o the inverter in one initia given requency (1/ r can be expressed by: m 1/ r 1/ r 2 * dt m ac 2 ( * * r c kp P dt (9 k SC _ S * k * P sc s where k sc is the positive proportiona coeicient o error reguation, m is the output requency o the inverter with mutiayer contro. From (9, the requency reguated by mutiayer contro can be obtained as III. k SC_S m r c P 1 kp SC _ S * ksc * (1 s * r 2 SC _ SC _ u s Fig. 2 ogic diagram o the third contro COORDIATED COTRO OF A EVES In a practica system, the ampitude error o reerences between each modue is sma, which argey depends on the rameter variations o devices. But the phase error is random and woud be arge without proper reguation. Since the contro o the phase is dominant in a three contro ayers, the synchronization contro o phase ange is the major purpose o coordinated contro o a the eves. In the irst ayer contro, the phase is reguated sighty and the reguation speed is sow so that the requency uctuation is sma, which coud ensure that the rae system operates smoothy. In third ayer contro, the phase is reguated directy and heaviy so that the reguation speed is high, which resuts in high requency uctuations. The second ayer contro is o the outer contro oop and the time-constant is arge so that the reguation speed is sow. The good steady state perormance o the second ayer contro is desired, whie the dynamic perormance is not so important in this ayer. From above anaysis, the irst ayer contro can coexist with the second ayer and they compement each other. And the activation o the third ayer contro depends on Δθ s. As a resut, the coordinated contro reies on vaues o SC_θ u and SC_θ and two aspects shoud be taken into consideration: (1 The third ayer contro shoud not start when the inverter operates independenty, (2 The third ayer contro shoud start in terms o the phase dierence when inverters operate in rae with M oads (M. The PI controer in dq rotation rame is appied to contro the inverter. In this manner, the mode o the inverter can be viewed as a DC system and equivaent output impedance is. So, theoreticay there is no dierence in phase between output votage and the reerences o the inverter. However, the current sharing inductors are connected between the inverter and common ac bus, which causes the phase shit Δθ between the inverter s output votage and common ac bus votage. Assuming the baanced three-phase oads, the equivaent circuit o inverter modues in rae with M oads is shown in Fig. 3. ann θ n is the phase-a output votage o inverter n. r +s is the sum o output impedance and ines impedance and inductive impedance o current sharing inductors. Z is the oad impedance. ao is the phase-a votage o the common ac bus. 3

5 ... inverter 1 ao inverter 2 an1 1 ann r n r... M Z=R +jx r an2 2 inverter n Fig. 3 The equivaent circuit o inverter modues in rae with M oads (1 The inverter operating individuay From Fig. 3, assuming r =, Δθ can be expressed as: R arctan ( R * X X When operating individuay, the third ayer contro is disabed. So, SC _ max( (12 i a And the requirement shoud be satisied simutaneousy: SC _ SC _ (13 u (2 inverter modues in rae with M oads (M nder this condition, Δθ can be expressed as (detaied proo is given in appendix I: M R arctan ( M R X * X The third ayer contro is inactive when the rae system operates in steady state. So, SC _ SC _ max( (15 u With coordinated contro, each eve can compement the other we and the stabiity and reiabiity o the rae system are enhanced. According to the anaysis above, the contro diagram o the inverter with mutiayer contro is shown in Fig. 4. u an current sharing reactor common ac bus u ao A + DC - i b i c u bn u cn u bo u co B C inverter drive circuit current detect C C C votage detect unit 3 ac bus phase capture u acs sampe and reguate u ac ampitude detect requency detected buss busr G r ramp unction genetator / mode generate buss busr unit 2 Gu P rem + remr cos( dqre P + dre remr mc + - sin( P - dq qre remr u dq reerences generate ampitude droop c + rm + - P unit 1 phase cacuate ac synchronization contro unit 1 votage reguator DSP requency droop phase ange droop i dqre + - i dq current reguator m m PWM generate SVPWM Q P power cacuate i 3/2 transorm u ph Fig. 4 The contro diagram In Fig. 4, unit 1, unit 2 and unit 3 are the irst ayer, second ayer and third ayer respectivey. nit 1 contains two rts which reguate the reerences with active power P and reactive power Q o the inverter according to (2. The reguated requency reerence rm and reguated votage reerence o dq axis dqre are achieved. The ampitude m or SVPWM is obtained ater dqre being reguated by votage and current controers. The phase θ m or SVPWM is achieved ater rm getting through the phase ange cacuation unit and synchronization contro unit. And the drive signas by SVPWM with m and θ m are generated to drive the switches and the rae contro is reaized. As or unit 2, u acs is sensed. The requency and ampitude o common ac bus are obtained. According to (6, the output o rae system is compensated and the oad reguation is improved. As or unit 3, θ ac o common ac bus is achieved by reguation circuit and phase ange captured circuit. Beore pugging into common ac bus, the phase ange o the inverter, θ, is reguated to be cosed to θ ac in order to suppress the inrush current during hot pug-in. In steady state, θ is detected in rea 4

6 time. The direct synchronization contro is empoyed and θ is reguated rapidy and directy to oow θ ac when the error between θ and θ ac exceeds the imitation. I the error between θ and θ ac within the range, the synchronization reguation is based on the irst ayer contro and the direct synchronization contro is inactive. In addition, the rae system mainy eed the motor oad and / contro is adopted in order to avoid the current surge. And the given requency r increases smoothy rom to its rated vaue (5Hz. IV. EXPERIMETA RESTS A prototype system with two DSP (TMS32F2812 controed inverters in rae is buit or train s auxiiary suppy. The coniguration and contro is shown in Fig. 4. The DC bus votage is 6V and rated output votage is 38V/5Hz. The designed cacity is 35kVA and switch requency is 6kHz. The vaue o is.6mh and C is 5μF whie is.8mh. The resistive oad is used in the experiment. In Fig. 5, Fig. 6 and Fig. 7, u an1 u an2 are the phase a votages o inverter 1 and inverter 2, and i a1 and i a2 are the phase a inductor currents. θ 1out and θ 2out are the representation signas o phase ange o inverter 1 and inverter 2. And the rising edge represents that the phase ange is crossing. The resut o transient perormance under hot swapping is shown in Fig. 5. As shown in Fig. 5, the rae system gets into steady state ater the transient reguation with sma inrush current and votage uctuation. The resut shows a good perormance o rae contro during hot pug-in. The resuts o rae operation with stepping oad are shown in Fig. 6. Fig. 6 (a shows oad step up rom to 16kW whie Fig.6 (b shows the oad step down rom 16kW to no oad. The resuts indicate that the proposed rae contro has good dynamic perormance. The steady-state rae operation resuts are given in Fig. 7. Fig.7 (a shows the steady state waveorms at 37kW. Fig. 7 (b shows the phase error between two inverters in steady state. The resuts shows that the proposed rae contro has good perormance at steady state and the phase error is smaer than.36 (±2μs. (a o oad to 16kW (b 16kW to no oad Fig. 6 Experimenta resut with stepping oad (a 37kW (b Phase error between two inverters Fig. 7 Experimenta resut in steady state Fig. 5 Experimenta resut with hot-pug in V. COCSIO A mutiayer contro or inverters in rae operation without interconnection is proposed and anaysis and impementation are given. The irst ayer contro is based on the improved droop method, which reguates the requency and phase ange o the inverter simutaneousy. With the hep o the irst ayer contro, the dynamic and steady state perormances are enhanced. The second ayer contro compensates the output votage deviations, which are caused by droop method, through sensing the requency and 5

7 ampitude o common ac bus. With the third ayer contro, the phase o common ac bus is sensed and the phase o inverter is reguated beore hot-pug into the common ac bus and during dynamic response. As a resut, the inrush currents are suppressed and osing synchronism is avoided. APPEDIX I Assuming r is equa to, it can be achieved as oows rom Fig. 3: an 11 ao annn ao Mao (A1 j j Z amey an 11 annn M ao ao (A2 j Z j The PI controer in dq rotation rame is appied to contro the inverter so that the mode o the inverter can be viewed as a DC system. It s easy to contro votage ampitude o each inverter equa to the other. So, assuming that ampitudes o votages o a rae inverters are equa ( an1 = an2 = = ann in steady state. By the irst ayer contro, a the rae inverters keep in phase with each other (θ 1 =θ 2 = =θ n. According to above, (A2 is approximatey equivaent to an 11 M ao ao (A3 j Z j So jm an 11 ao(1 (A4 Z With substituting R +jx or Z, equation (A4 can be expressed as: R j( X M an 11 ao (A5 R jx From equation (A5, it can be achieved: M R 1 arctan (A6 2 2 M R X * X The maxima vaue o Equation (A6 is reated to the number o rae inverters and oads and the character o oads. REFERECES [1] Z. He, Y. Xing, Distributed contro or PS modues in rae operation with RMS votage reguation, IEEE Trans. Ind. Eectron., vo. 55, no. 8, pp , 28. [2] Y. Xing, Y. Yan, Contro or current reguated inverters in redundant rae operation, Proceedings o the CSEE, vo. 24, no. 11, pp , 24. [3] J. M. Guerrero, J. Matas J,. G. de Vicuña, et a., Decentraized contro or rae operation o distributed generation inverters using resistive output impedance, IEEE Trans. Ind. Eectron., vo. 54, no. 2, pp , 27. [4] J. M. Guerrero,. G. de Vicuña, J. Matas, M. Castia, and J. Miret, Wireess- contro strategy or rae operation o distributedgeneration inverters. IEEE Trans. Ind. Eectron., vo. 53, no. 5, pp , Oct. 26. [5] K. de Brabandere, B. Bosens, J. Van den Keybus, et a., A votage and requency droop contro method or rae inverters, IEEE Trans. Power Eectron., vo. 22, no. 4, pp , 27. [6] Y. Zhang, H. Ma, B. ei, et a., Anaysis o dynamic perormance or rae operation o inverters without wire interconnections, Proceedings o the CSEE, vo. 29, no. 3, pp , 29. [7] J. M. Guerrero,. G. de Vicuña, J. Matas, M. Castia, and J. Miret, Output impedance design o rae-connected PS inverters with wire-ess oad-sharing contro, IEEE Trans. Ind. Eectron., vo. 52, no. 4, pp , Aug. 25. [8] X. in, S. Duan, Y. Kang, et a., Modeing and stabiity anaysis or rae operation o PS with no contro interconnection basing on droop characteristic, Proceedings o the CSEE, vo. 24, no. 2, pp , 24. [9] J. M. Guerrero,. G. de Vicuña, J. Matas, et a., A wireess controer to enhance dynamic perormance o rae inverters in distributed generation systems, IEEE Trans. Power Eectron.,vo. 19, no. 5, pp , 24. [1] Y. Zhang, H. Ma, B. ei, et a., Anaysis o Current Equaization or Inverter Parae System with o Contro interconnections, Proceedings o the CSEE, vo. 26, no. 25, pp , 26. [11] M.. Marwai, J.-W. Jung, and A. Keyhani, Stabiity anaysis o oad sharing contro or distributed generation systems, IEEE Trans. Energy Convers., vo. 22, no. 3, pp , Sep. 27. [12] K. De Brabandere, B. Bosens, J. Van den Keybus, A. Woyte, J. Driesen, and R. Bemans, A votage and requency droop contro method or rae inverters, IEEE Trans. Power Eectron., vo. 22, no. 4, pp , 27. [13] W. Yao, M. Chen, J. Chen, et a., An improved wireess contro strategy or rae operation o distributed generation inverters, Transactions o China Eectrotechnica Society, vo. 23, no. 1, pp , 28. [14] Z. He, Research on the Contro and Parae Operation Contro or PWM Inverters, anjing: anjing niversity o Aeronautics and Astronautics,28. [15] X. in, S. Duan, Y. Kang, et a., The droop characteristic contro scheme basing on decouping contro in the rae operation o PS with no contro connection, Proceedings o the CSEE, vo. 23, no. 12, pp , 23. [16] M. C. Chandorkar, D. M. Divan, Y. Hu, and B. Banerjee, ove architectures and contro or distributed PS systems, IEEE APEC, 1994, pp [17] P. Kundur. Power System Stabiity and Contro. McGraw-Hi Proessiona, [18] J. M. Guerrero, J. C. Vásquez, R. Teodorescu, Hierarchica contro o droop-controed DC and AC microgrids - A genera approach towards, IEEE IECO9, pp , 29. 6