SSM4452. N-Channel Enhancement Mode MOSFET FEATURES. Product Summary SO-8. ABSOLUTE MAXIMUM RATINGS (TA = 25 C unless otherwise noted)
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1 SSM NChnnel Enhncement Mde MOSFET DS () Prduct Summry ID () RDS(ON) (m ) Mx 7 = FETURES =. D ( 7 ) Super high density cell design fr lw RDS(ON). Rugged nd relible. SO pckge. Pb free. G () S( ) BSOLUTE MXIMUM RTINGS (T = C unless therwise nted) Prmeter Symbl Limit Unit DrinSurce ltge DS GteSurce ltge GS Drin TJ = C ID Pulsed b IDM DrinSurce Dide Frwrd Current IS.7 Mximum Pwer Dissiptin PD. W Operting Junctin nd Strge Temperture Rnge TJ TSTG t C THERML CHRCTERISTICS Therml Resistnce Junctintmbient R J C/W Suth Se Semicnductr reserves the right t mke chnges t imprve relibility r mnufcturbility withut dvnce ntice. Suth Se Semicnductr Jnury (Rev.)
2 SSM NChnnel Electricl Chrcteristics (T = C unless therwise nted) c Prmeter Symbl Cnditin Min Typ Mx Unit DrinSurce Brekdwn ltge BDSS GS= ID= Zer Gte ltge Drin Current IDSS DS= GS= GteBdy Lekge IGSS GS= DS= n Gte Threshld ltge GS(th) DS=GS ID =. DrinSurce OnStte Resistnce RDS(ON) GS= ID= GS= ID= m GS=. ID= 7 OnStte Drin Current ID(ON) DS= GS= 7 Frwrd Trnscnductnce gfs DS= ID= S Input Cpcitnce CISS DS= Output Cpcitnce COSS GS= PF Reverse Trnsfer Cpcitnce CRSS f=.mhz 7 TurnOn Dely Time Rise Time TurnOff Dely Time td(on) tr td(off) DD= ID= GEN= RGEN= 7 ns Fll Time tf RL= Ttl Gte Chrge GteSurce Chrge GteDrin Chrge Qg Qgs Qgd DS= ID= GS= DS= ID= GS=. DS= ID= GS=. Dide Frwrd ltge SD GS= ID=.7.. Ntes. Surfce Munted n FR Brd t < sec. b. Pulse Test Pulse Width < s Duty Cycle < %. c. Gurnteed by design nt subject t prductin testing... nc Suth Se Semicnductr reserves the right t mke chnges t imprve relibility r mnufcturbility withut dvnce ntice. Suth Se Semicnductr Jnury (Rev.)
3 SSM ( Current Drin GS = 7 GS = ( Drin Current C Tj = C C... DS DrintSurce ltge () GS GtetSurce ltge () Figure. Output Chrcteristics Figure. Trnsfer Chrcteristics Cpcitnce (pf) C Ciss Css D S(ON) e OnResistnc Nrmlized R GS = ID = Crss DS DrintSurce ltge () 7 Tj Junctin Tempertture ( C) O Figure. Cpcitnce Figure. OnResistnce ritin with Temperture th Nrmlized GteSurce Threshld ltge DS = GS ID = 7 Tj Junctin Temperture ( C) B S Nrmlize D rinsurce Brekdwn ltg e D S d ID = 7 Tj Junctin Temperture ( C) Figure. Gte Threshld ritin with Temperture Figure. Brekdwn ltge ritin with Temperture Suth Se Semicnductr reserves the right t mke chnges t imprve relibility r mnufcturbility withut dvnce ntice. Suth Se Semicnductr Jnury (Rev.)
4 SSM. F S ) (S Trnscnductnce g DS = IS ) ( Current SurceDrin. IDS DrinSurce Current () SD Bdy Dide Frwrd ltge () Figure 7. Trnscnductnce ritin with Drin Current Figure. Bdy Dide Frwrd ltge ritin with Surce Current G ) ( Gte t Surce ltge S DS = ID = Qg Ttl Gte Chrge (nc) ( Drin Current.. RDS(ON) Limit GS = Single Pulse T = C DC. SD DrintSurce ltge () s ms ms Figure. Gte Chrge Figure. Mximum Sfe Operting re Suth Se Semicnductr reserves the right t mke chnges t imprve relibility r mnufcturbility withut dvnce ntice. Suth Se Semicnductr Jnury (Rev.)
5 SSM DD tn tff GS RGEN IN G D RL OUT td(n) OUT % tr td(ff) % INERTED % % % tf S IN % % % PULSE WIDTH Figure. Switching Test Circuit Figure. Switching Wvefrms Duty Cycle =. Effectiv Impednce r e (t) Nrmlized Trnsient Therml Single Pulse PDM t t. R J(t) = r(t)*r J. R J = see dtsheet. TJM T = PDM*R J(t). Duty Cycle D = t/t Squre Wve Pulse Durtin (sec) Figure. Nrmlized Therml Trnsient Impednce Curve Suth Se Semicnductr reserves the right t mke chnges t imprve relibility r mnufcturbility withut dvnce ntice. Suth Se Semicnductr Jnury (Rev.)
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Phnnel Enhncement Mde MOSFET Prduct Summry SO DS () ID () DS(ON) (mω) Mx 7 6 @GS =. 6 @GS =. 9 @GS =. D (, 6, 7, ) FETUES Super high density cell design fr lw DS(ON). ugged nd relible. SO pckge. Pb free.
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DESCRIPTION The is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to
More informationPIN CONFIGURATION(SOT-23)
DESCRIPTION The is the N-Channel enhancement mode field effect transistors are produced using high cell density DMOS technology. These products have been designed to minimize on-state resistance while
More informationP-Channel Enhancement Mode MOSFET
DESCRIPTION The SPP2319W is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
More informationAM3400A MOSFET 30V N-CHANNEL ENHANCEMENT MODE
DESCRIPTION is the N-Channel enhancement mode power field effect transistors are using trench DMOS technology. This advanced trench technology devices are well suited for high efficiency fast switching
More informationSymbol Parameter Rating Units VDSS Drain-Source Voltage -30 V VGSS Gate-Source Voltage ±20 V TC=25 C -22 A
SMC22H Single P-Channel MOSFET DESCRIPTION SMC22 is the P-Channel enhancement mode power field effect transistors are using trench DMOS technology. This advanced technology has been especially tailored
More informationSTP55NE06 STP55NE06FP
STP55NE06 STP55NE06FP N - CHNNEL ENHNCEMENT MODE SINGLE FETURE SIZE POWER MOSFET TYPE V DSS R DS(on) I D STP55NE06 STP55NE06FP 60 V 60 V
More informationSPP2301D. P-Channel Enhancement Mode MOSFET
DESCRIPTION The SPP2301D is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
More informationDC-DC Converter ( 20V, 4.0A)
DC-DC Converter ( 20V, 4.0)!Features ) Low on-resistance. (mω at 2.5V) 2) High power package. 3) High speed switching. 4) Low voltage drive. (2.5V)!External dimensions (Unit : mm) TSMT6 0.4 2.8.6 (3) ()
More informationSMC3323SN. Single P-Channel MOSFET FEATURES VDS = -30V, ID = -4.1A DESCRIPTION PART NUMBER INFORMATION APPLICATIONS
SMC333SN Single P-Channel MOSFET DESCRIPTION SMC333 is the P-Channel enhancement mode power field effect transistors are using trench DMOS technology. This advanced trench technology devices are well suited
More informationSPN8822. Common-Drain Dual N-Channel Enhancement Mode MOSFET
DESCRIPTION The SPN8822 is the logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize
More informationSPN6242. N-Channel Enhancement Mode MOSFET
DESCRIPTION The SPN6242 is the N-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
More informationSPP3413. P-Channel Enhancement Mode MOSFET
DESCRIPTION The SPP3413 is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
More informationComplementary MOSFET
General Description ELM66EA-S uses advanced trench technology to provide excellent Rds(on) and low gate charge. Maximum Absolute Ratings ELM66EA-S N-channel P-channel Vds=V Vds=-V Id=3.A(Vgs=.V) Id=-.A(Vgs=-.V)
More informationSMC3251S. Single P-Channel MOSFET FEATURES VDS = -30V, ID = -4A DESCRIPTION APPLICATIONS PART NUMBER INFORMATION
Single P-Channel MOSFET DESCRIPTION SMC5 is the P-Channel enhancement mode power field effect transistors are using trench DMOS technology. This advanced trench technology devices are well suited for high
More informationSMC3404S. Single N-Channel MOSFET FEATURES VDS = 30V, ID = 6.7A DESCRIPTION PART NUMBER INFORMATION APPLICATIONS
SMC3S Single N-Channel MOSFET DESCRIPTION SMC3 is the N-Channel enhancement mode power field effect transistors are using trench DMOS technology. This advanced trench technology devices are well suited
More informationSPP2341. P-Channel Enhancement Mode MOSFET
DESCRIPTION The SPP2341 is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
More informationSPP2305. P-Channel Enhancement Mode MOSFET
DESCRIPTION The is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to
More informationPin Define Pin Symbol Description 1 S1 Source 1 2 G1 Gate 1 3 S2 Source 2 4 G2 Gate 2 5 D2 Drain 2 6 D2 Drain 2 7 D1 Drain 1 8 D1 Drain 1
General Description, N & P Pair enhancement mode MOSFET, uses Advanced Trench to provide excellent RDS(ON), low gate charge. These devices are particularly suited for low voltage power management, and
More informationSPN2302. N-Channel Enhancement Mode MOSFET
DESCRIPTION The is the N-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to
More informationSPN7002. N-Channel Enhancement Mode MOSFET
DESCRIPTION The SPN7002 is the N-Channel enhancement mode field effect transistors are produced using high cell density DMOS technology. These products have been designed to minimize on-state resistance
More informationSPC6605. N & P Pair Enhancement Mode MOSFET
DESCRIPTION The SPC6605 is the N- and P-Channel enhancement mode power field effect transistors are produced using high cell density DMOS trench technology. This high density process is especially tailored
More informationPIN CONFIGURATION(SOT-23)
DESCRIPTION The SPP3401D is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
More informationP-Channel Enhancement Mode MOSFET
DESCRIPTION The SPP3415 is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
More informationSPC4567W. N & P Pair Enhancement Mode MOSFET
DESCRIPTION The SPC4567W is the N- and P-Channel enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
More informationPIN CONFIGURATION(SOT-23-3L)
DESCRIPTION The SPP2303 is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
More informationSTN2302. N-Channel Enhancement Mode MOSFET. 20V N-Channel Enhancement Mode MOSFET FEATURE DESCRIPTION APPLICATIONS PIN CONFIGURATION
DESCRIPTION The is the N-Channel logic enhancement mode power field effect transistor is produced using high cell density. advanced trench technology to provide excellent RDS(ON). low gate charge and operation
More information2.5V Drive Pch MOS FET
2.5V Drive Pch MOS FET Structure Silicon P-channel MOS FET Features ) Low on-resistance. (90mΩ at 2.5V) 2) High power package. 3) High speed switching. 4) Low voltage drive. (2.5V) External dimensions
More informationDual N - Channel Enhancement Mode Power MOSFET 4502
Dual N - Channel Enhancement Mode Power MOSFET 4 344 DESCRIPTION The uses advanced trench technology to provide excellent RDS(ON) and low gate charge. This device is suitable for use as a load switch or
More informationSPC6801. P-Channel Trench MOSFET with Schottky Diode. Battery Powered System DC/DC Converter Load Switch Cell Phone
DESCRIPTION The SPC6801combines the Trench MOSFET technology with a very low forward voltage drop Schottky barrier rectifier in an TSOP-6P package. The Trench MOSFET is the P-Channel enhancement mode power
More informationSPN6435. Dual N-Channel Enhancement Mode MOSFET
DESCRIPTION The SPN6435 is the Dual N-Channel enhancement mode field effect transistors are produced using high cell density DMOS technology. These products have been designed to minimize on-state resistance
More informationSMC2334SN. Single N-Channel MOSFET FEATURES VDS = 20V, ID = 5.7A DESCRIPTION PART NUMBER INFORMATION APPLICATIONS
SMCSN Single N-Channel MOSFET DESCRIPTION SMC is the N-Channel enhancement mode power field effect transistors are using trench DMOS technology. This advanced trench technology devices are well suited
More informationSymbol Parameter Rating Units VDSS Drain-Source Voltage -40 V VGSS Gate-Source Voltage ±20 V
Single P-Channel MOSFET DESCRIPTION SMC5455 is the P-Channel enhancement mode power field effect transistors are using trench DMOS technology. This advanced technology has been especially tailored to minimize
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