List... Package outline... Features Mechanical data... Maximum ratings... Electrical characteristics Rating and characteristic curves...
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1 SMD P-hannel MOSFET Frmsa MS List List... Package utline Features... 2 Mechanical data... Maximum ratings Electrical characteristics... 3 Rating and characteristic curves... 4~ 5 Pinning infrmatin... 6 Marking... Suggested slder pad layut Packing infrmatin... 7 Reel packing... 8 Suggested ermal prfiles fr sldering prcesses Page 1 Dcument ID Issued Date Revised Date Revisin Page.
2 SMD P-hannel MOSFET Frmsa MS 30 P-hannel Enhancement Mde MOSFET Package utline Features DS(ON) DS(ON) R 70mΩ@ GS=-10 R 95mΩ@ GS=-4.5 Super high density cell design fr extremely lw RDS(ON) Lead-free parts meet RHS requirments Suffix "-H" indicates Halgen-free part, ex.-h 18 (3.00) 10 (2.80).080(2.04).070(1.78) (1.02) (0.89) SOT (0.50) (0.35) Applicatins Pwer management in nte bk Prtable equipment Battery pwered system Lad switch DS (1.70) (1.20) 18 (3.00) (2.10) (1.30) (0.90) (0.200) (0.085) Dimensins in inches and (millimeters) Mechanical data Epxy:UL94-0 rated flame retardant ase : Mlded plastic, SOT-23 Terminals : Slder plated, slderable per MIL-STD-750, Med 2026 Munting Psitin : Any Weight : Apprximated gram Maximum ratings (AT T A=25 unless erwise nted) PARAMETER Drain-surce vltage Drain current-cntinuus* T A = 25 T A = 70 Symbl DSS -pulsed IDM -14 Gate- surce vltage GS ±20 Maximum pwer dissipatin T A = PD T A = Typical ermal resistance-junctin t ambient * RθJA 90 Operatin junctin temperature range -55 t +150 ID TJ Maximum ratings Strage temperature range TSTG -55 t +150 UNIT A W /W 2 * The device munted n 1in FR4 bard wi 2 z cpper Page 2 Dcument ID Issued Date Revised Date Revisin Page.
3 SMD P-hannel MOSFET Frmsa MS Electrical characteristics (At T A=25 unless erwise nted) PARAMETER ONDITIONS SYMBOL MIN. TYP. MAX. UNIT STATI Drain-surce breakdwn vltage GS = 0, I D= -250μA BDSS -30 Zer gate vltage drain current DS = -30, GS = 0 IDSS -1.0 μa Gate-bdy leakage current Gate reshld vltage GS = ± 20, DS=0 DS = GS, I D = -250μA IGSS GS() -1.0 ± Drain-surce n-resistance * GS = -10, I D = -3.2A RDS(ON) GS = -4.5, I D= -2.5A Dide frward vltage GS =0, I S = -1.0A SD DYNAMI Input capacitance Output capacitance Reverse transfer capacitance Ttal gate charge Gate-surce charge Gate-drain charge Turn-n delay time Turn-ff delay time DS = -15, GS = 0, f=1.0mhz Ttal gate charge DS=-15, GS=-10,I D=-1.7A Qg DS = -15, I D = -1.7A GS=-4.5 Gate resistance DS=0, GS=0, f=1mhz Rg Ω Turn-n rise time Turn-ff fall time DS = -15,R L=15Ω, R GEN=6Ω GS=-10 * Pulse test: pulse wid 300us, duty cycle 2%, Guaranteed by design, nt subject t prductin testing. iss ss rss Qg Qgs Qgd td(n) tr td(ff) tf na mω pf n ns Page 3 Dcument ID Issued Date Revised Date Revisin Page.
4 Rating and characteristic curves () Page 4 Dcument ID Issued Date Revised Date Revisin Page.
5 Rating and characteristic curves () Page 5 Dcument ID Issued Date Revised Date Revisin Page.
6 SMD P-hannel MOSFET Frmsa MS Pinning infrmatin Pin Simplified utline Symbl D Drain PinD PinG PinS Drain Gate Surce Gate G S Surce Marking Type number Marking cde WGXX WGGXX (Nte 1) (Nte 2) Nte 1: st nd WG shwn n e 1 ~2 psitin n --- Marking cde D / : XX is e sequence f 0-9 & A~Z rd 0~9 shwn n e 3 psitin n ~2019 A~Z shwn n e 4 psitin n ---1week~26week A~ Z shwn n e 4 psitin n ---27week~52week Nte 2: st rd WGG shwn n e 1 ~3 psitin n --- Marking cde D / : XX is e sequence f 0-9 & A~Z 0~9 shwn n e 4 psitin n ~2019 A~Z shwn n e 5 psitin n ---1week~26week A~ Z shwn n e 5 psitin n ---27week~52week Suggested slder pad layut SOT (0.95) 0.037(0.95) 0.079(2.0) 0.035(0.90) 0.031(0.80) Dimensins in inches and (millimeters) Page 6 Dcument ID Issued Date Revised Date Revisin Page.
7 SMD P-hannel MOSFET Frmsa MS Packing infrmatin P0 d P1 E F B W A P D2 D1 T D W1 unit:mm Item Symbl Tlerance SOT-23 arrier wid arrier leng arrier dep Sprcket hle 13" Reel utside diameter A B d D " Reel inner diameter 7" Reel utside diameter 7" Reel inner diameter Feed hle diameter Sprcket hle psitin Punch hle psitin Punch hle pitch Sprcket hle pitch Embssment center Overall tape ickness Tape wid Reel wid D1 D D1 D2 E F P P0 P1 T W W1 min 2.0 min Nte:Devices are packed in accr dance wi EIA standar RS-481-A and specificatins listed abve. Page 7 Dcument ID Issued Date Revised Date Revisin Page.
8 SMD P-hannel MOSFET Frmsa MS Reel packing PAKAGE REEL SIZE REEL (pcs) OMPONENT SPAING (m/m) BOX (pcs) INNER BOX (m/m) REEL DIA, (m/m) ARTON SIZE (m/m) ARTON (pcs) APPROX. GROSS WEIGHT (kg) SOT-23 7" 3, , *123* *257* , Suggested ermal prfiles fr sldering prcesses 1.Strage envirnment: Temperature=5 ~40 Humidity=55% ± 25% 2.Reflw sldering f surface-munt devices TP Tp ritical Zne TL t TP Ramp-up TL Tsmax TL Tsmin Temperature ts Preheat Ramp-dwn 25 t25 t Peak 3.Reflw sldering Time Prfile Feature Average ramp-up rate(tl t T P) Preheat -Temperature Min(Tsmin) -Temperature Max(Tsmax) -Time(min t max)(t s) Tsmax t TL -Ramp-upRate Time maintained abve: -Temperature(T L) -Time(t L) Peak Temperature(T P) Time wiin 5 f actual Peak Temperature(t P) Ramp-dwn Rate Time 25 t Peak Temperature Sldering nditin <3 /sec ~120sec <3 /sec ~260sec 255-0/+5 10~30sec <6 /sec <6minutes Page 8 Dcument ID Issued Date Revised Date Revisin Page.
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General Description These N-Channel enhancement mode power field effect transistors are planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance,
More informationTaiwan Goodark Technology Co.,Ltd TGD01P30
TGD P-Channel Enhancement Mode Power MOSFET Description The uses advanced trench technology and design to provide excellent R DS(ON) with low gate charge. It can be used in a wide variety of applications.
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WPM32 WPM32 Single P-Channel, -3V, -11.5A, Power MOSFET Http://www.sh-willsemi.com V DS (V) Typical R DS(on) (mω) -3 11@ =-1V 15 @ =-5V S S S G Descriptions The WPM32 is P-Channel enhancement MOS Field
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INSULATED GATE BIPOLAR TRANSISTOR PD - 9587 IRG4PH40UPbF Ultra Fast Speed IGBT Features UltraFast: Optimized fr high perating frequencies up t 40 khz in hard switching, >200 khz in resnant mde New IGBT
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More informationFeatures. N-Channel Enhancement Mode MOSFET 25V/60A, R DS(ON) =10V
N-Channel Enhancement Mode MOSFET Features Pin Description 25V/6, R DS(ON) =4.5mΩ (typ.) @ V GS =V R DS(ON) =7.5mΩ (typ.) @ V GS =4.5V Super High Dense Cell Design Reliable and Rugged Lead Free and Green
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FKD93 % EAS Guaranteed Green Device Available Super Low Gate Charge Excellent CdV/dt effect decline Advanced high cell density Trench technology Product Summary BVDSS RDSON ID V 3mΩ 3A -V 5mΩ -A Description
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DESCRIPTION The uses advanced trench technology to provide excellent R DS(ON), low gate charge and operation with gate voltages as low as 4.5V. This device is suitable for use as a load switch or in PWM
More informationPackage Code. Handling Code. Assembly Material
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