High mobility top gated field-effect transistors and integrated circuits based on chemical vapor deposition-derived monolayer MoS 2

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1 Copyright 16 by American Scientific Publishers All rights reserved. Printed in the United States of America /16/6/198/7 doi:1.1166/mex High mobility top gated field-effect transistors and integrated circuits based on chemical vapor deposition-derived monolayer MoS Dianzhong Wu 1, Zhiyong Zhang,, Danhui Lv 3, Guoli Yin 3, Zhijian Peng 1,, and Chuanhong Jin 3 1 School of Engineering and Technology, China University of Geosciences, Beijing 183, China Key Laboratory for the Physics and Chemistry of Nanodevices and Department of Electronics, Peking University, Beijing 1871, China 3 State Key Laboratory of Silicon Materials and School of Materials Science and Engineering, Zhejiang University, Hangzhou 317, China ABSTRACT IP: On: Fri, 6 Oct 18 19::9 Monolayer MoS Copyright: American Scientific Publishers with large area and high quality are grown using chemical vapor deposition (CVD) on Si/SiO substrate, the triangle grain size is about 5 m, and top-gated field-effect transistors (FETs) were fabricated using atomic layer deposition (ALD) grown HfO at low temperature as high-k gate insulator. The transistors present typical n-type field-effect properties, especially with high carrier mobility up to about 36.4 cm /Vs, which is the highest value of mobility of top gated transistors based on CVD-derived single layer MoS. Two kinds of methods were used to extract mobility from the measured properties of FETs, and the consistent results indicated the retrieved mobility was reliable. In addition an inverter circuit with gain larger than 1 was constructed based on the n-type FETs. Keywords: MoS, Field-Effect Transistors, Top-Gate, Mobility, Inverter. 1. INTRODUCTION Two dimensional (D) materials have drawn lots of attention so wing to their unique structure and properties since the discovery of graphene at 4. 1 Among various explorations on the applications of D materials, one of the most concerned things is to act as conducting channel for field-effect transistors (FETs) since the ultra-thin body can provide excellent intrinsic immunity to short channel effect, and further pushes the scaling down of FETs into sub-1 nm regime in potential. As a typical layered two-dimensional material, MoS presents large band-gap ranged from 1. to 1.89 ev and ultrathin thickness down to.65 nm for monolayer, and then has been considered as an excellent candidate channel Authors to whom correspondence should be addressed. s: zyzhang@pku.edu.cn, pengzhijian@cugb.edu.cn material for constructing ultra-small transistors for low power applications. 6 At present stage, high-quality monolayer and few layers MoS were mostly fabricated by mechanical exfoliation (ME) method from its singlecrystal bulk counterparts. High performance FETs conducted on these samples have been realized with an on/off current ratio reaching up to 1 8, a competing subthreshold swing of 74 mv/dec, and a high mobility larger than cm V 1 s Even some integrated circuits with 9 1 different logical functions have been demonstrated. It is well known that mechanical exfoliated fabrication of MoS suffers from low yield and small size, and then does not fully satisfy the requirement for large-scale production of devices and integrated circuits. Alternatively chemical vapor deposition (CVD) method has been developed to synthesize large scale MoS with single layer and few layers However, the published CVD-derived 198 Mater. Express, Vol. 6, No., 16

2 High mobility top gated field-effect transistors and integrated circuits MoS always presented poor quality, such as low carrier mobility Compared with multi-layer MoS samples, the monolayer one presents the thinnest body, largest bandgap, and direct band, which are favored by both of small FETs for low power ICs and photoelectron devices with high efficiency. Therefore fabricating high quality monolayer MoS with large area using CVD methods is one of the most important things for development of MoS based electronics and photo-electronics. Very recently important progresses have been achieved on the CVD growth of D materials, it will be helpful to further promote the quality 19 of CVD derived MoS. In this work, we prepared monolayer MoS with large area and high quality using chemical vapor deposition on Si/SiO substrate, and top-gated field-effect transistors were then fabricated. The FETs present typical n-type field-effect properties, especially with high carrier mobility up to about 36.4 cm /Vs, which is the highest value of mobility of top-gate transistors based on CVD-derived monolayer. In addition an inverter circuit was demonstrated based on the n-type MoS FETs.. EXPERIMENTAL DETAILS.. Materials Characterization.1. Materials and Methods The PL spectrum as shown in Figure presents a strong The monolayer MoS was grown on silicon substrate covered with 3 nm silicon oxide using IP: CVD method On: asfri, 6 luminescence peak at 689 nm (1.8 ev), which indicates the Oct band 18 gap 19::9 of monolayer MoS described in Refs. [11, ]. Typically the Copyright: sulfuration American of the Scientific Publishers. 3 In addition, a weak Delivered by peak Ingenta at 63 nm was derived from the 3d electron spin orbit precursor MoO 3 was conducted at 83 C for 15 minutes at ambient pressure, where the argon with a flow rate of 5 sccm (standard-state cubic centimeter per minute) was introduced as the carrier gas. A back-off method was used to obtain uniform single-layer MoS, the bottom silicon substrate was cut to a square size of 8 cm 8 cm with 3 mgmoo 3 powder, and the top one which acted as the target substrate was 1 cm 1 cm. The furnace was heated to 83 C in 4 minutes while the sulfur source was evaporated in a small furnace closely next to the main furnace at 18 C. The whole growth procedure takes 15 mins with Ar flow of 5 sccm, and then the sulfur furnace was Intensity (a.u.) Wavelength (nm) Fig.. Typical photoluminescence spectrum of MoS used in this work. The wavelength of excitation laser is 488 nm. turned off and the samples were cooled down to room temperature naturally. Optical micrograph of a typical MoS sample on SiO /Si substrate is shown in Figure 1, in which the MoS sample presents large size up to 5 m and excellent uniformity. coupling of splitting of Mo atoms, which was mentioned in the previous literature. The Raman spectrum of the sample shown in Figure 3 presents two Raman modes such as in-plane vibrational mode (Eg 1 and out-plane vibrational mode (A 1g, which are sensitive for the thickness of MoS. The difference in frequency value between Eg 1 and A 1g is about 18 cm 1, which confirms our MoS is monolayer Device Fabrication Devices were then fabricated based on the CVD-derived monolayer MoS samples. The MoS sample was pat- 15 Intensity (a.u.) E 1 g A1g Si 5 Fig. 1. Optical image of a typical CVD-derived MoS sample Raman shift (cm 1 ) Fig. 3. Typical Raman spectrum of MoS used in this work. The wavelength of excitation laser is 488 nm. Mater. Express, Vol. 6,

3 High mobility top gated field-effect transistors and integrated circuits microscopy (SEM) image of a typical device was shown in Figure Device Performance Some back gate devices were measured using a semiconductor analyzer on probe station. Transfer characteristics of a typical device were shown in Figure 6, which indicates a typical n-type FET property with high on/off current ratio larger than 16 even under large bias of 5 V. The subthreshold slope is as large as 4 V/DEC owing to the Fig. 4. Three-dimensional schematic view of the FET. poor gate efficiency of back gate. In low-dimensional semiconductor based transistors without optimization, contact resistance always becomes the dominating resistance, and then the characteristic of terned into regular stripes using an electron beam conducting channel was weakened. To minimize the effect lithography (EBL) process followed by a reactive ion of contacts between MoS and Ti/Au, and highlight the etching (RIE). Another EBL process was then used to intrinsic property of MoS channel, long channel FETs define the windows for source and drain electrodes, and a were designed and fabricated in this work. Transfer and stack layer of Ti/Au (5/45 nm) was deposited using elecoutput properties of a top-gated FET with channel length tron beam deposition. The back-gated FETs were finished of 16 m and width of 1 m were shown in Figures 7 by a standard lift-off process. It s important to note that, and 8 respectively. the highest temperature of devices fabrication process is The transfer characteristic curves indicated the top18 C, at least at this temperature, the stability of the gated FET was a typically n-channel FET even without samples is very good. any intentional doping mainly owing to the vacancy of The fabrication of top gated FETs was begun at defining 19::9 IP: and Oct 18 S atoms. Compared with back gate FET, the top-gated gate windows using an EBL process, then gate On: stackfri, 6 Copyright: American Scientific Publishers FET exhibits smaller threshold gate voltage owing to the consisting HfO (with thickness of 16 nm and dielectric much higher gate efficiency of high-k insulator. The FET constant of 1) and Ti/Au (5/45 nm) layer were grown presents on/off current ratio larger than 14 without any using atomic layer deposition (ALD) and electron beam ambipolar transport behavior in the measured range owing deposition, respectively. It is worthy of mentioning that to the large band gap of monolayer MoS. It is worth to HfO was grown under 9 C since such low temperature point that the on/off ratio is not fully demonstrated owing is important to maintain the performance of MoS during to the large negative threshold voltage, and should increase ALD process. The thickness of the grown HfO film was if larger negative gate voltage can be applied. However the measured by AFM, and the dielectric constant was then further increasing Vg may lead to broken of gate insulator. calculated from CV measurement. High-quality HfO thin Therefore decreasing the threshold voltage is an efficient film can enhance devices performance. After a stanmethod to further increasing the on/off current ratio for dard lift-off process, the top-gated FETs were fabricated with structure as shown in Figure 4, and scanning electron IDS (A) 3. RESULTS AND DISCUSSION Vds = 5V 1 1 Vds = 1V Vds =.5V Vds =.1V VTG (V) Fig. 5. Typical SEM image of the as-fabricated FET with channel dimension of 16 m (length) 1 m (width). Fig. 6. The transfer characteristic curve of a back-gated FET based on the MoS with channel length and width of about m, and 5 m. Mater. Express, Vol. 6, 16

4 High mobility top gated field-effect transistors and integrated circuits I DS (ma/µm) V ds = 1V V ds =.5V V ds =.1V I DS (ma/µm) I ds (μa) μ(cm /V.s) 4 4 V TG (V) Fig. 7. Transfer curves of the top-gated FET with channel dimension of 16 m (length) 1 m (width) V TG (V) Fig. 9. Transfer curves and V TG dependent carrier mobility of the topgated FET with L = 16 m, W = 1 m, V ds = V. top-gated MoS FET. The high efficiency of top-gate leads to good switching-off speed, i.e., subthreshold slope about mv/dec is achieved in the FET. The output curves also present high performance field-effect characteristics, including linear I V at low bias and excellent current saturation at high bias. The standard n-type FET provided a platform for extracting electron mobility of the CVDderived MoS. 3.. FET Mobility Extraction One popular method to extract carrier mobility is the CVD, but also larger than the mobility of top-gated widely-used transconductance method, IP: which extract On: thefri, 6 FETs Oct as 18 listed19::9 in Table I. 3 5 mobility from transfer curves using Copyright: American Scientific Publishers L (1) WC ox V ds = I ds V TG where L and W are length and width of the channel respectively, and C ox = r /t ox and are the capacitance of the gate insulator per unit area, = F/m is the dielectric constant of vacuum, r and t ox are the dielectric constant and thickness of HfO respectively. Figure 9 show the transfer curve of the device (with L = 16 m and W = 1 um) under V ds = V, and the corresponding gate voltage (V TG dependent carrier mobility using transconductance method. I DS (ma/µm) 3 1 The carrier mobility is strongly dependent on gate voltage since the effect of contact resistance varies with gate voltage. The carrier mobility reaches peak value at V TG = V, around which the transconductance reaches the maximum value, and then the effect of contact resistance is minimized. The peak carrier mobility retrieved from the maximum transconductance is 36.4 cm /V s, which is not only much larger than most published mobility of back gate FETs based monolayer MoS prepared by 3.3. Contact Resistance Extraction It is well known that the transconductance method would underestimate the mobility since it neglects the influence from contact resistances. Therefore, the retrieved mobility using transconductance method should be dependent on channel length if the proportion of contact resistance is large enough. To explore the effect of contact resistance on carrier mobility extraction, we fabricated some groups of top-gated FETs based on CVD-derived MoS films with channel length ranged from 4 to 3 m. The peak carrier mobility of these FETs was extracted using transconductance method based on transfer curves, and plotted in Figure 1. It is obviously that the extracted mobility is strongly dependent on channel length, i.e., increases with channel length, which indicates the significant effect of contact resistance for FETs with channel length shorter than Table I. Carrier mobility comparison of CVD-derived monolayer MoS FETs fabricated by different groups. Mobility (cm /V s) Gate insulator V DS (V) Fig. 8. Output curves of the top-gated FET. Top gate voltage varies from 3 to 5 V with a step of.5 V from top to bottom. US Army Research nm Al O 3 Laboratory (Ref. [3]) Purdue University (Ref. [4]) nm Al O 3 University of Texas (Ref. [5]) 4 Al O 3 This work nm HfO Mater. Express, Vol. 6, 16 1

5 High mobility top gated field-effect transistors and integrated circuits µ (cm /V.s) 3 R t (Ω) L channel (µm) L channel (µm) Fig. 1. R t L Channel relation of the group FETs at V TG V th = V. Fig. 1. Carrier mobility distribution of MoS FETs with different channel length, extracted using transconductance method. 16 m. To decouple the effect of contact resistance and obtain intrinsic mobility, transfer length method (TLM) respectively. Since in most cases we just concern about the was used here to extract mobility and contact resistance based on a group of FETs with varying channel was extracted and plotted in Figure 1. The contact resis- mobility at on-state, the R t versus L at V TG V th = V length. 6 9 The total resistance R t consists of channel resistance from MoS channel (R channel and parame- of R t L line at the vertical axis, i.e., about 1 tance R c at net gate voltage V TG V th = V is the intercept ter resistance at source/drain contact (R c, which can be 1 5 m, which is the same order of magnitude as expressed by that of the published top-gated FETs based on monolayer Oct MoS ::9 By decoupling the contact resistance, we IP: On: Fri, 6 R t V TG = R c V TG + R channel Copyright: V TG American Scientific can retrieve Publishers the intrinsic mobility of the applied MoS = R c V TG + () L W C ox V TG V T Here V T is threshold voltage. It is well known that a group of uniform transistors with various channel length is the foundation for extracting mobility through TLM method. Therefore a group of top-gated FETs (4 devices with channel length of 4, 8, 16 and 3 m) fabricated on the same MoS sample were chosen to provide data for mobility extraction using TLM method, and the transfer curves at V ds = V were shown in Figure 11. By linear fitting the R t of FETs with different L under a fixed net gate voltage (V TG V T, R channel and R c under this gate voltage were achieved from the slope and intercept, using Eq. (). The intrinsic mobility extracted using TLM is about 44.9 cm /Vs, which is slightly larger than that extracted using transconductance method owing to decoupling the contact resistance. The mobility values extracted using two kinds of methods were almost consistent, which not only indicates the mobility is reliable, but also reflects the contact resistance is almost negligible for FET with channel length up to 16 m in this work. We constructed an inverter based on n-type MoS FETs according to the schematic circuit as shown in the inset of Figure 4, which consists of one (the upper one) n-fet V DD =5V. I DS (µa) W/L=1: 4 W/L=1: 8 W/L=1: 16 W/L=1: 3 V ds =.V 4 6 V TG -V th (V) I DS (µa) V out (V) V DD 1. V 3 V out in.5 GND V in (V) Gain Fig. 11. Transfer curves of a group of MoS FETs with channel length of 4 m, L = 8 m, L = 16 m, and L = 3 m. Fig. 13. Transfer curve of an inverter consisting of two n-type MoS FETs. Inset: Schematic circuit for the inverter. Mater. Express, Vol. 6, 16

6 High mobility top gated field-effect transistors and integrated circuits with shortened gate and drain as load resistance, and another n-fet as switch. The transfer curve of the inverter is measured and shown in Figure 13, which indicates a typical inverter characteristic with the maximum gain of about 1.6 at transition region. It is well known that enhanced n-type FETs (with positive V th are required for constructing inverters based on pure n-type FETs. The low gain of our inverter is mainly originated from the large negative threshold voltage of MoS FETs. It should be noted the inverter is not a very good one, and there are large room for optimization of FETs, especially including threshold voltage and transconductance. However, this is one of the few inverters demonstrated based on CVDderived monolayer MoS sample, and the potential for application in integrated circuits is initially demonstrated. 4. CONCLUSION As a conclusion, monolayer MoS with large area and high quality are grown using chemical vapor deposition (CVD) on Si/SiO substrate, and then top-gated field-effect transistors were fabricated using ALD grown HfO as high-k gate insulator. The transistors present typical n-type fieldeffect properties, especially with high carrier mobility up to about 36.4 cm /Vs, which is the highest value of mobility based on CVD-derived single layer MoS of top gate devices. Two kinds of methods wereip: used to extract mobility from the measured properties of FETs, Copyright: and theamerican consis- Scientific Publishers On: Fri, 6 Oct 18 19::9 tent results indicated the retrieved mobility was reliable. In addition, an inverter circuit with gain larger than 1 was constructed based on the n-type FETs. Acknowledgment: This work was supported by the Ministry of Science and Technology of China (Grant Nos. 11CB9331 and 14CB935), National Science Foundation of China (Grant Nos , 61311, , , and 51). References and Notes 1. K. S. Novoselov, A. K. Geim, S. V. Morozov, D. Jiang, Y. Zhang, S. V. Dubonos, I. V. Grigorieva, and A. A. Firsov; Electric field effect in atomically thin carbon films; Science 36, 666 (4).. R. Coehoorn, C. Haas, J. Dijkstra, C. J. F. Flipse, R. A. de Groot, and A. Wold; Electronic structure of MoSe,MoS,andWSe.I. Band-structure calculations and photoelectron spectroscopy; Phys. Rev. B 35, 6195 (1987). 3. K. F. Mak, C. Lee, J. Hone, J. Shan, and T. F. Heinz; Atomically thin MoS : A new direct-gap semiconductor; Phys.Rev.Lett. 15, (1). 4. A. Splendiani, L. Sun, Y Zhang, T. S. Li, J. Kim, C. Y. Chim, G. Galli, and F Wang; Emerging photoluminescence in monolayer MoS ; Nano Lett. 1, 171 (1). 5. Y. Yoon, K. Ganapathi, and S. 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