Supporting Information

Transcription

1 Supporting Information Radio Frequency Transistors and Circuits Based on CVD MoS 2 Atresh Sanne 1*, Rudresh Ghosh 1, Amritesh Rai 1, Maruthi Nagavalli Yogeesh 1, Seung Heon Shin 1, Ankit Sharma 1, Karalee Jarvis 2, Leo Mathew 3, Rajesh Rao 3, Deji Akinwande 1, Sanjay Banerjee 1 1 Microelectronics Research Center, University of Texas at Austin 2 Texas Materials Institute, University of Texas at Austin 3 Applied Novel Devices Inc. * Correspondence atresh.sanne@utexas.edu, deji@ece.utexas.edu, banerjee@ece.utexas.edu 1

2 1. Material Growth Figure S1. Schematic of the MoS 2 growth setup starting from MoO 3 and S. The MoS 2 atomic layer films were grown by a standard vapor transfer growth process (schematic of growth setup shown in Figure S1) within a quartz tube with an inner diameter of 22 mm and a Lindberg/Blue M furnace. The starting materials were MoO 3 (15 mg) and sulfur (1 g) powder that were loaded in separate alumina crucibles and placed inside the tube, with the sulfur crucible outside the actual furnace and heated independently using a heating tape. The substrates used for this work were surface cleaned 285 nm SiO 2 on highly resistive Si (> 5000 Ω cm). Figure S2. (a,b,c) Controlled large-area growth of continuous monolayer MoS 2 in the mm 2 scale. (d) Individual isolated domains with edge lengths > 100 µm. 2

3 Controlled large area growth was accomplished by using masking and target substrates. Both the masking and target substrates used were from the same wafer. The polished side of the substrates faced the MoO 3 precursor. By controlling the distance between individual masking substrates we could control the area of the continuous monolayer region. The procedure for the growth consisted of loading the starting materials and substrates, followed by pumping down the tube to base pressure (< 10 mtorr). This was followed by purging the tube and the gas lines by flowing in UHP N 2 gas at 200 sccm. After 4 purging cycles the tube was filled with N 2 to 1 atm pressure. Then temperature of the furnace was raised to 850 C at a rate of 50 C/min. When the temperature of the tube furnace was at 650 C, the sulfur was heated to 150 C (+/- 5 C) and held there at that temperature. The growth continued for 5 min at 850 C. After the 5 minutes at 850 C the heater in the furnace was turned off for cooling without any feedback. Heating of the sulfur was cut off once the furnace cooled down to 650 C. Figure S2(a,b,c) show optical images of resulting large area growths. Figure S2(d) shows an individual triangular domain typical to those used for device fabrication. 2. Material Characterization Raman and photoluminescence (PL) spectroscopy was done using a Witec Alpha 300 micro- Raman confocal microscope, with the laser operating at a wavelength of 488 nm. Parameters in our mapping were (i) grating (Raman) = 1800 g/mm, (PL) = 600 g/mm; (ii) integration time/pixel = 1 s; (iii) resolution = 3 pixels/µm. Transmission electron microscopy (TEM) was done using JEOL 2010F Transmission Electron Microscope. 3

4 3. Mobility Calculation 10 µm Figure S3. (a) Extracted mobility vs. overdrive voltage V gs V th of a RF FET. (b) I ds -V gs of a 4pt. device at a V ds of 0.01 V. The subthreshold slope is SS ~ 240 mv/dec. The inset shows the optical image of the 4pt. device. The scale bar is 10 µm. The ground-signal-ground (GSG) configuration and the small channel lengths required for high frequency operation prohibit 4pt. devices needed to eliminate contact resistance from DC measurements. To decouple the field-effect mobility, µ FE, from the contact resistance, R c, we applied the transition metal dichalcogenides (TMD) model in ref 1. From the model, we extrapolated the total resistance, R tot = V ds /I ds, to high gate fields where R tot 2R c. Then using I ds = µc ox (W/L)(V gs V th I ds R c )(V ds 2R c ), we plot µ FE as function of V gs V th as shown in Figure S3(a), where we see a peak mobility of µ FE = 55 cm 2 /Vs. To confirm this value, we fabricated separate four point (4pt.) devices in parallel with the same process flow. A 4pt. device with W = 5 µm and L = 4 µm with full top-gate overlap is shown in the inset of Figure S3(b). Figure S3(b) shows the I ds -V gs transfer characteristics for the 4pt. device. The device intrinsic mobility is measured to be µ = 63 cm 2 /Vs with I on /I off ratios greater than 10 5 and R c ~ 2 kω µm. We see an increase in mobility due to full channel modulation and accurate R c removal. By 4

5 taking the inverse of the slope in the subthreshold region, we calculate a subthreshold slope, SS 240 mv/dec. 4. De-embedding Structures (a) (b) 10 µm 10 µm Figure S4. (a) Optical image of the OPEN structure. (d) Optical image of the SHORT structure. We used OPEN and SHORT structures fabricated nearby the main device for de-embedding. Figure S4(a,b) shows the zoomed in optical images of the de-embedding layout. The layout structures were designed with the exact same parameters as the main device, including MoS 2 in the channel contact region to accurately account for the contact resistance. The intrinsic performance is obtained by the following two-step de-embedding process. We first obtain Y- parameters from the measurement data, and then using the Agilent ADS simulation tool, the parasitics are de-embedded with Equation

6 5. Mixer Measurement and Analysis (a) (b) Amplitude in (dbv) A rf A lo a 2 (cos((ω rf ω lo )t) A rf A lo a 2 (cos(ω rf + ω lo )t) (ω rf ω lo ) ω lo ω rf (ω rf + ω lo ) 2ω rf 2ω lo Frequency (Hz) Figure S5. (a) CVD MoS 2 FET mixer measurement setup. (b) Theoretical FFT spectrum of a single FET mixer Figure S5(a) shows the different equipment used during the mixer measurement. The dual channel DC supply supplies the drain and gate biases, with two function generators providing the 6

7 input signals. Equations 4 through 7 (part 6) show the analysis of a single FET active mixer operation. 3 Equation 7 shows the drain current output of the mixer containing various intermodulation products (RF-LO, RF+LO, RF, LO, 2RF, 2LO). The theoretical FFT spectrum of the mixer output (Equation 7) is as shown in Figure S5(b). This closely resembles the measured FFT spectrum of the MoS 2 active mixer shown in Figure 6(b) of the main text. 7

8 6. Schottky Barrier Height Extraction (a) (b) (c) (d) Figure S6. (a) I ds -V gs temperature dependence measurements of a MoS 2 FET. (b) Arrhenius plot of the I ds for different top gate voltages. The dotted line is the slope of the curves in the high temperature region. (c) Barrier height extraction at different gate voltages. The true Schottky barrier height is the point at which the curve is no longer linear with gate voltage. (d) Band diagram of the MoS 2 -Silver interface showing the barrier height creating the Schottky contact The Schottky barrier height for a MoS 2 device was determined using the method in ref. 4. The I ds -V ds transfer curves were taken at various temperatures from 83 K to room temperature and is shown in Figure S6(a). This data was then plotted in a form from which the slope could be 8

9 extracted to determine the barrier height. An Ahrhenius plot of the drain current I ds was constructed for each measured gate voltage. Figure S6(b) shows this plot for a few voltage points along with a linear fit of each curve in the high temperature region. Using the thermionic qφ b qφ b emission current equation I ds = AT 2 e k BT [e k BT 1], the barrier height Φ b was determined as a function of gate voltage (Figure S6(c)). The point at which barrier height Φ b no longer follows a linear relationship with the gate voltage is the flatband voltage, V FB. This is also where the tunneling current across the Schottky barrier begins to dominate over the thermionic current. This yielded a Schottky barrier height Φ SB of ~ 0.07 ev. The energy band diagram of the MoS 2 device operating at a particular gate and drain bias is shown in Figure S6(d). The Schottky barrier height is shown at the MoS 2 -Silver interface. 9

10 7. Velocity Saturation Figure S7. Effective velocity v eff as a function of drain voltage V ds. The effective velocity, v eff, is shown in Figure S7 as a function of horizontal electric field (V ds ) for the RF MoS 2 device. It can be seen that the velocity does not change much in this high field regime of V ds > 3.5 V. At these high electric fields the carrier velocity in the MoS 2 increases beyond the optical phonon energy. This increases the probability of carriers to emit an optical phonon, resulting in increased optical phonon scattering. The increased optical phonon scattering causes the carrier velocity to saturate with increased electric fields. 10

11 8. Equations f T = g m 2π(C gs +C p,gs +C p,gd )((R p,s +R p,d )g d +1)+C p,gd g m (R p,s +R p,d ) (1) Where g m is the transconductance, C gs is the gate-to-source capacitance, C p,xy are the various parasitic capacitances, g d is the drain conductance, R p,d and R p,s are the drain and source resistances respectively. 5 f max = f T 2g d (R p,s + R gate )+2πf T C p,gd R gate (2) Where f T is the transit frequency, g d is the drain conductance, R p,s and R gate are the drain and gate resistances respectively, and C p,gd is the parasitic gate-to-drain capacitance. 5 Y FET = ((Y DUT Y OPEN ) 1 (Y SHORT Y OPEN ) 1 ) 1 (3) Where Y DUT, Y OPEN, and Y SHORT are the device, open, and short Y-parameters, respectively. Active Mixer Analysis: CVD MoS 2 FET gate input signal is given by: v g = A rf cos(ω rf t) + A lo cos(ω lo t) (4) Where A rf and ω rf correspond to the amplitude and frequency of the RF input signal. A lo and ω lo correspond to the amplitude and frequency of the LO input signal. We have neglected the gate bias V g to simplify the small signal analysis. 11

12 The FET drain current is given by: i d = a 1 v g + a 2 v g 2 + higher order terms (5) Substituting Equation 4 in Equation 5 and expanding: i d = a 1 (A rf cos(ω rf t) + A lo cos(ω lo t)) + a 2 (A rf cos(ω rf t) + A lo cos(ω lo t)) 2 (6) + higher order terms Expanding Equation 6: 2 2 A rf i d = a 1 A rf cos(ω rf t) + a 1 A lo cos(ω lo t)) + a 2 2 (1 + cos(2ω A lo rf t)) + a 2 2 (1 + cos(2ω lo t)) + A rf A lo a 2 (cos((ω rf ω lo )t) + A rf A lo a 2 (cos(ω rf + ω lo )t) + higher order terms The drain current output of the mixer contains various intermodulation products (RF-LO, RF+LO, RF, LO, 2RF, 2LO). In Equation 7 the down converted signal is highlighted red and the up converted signal is green. (7) 12

13 References [1] Roy, T.; Tosun, M.; Kang, J.; Sachid, A.; Desai, S.; Hettick, M.; Hu, C.; Javey, A. ACS Nano. 2014, 8, [2] Cho, H.; Burk, D. IEEE Transactions on Electron Devices. 1991, 38, 6. [3] Razavi, B. Design of Analog CMOS Integrated Circuits. 1st ed.: McGraw-Hill Higher Education, [4] Das, S.; Chen, H.-Y.; Penumatcha, A.; Appenzeller, J. Nano Letters 2013, 13, [5] Lee, J. Graphene field-effect transistors for high performance flexible nanoelectronics. Ph.D. Thesis, University of Texas at Austin,