MOSFET MetalOxideSemiconductorFieldEffectTransistor. OptiMOS TM OptiMOS ª 5Power-Transistor,80V IPP020N08N5. DataSheet. PowerManagement&Multimarket

Transcription

1 MOSFET MetalOxideSemiconductorFieldEffectTransistor OptiMOS TM OptiMOS ª 5PowerTransistor,8V DataSheet Rev.2.1 Final PowerManagement&Multimarket

2 1Description Features Idealforhighfrequencyswitchingandsync.rec. ExcellentgatechargexRDS(on)product(FOM) VerylowonresistanceRDS(on) Nchannel,normallevel 1%avalanchetested Pbfreeplating;RoHScompliant QualifiedaccordingtoJEDEC 1) fortargetapplications HalogenfreeaccordingtoIEC TO223 tab Table1KeyPerformanceParameters Parameter Value Unit VDS 8 V RDS(on),max 2. mω ID 12 A Qoss 27 nc QG(V..1V) 178 nc Gate Pin 1 Drain Pin 2, Tab Source Pin 3 Type/OrderingCode Package Marking RelatedLinks PGTO223 2N8N5 1) JSTD2 and JESD22 2

3 TableofContents Description Maximum ratings Thermal characteristics Electrical characteristics Electrical characteristics diagrams Package Outlines Revision History Disclaimer

4 2Maximumratings attj=25 C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Values Min. Typ. Max. Unit Note/TestCondition Continuous drain current ID A TC=25 C TC=1 C Pulsed drain current 1) ID,pulse 48 A TC=25 C Avalanche energy, single pulse 2) EAS 1228 mj ID=1A,RGS=25Ω Gate source voltage VGS 2 2 V Power dissipation Ptot 375 W TC=25 C Operating and storage temperature Tj,Tstg C IEC climatic category; DIN IEC 681: 55/175/56 3Thermalcharacteristics Table3Thermalcharacteristics Values Parameter Symbol Unit Note/TestCondition Min. Typ. Max. Thermal resistance, junction case RthJC.3.4 K/W Thermal resistance, junction ambient, minimal footprint RthJA 62 K/W Thermal resistance, junction ambient, 6 cm 2 cooling area 3) RthJA 4 K/W Soldering temperature, wave and reflow soldering are allowed Tsold 26 C Reflow MSL1 1) See figure 3 for more detailed information 2) See figure 13 for more detailed information 3) Device on 4 mm x 4 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 7 µm thick) copper area for drain connection. PCB is vertical in still air. 4

5 4Electricalcharacteristics Table4Staticcharacteristics Parameter Symbol Values Min. Typ. Max. Unit Note/TestCondition Drainsource breakdown voltage V(BR)DSS 8 V VGS=V,ID=1mA Gate threshold voltage VGS(th) V VDS=VGS,ID=28µA Zero gate voltage drain current IDSS µa VDS=8V,VGS=V,Tj=25 C VDS=8V,VGS=V,Tj=125 C Gatesource leakage current IGSS 1 1 na VGS=2V,VDS=V Drainsource onstate resistance RDS(on) Gate resistance 1) RG Ω mω VGS=1V,ID=1A VGS=6V,ID=5A Transconductance gfs S VDS >2 ID RDS(on)max,ID=1A Table5Dynamiccharacteristics 1) Values Parameter Symbol Unit Note/TestCondition Min. Typ. Max. Input capacitance Ciss pf VGS=V,VDS=4V,f=1MHz Output capacitance Coss 2 26 pf VGS=V,VDS=4V,f=1MHz Reverse transfer capacitance Crss pf VGS=V,VDS=4V,f=1MHz Turnon delay time td(on) 4 ns Rise time tr 36 ns Turnoff delay time td(off) 12 ns Fall time tf 37 ns VDD=4V,VGS=1V,ID=1A, RG,ext=1.6Ω VDD=4V,VGS=1V,ID=1A, RG,ext=1.6Ω VDD=4V,VGS=1V,ID=1A, RG,ext=1.6Ω VDD=4V,VGS=1V,ID=1A, RG,ext=1.6Ω Table6Gatechargecharacteristics 2) Values Parameter Symbol Unit Note/TestCondition Min. Typ. Max. Gate to source charge Qgs 57 nc VDD=4V,ID=1A,VGS=to1V Gate to drain charge 1) Qgd nc VDD=4V,ID=1A,VGS=to1V Switching charge Qsw 59 nc VDD=4V,ID=1A,VGS=to1V Gate charge total Qg nc VDD=4V,ID=1A,VGS=to1V Gate plateau voltage Vplateau 4.5 V VDD=4V,ID=1A,VGS=to1V Gate charge total, sync. FET Qg(sync) 153 nc VDS=.1V,VGS=to1V Output charge 1) Qoss nc VDD=4V,VGS=V 1) Defined by design. Not subject to production test 2) See Gate charge waveforms for parameter definition 5

6 Table7Reversediode Parameter Symbol Values Min. Typ. Max. Unit Note/TestCondition Diode continous forward current IS 12 A TC=25 C Diode pulse current IS,pulse 48 A TC=25 C Diode forward voltage VSD V VGS=V,IF=1A,Tj=25 C Reverse recovery time 1) trr ns VR=4V,IF=1A,diF/dt=1A/µs Reverse recovery charge 1) Qrr nc VR=4V,IF=1A,diF/dt=1A/µs 1) Defined by design. Not subject to production test 6

7 5Electricalcharacteristicsdiagrams Diagram1:Powerdissipation 4 Diagram2:Draincurrent Ptot[W] ID[A] TC[ C] Ptot=f(TC) TC[ C] ID=f(TC);VGS 1V Diagram3:Safeoperatingarea µs Diagram4:Max.transientthermalimpedance 1 1 µs µs 1 ms.5 ID[A] ms DC ZthJC[K/W] single pulse VDS[V] ID=f(VDS);TC=25 C;D=;parameter:tp tp[s] ZthJC=f(tp);parameter:D=tp/T 7

8 Diagram5:Typ.outputcharacteristics 48 Diagram6:Typ.drainsourceonresistance V 7 V 6 V 5.5 V 4 32 ID[A] V RDS(on)[mΩ] V 5.5 V 6 V 7 V 1 V VDS[V] ID=f(VDS);Tj=25 C;parameter:VGS ID[A] RDS(on)=f(ID);Tj=25 C;parameter:VGS Diagram7:Typ.transfercharacteristics 3 Diagram8:Typ.forwardtransconductance ID[A] C 25 C gfs[s] VGS[V] ID=f(VGS); VDS >2 ID RDS(on)max;parameter:Tj ID[A] gfs=f(id);tj=25 C 8

9 Diagram9:Drainsourceonstateresistance 5 Diagram1:Typ.gatethresholdvoltage µa RDS(on)[mΩ] 3 2 max typ VGS(th)[V] µa Tj[ C] RDS(on)=f(Tj);ID=1A;VGS=1V Tj[ C] VGS(th)=f(Tj);VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode Ciss Coss C 175 C 25 C, max 175 C, max 1 2 C[pF] 1 3 IF[A] Crss VDS[V] C=f(VDS);VGS=V;f=1MHz VSD[V] IF=f(VSD);parameter:Tj 9

10 Diagram13:Avalanchecharacteristics 1 3 Diagram14:Typ.gatecharge V 4 V 6 V C IAV[A] 15 C 1 C VGS[V] tav[µs] IAS=f(tAV);RGS=25Ω;parameter:Tj(start) Qgate[nC] VGS=f(Qgate);ID=1Apulsed;parameter:VDD Diagram15:Drainsourcebreakdownvoltage 9 Gate charge waveforms 8 VBR(DSS)[V] Tj[ C] VBR(DSS)=f(Tj);ID=1mA 1

11 OptiMOSª5 PowerTransistor, 8 V 6 Package Outlines Figure 1 Outline PGTO223, dimensions in mm/inches 11 Rev. 2.1, 21455

12 OptiMOSª5 PowerTransistor, 8 V Revision History Revision: 21455, Rev. 2.1 Previous Revision Revision Date Subjects (major changes since last revision) Release of Final Version We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: erratum@infineon.com Published by Infineon Technologies AG München, Germany 214 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of noninfringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office ( Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. The Infineon Technologies component described in this Data Sheet may be used in lifesupport devices or systems and/or automotive, aviation and aerospace applications or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that lifesupport, automotive, aviation and aerospace device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. 12 Rev. 2.1, 21455