NODIA AND COMPANY. Model Test Paper - I GATE Digital Electronics. Copyright By Publishers
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1 No part of this publication may be reproduced or distributed in any form or any means, electronic, mechanical, photocopying, or otherwise without the prior permission of the author. Model Test Paper - I GATE Copyright By Publishers Information contained in this book has been obtained by authors, from sources believes to be reliable. However, neither Nodia nor its authors guarantee the accuracy or completeness of any information herein, and Nodia nor its authors shall be responsible for any error, omissions, or damages arising out of use of this information. This book is published with the understanding that Nodia and its authors are supplying information but are not attempting to render engineering or other professional services. NODIA AND COMPANY B-8, Dhanshree Tower Ist, Central Spine, Vidyadhar Nagar, Jaipur Ph : enquiry@nodia.co.in Printed by Nodia and Company, Jaipur
2 Q. 1 - Q. 5 carry one mark each. Q.1 For the following circuits, assume that all gates have finite propagation delay. Which of the above circuits generate a periodic square wave output? (A) 1 and 2 (B) 3 and 4 (C) 2,3 and 4 (C) 1, 2, 3 and 4 Q.2 For an 8-bit 2R network with a voltage supply of 25.6V, what will be the output if binary number 78 were placed on the digital input? (A) 3.9 V (C) 15.6 V (B) 7.8 V Q.3 Consider the 4-bit serial-in-parallel-out, right-shift register shown in figure below. The initial contents of the register is After three clock pulses, the contents of the shift register will be (A) 0000 (B) 0101 (C) 1010 (D) 1111
3 Q.4 The circuit shown below implements a two input NAND gate using two 2 1 # multiplexers. The values of X, Y & Z are, respectively (A) 0, 1, A (B) 0, 1, B (C) 1, 0, A Q.5 In a 4-bit digital system, the 2 s complement representation of 8 is (A) 1000 (B) 0111 (C) 1111 Q. 6 - Q. 15 carry two marks each. (D) Not valid Q.6 Which of the following JK flip flop inputs form the counter...0 " 1 " 2 " 3 " 4 " 0...? JA= QC, JB = QA, JC = QAQB JA= QC, JB = QA, JC = QAQB (A) (B) K = 1, K = 1, K = Q K = 1, K = Q, K = 1 A B C A A B A C (C) J = Q, J = Q, J = Q Q K = Q, K = Q, K = Q A C B A C A B A B B C C A Q.7 In an 8085 microprocessor, after the execution of XRA A instruction, the status of carry and auxiliary carry flags will be (Where CY " carry and AC " Auxiliary carry) (A) CY = 1, AC = 0 (B) CY = 0, AC = 1 (C) CY = 1, AC = 1 (D) CY = 0, AC = 0
4 Q.8 Consider the arrangement for a memory chip, shown in figure below. The address range for the memory chip is (A) 2800H - 2BFFH (B) 3000H - 2BFFH (C) 2800H - 2BFEH (D) 3000H - 3BFFH Q.9 In 8085 micro-controller, the following program is executed. XRA A LXI B, 0010H LOOP: DCX B MOV C,B JNZ LOOP How many times the loop will be executed? (A) 10 times (B) Once (C) 16 times (D) Infinite
5 Q.10 It is claimed that the following circuit may be operated as a logic gate. Assume that MOS devices are acting like ideal switches. Which of the following logic operation is performed by the circuit? (A) Y = A NAND B (B) Y = A OR B (C) Y = A XOR B (D) Y = A XNOR B Q.11 Consider the logic diagram shown below. The output G for the logic is (A) R5 S (B) R5S5T (C) P5 Q (D) Tl
6 Numerical Answer Questions Q.12 Assume that all inputs in the open-collector TTL gate shown in figure is in the high state of 5V. What will be the voltage at the base of transistor Q 1? Q.13 Consider the sequential circuit shown below for which all J and K are HIGH. What will be the MOD number of the counter? Linked Answer Questions Statement For Linked Answer Questions 14 and 15: Consider the 8085 assembly language given below. Initially, the different values in the registers (in Hex) are A = 05; BC = 000; DE = 5472; HL = 4528 and all flags are set to 1. MOV, A, E 1 ADD L 2 DAA 3
7 MOV L, A 4 MOV A, D 5 ADC H 6 DAA 7 MOV H, A 8 MVI A, 00H 9 RAL 10 RET 11 Q.14 What will be the contents of HL after 8th instruction? (A) 5472 (B) 4528 (C) 1010 (D) 0000 Q.15 The 8085 program accomplishes (A) BCD subtraction (B) Two binary numbers addition (C) BCD addition END OF THE QUESTION PAPER For detailed Solutions of this test paper please mail to enquiry@nodia.co.in. Please mention your Name, College, Graduating Year and GATE Registration Number in the mail.
NODIA AND COMPANY. Model Test Paper - I GATE Electrical & Electronic Measurement. Copyright By Publishers
No part of this publication may be reproduced or distributed in any form or any means, electronic, mechanical, photocopying, or otherwise without the prior permission of the author. Model Test Paper -
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