NODIA AND COMPANY. Model Test Paper - I GATE Digital Electronics. Copyright By Publishers

Size: px
Start display at page:

Download "NODIA AND COMPANY. Model Test Paper - I GATE Digital Electronics. Copyright By Publishers"

Transcription

1 No part of this publication may be reproduced or distributed in any form or any means, electronic, mechanical, photocopying, or otherwise without the prior permission of the author. Model Test Paper - I GATE Copyright By Publishers Information contained in this book has been obtained by authors, from sources believes to be reliable. However, neither Nodia nor its authors guarantee the accuracy or completeness of any information herein, and Nodia nor its authors shall be responsible for any error, omissions, or damages arising out of use of this information. This book is published with the understanding that Nodia and its authors are supplying information but are not attempting to render engineering or other professional services. NODIA AND COMPANY B-8, Dhanshree Tower Ist, Central Spine, Vidyadhar Nagar, Jaipur Ph : enquiry@nodia.co.in Printed by Nodia and Company, Jaipur

2 Q. 1 - Q. 5 carry one mark each. Q.1 For the following circuits, assume that all gates have finite propagation delay. Which of the above circuits generate a periodic square wave output? (A) 1 and 2 (B) 3 and 4 (C) 2,3 and 4 (C) 1, 2, 3 and 4 Q.2 For an 8-bit 2R network with a voltage supply of 25.6V, what will be the output if binary number 78 were placed on the digital input? (A) 3.9 V (C) 15.6 V (B) 7.8 V Q.3 Consider the 4-bit serial-in-parallel-out, right-shift register shown in figure below. The initial contents of the register is After three clock pulses, the contents of the shift register will be (A) 0000 (B) 0101 (C) 1010 (D) 1111

3 Q.4 The circuit shown below implements a two input NAND gate using two 2 1 # multiplexers. The values of X, Y & Z are, respectively (A) 0, 1, A (B) 0, 1, B (C) 1, 0, A Q.5 In a 4-bit digital system, the 2 s complement representation of 8 is (A) 1000 (B) 0111 (C) 1111 Q. 6 - Q. 15 carry two marks each. (D) Not valid Q.6 Which of the following JK flip flop inputs form the counter...0 " 1 " 2 " 3 " 4 " 0...? JA= QC, JB = QA, JC = QAQB JA= QC, JB = QA, JC = QAQB (A) (B) K = 1, K = 1, K = Q K = 1, K = Q, K = 1 A B C A A B A C (C) J = Q, J = Q, J = Q Q K = Q, K = Q, K = Q A C B A C A B A B B C C A Q.7 In an 8085 microprocessor, after the execution of XRA A instruction, the status of carry and auxiliary carry flags will be (Where CY " carry and AC " Auxiliary carry) (A) CY = 1, AC = 0 (B) CY = 0, AC = 1 (C) CY = 1, AC = 1 (D) CY = 0, AC = 0

4 Q.8 Consider the arrangement for a memory chip, shown in figure below. The address range for the memory chip is (A) 2800H - 2BFFH (B) 3000H - 2BFFH (C) 2800H - 2BFEH (D) 3000H - 3BFFH Q.9 In 8085 micro-controller, the following program is executed. XRA A LXI B, 0010H LOOP: DCX B MOV C,B JNZ LOOP How many times the loop will be executed? (A) 10 times (B) Once (C) 16 times (D) Infinite

5 Q.10 It is claimed that the following circuit may be operated as a logic gate. Assume that MOS devices are acting like ideal switches. Which of the following logic operation is performed by the circuit? (A) Y = A NAND B (B) Y = A OR B (C) Y = A XOR B (D) Y = A XNOR B Q.11 Consider the logic diagram shown below. The output G for the logic is (A) R5 S (B) R5S5T (C) P5 Q (D) Tl

6 Numerical Answer Questions Q.12 Assume that all inputs in the open-collector TTL gate shown in figure is in the high state of 5V. What will be the voltage at the base of transistor Q 1? Q.13 Consider the sequential circuit shown below for which all J and K are HIGH. What will be the MOD number of the counter? Linked Answer Questions Statement For Linked Answer Questions 14 and 15: Consider the 8085 assembly language given below. Initially, the different values in the registers (in Hex) are A = 05; BC = 000; DE = 5472; HL = 4528 and all flags are set to 1. MOV, A, E 1 ADD L 2 DAA 3

7 MOV L, A 4 MOV A, D 5 ADC H 6 DAA 7 MOV H, A 8 MVI A, 00H 9 RAL 10 RET 11 Q.14 What will be the contents of HL after 8th instruction? (A) 5472 (B) 4528 (C) 1010 (D) 0000 Q.15 The 8085 program accomplishes (A) BCD subtraction (B) Two binary numbers addition (C) BCD addition END OF THE QUESTION PAPER For detailed Solutions of this test paper please mail to enquiry@nodia.co.in. Please mention your Name, College, Graduating Year and GATE Registration Number in the mail.

NODIA AND COMPANY. Model Test Paper - I GATE Electrical & Electronic Measurement. Copyright By Publishers

NODIA AND COMPANY. Model Test Paper - I GATE Electrical & Electronic Measurement. Copyright By Publishers No part of this publication may be reproduced or distributed in any form or any means, electronic, mechanical, photocopying, or otherwise without the prior permission of the author. Model Test Paper -

More information

LIST OF EXPERIMENTS. KCTCET/ /Odd/3rd/ETE/CSE/LM

LIST OF EXPERIMENTS. KCTCET/ /Odd/3rd/ETE/CSE/LM LIST OF EXPERIMENTS. Study of logic gates. 2. Design and implementation of adders and subtractors using logic gates. 3. Design and implementation of code converters using logic gates. 4. Design and implementation

More information

IES Digital Mock Test

IES Digital Mock Test . The circuit given below work as IES Digital Mock Test - 4 Logic A B C x y z (a) Binary to Gray code converter (c) Binary to ECESS- converter (b) Gray code to Binary converter (d) ECESS- To Gray code

More information

Fan in: The number of inputs of a logic gate can handle.

Fan in: The number of inputs of a logic gate can handle. Subject Code: 17333 Model Answer Page 1/ 29 Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model

More information

UNIT II: Clocked Synchronous Sequential Circuits. CpE 411 Advanced Logic Circuits Design 1

UNIT II: Clocked Synchronous Sequential Circuits. CpE 411 Advanced Logic Circuits Design 1 UNIT II: Clocked Synchronous Sequential Circuits CpE 411 Advanced Logic Circuits Design 1 Unit Outline Analysis of Sequential Circuits State Tables State Diagrams Flip-flop Excitation Tables Basic Design

More information

Department of Electronics and Communication Engineering

Department of Electronics and Communication Engineering Department of Electronics and Communication Engineering Sub Code/Name: BEC3L2- DIGITAL ELECTRONICS LAB Name Reg No Branch Year & Semester : : : : LIST OF EXPERIMENTS Sl No Experiments Page No Study of

More information

LOGIC DIAGRAM: HALF ADDER TRUTH TABLE: A B CARRY SUM. 2012/ODD/III/ECE/DE/LM Page No. 1

LOGIC DIAGRAM: HALF ADDER TRUTH TABLE: A B CARRY SUM. 2012/ODD/III/ECE/DE/LM Page No. 1 LOGIC DIAGRAM: HALF ADDER TRUTH TABLE: A B CARRY SUM K-Map for SUM: K-Map for CARRY: SUM = A B + AB CARRY = AB 22/ODD/III/ECE/DE/LM Page No. EXPT NO: DATE : DESIGN OF ADDER AND SUBTRACTOR AIM: To design

More information

GATE Online Free Material

GATE Online Free Material Subject : Digital ircuits GATE Online Free Material 1. The output, Y, of the circuit shown below is (a) AB (b) AB (c) AB (d) AB 2. The output, Y, of the circuit shown below is (a) 0 (b) 1 (c) B (d) A 3.

More information

Code No: R Set No. 1

Code No: R Set No. 1 Code No: R05310402 Set No. 1 1. (a) What are the parameters that are necessary to define the electrical characteristics of CMOS circuits? Mention the typical values of a CMOS NAND gate. (b) Design a CMOS

More information

Number system: the system used to count discrete units is called number. Decimal system: the number system that contains 10 distinguished

Number system: the system used to count discrete units is called number. Decimal system: the number system that contains 10 distinguished Number system: the system used to count discrete units is called number system Decimal system: the number system that contains 10 distinguished symbols that is 0-9 or digits is called decimal system. As

More information

SRV ENGINEERING COLLEGE SEMBODAI RUKMANI VARATHARAJAN ENGINEERING COLLEGE SEMBODAI

SRV ENGINEERING COLLEGE SEMBODAI RUKMANI VARATHARAJAN ENGINEERING COLLEGE SEMBODAI SEMBODAI RUKMANI VARATHARAJAN ENGINEERING COLLEGE SEMBODAI 6489 (Approved By AICTE,Newdelhi Affiliated To ANNA UNIVERSITY::Chennai) CS 62 DIGITAL ELECTRONICS LAB (REGULATION-23) LAB MANUAL DEPARTMENT OF

More information

Unit level 4 Credit value 15. Introduction. Learning Outcomes

Unit level 4 Credit value 15. Introduction. Learning Outcomes Unit 20: Unit code Digital Principles T/615/1494 Unit level 4 Credit value 15 Introduction While the broad field of electronics covers many aspects, it is digital electronics which now has the greatest

More information

PERIPHERAL INTERFACING Rev. 1.0

PERIPHERAL INTERFACING Rev. 1.0 This work is licensed under the Creative Commons Attribution-NonCommercial-Share Alike 2.5 India License. To view a copy of this license, visit http://creativecommons.org/licenses/by-nc-sa/2.5/in/deed.en

More information

CS302 Digital Logic Design Solved Objective Midterm Papers For Preparation of Midterm Exam

CS302 Digital Logic Design Solved Objective Midterm Papers For Preparation of Midterm Exam CS302 Digital Logic Design Solved Objective Midterm Papers For Preparation of Midterm Exam MIDTERM EXAMINATION 2011 (October-November) Q-21 Draw function table of a half adder circuit? (2) Answer: - Page

More information

Module -18 Flip flops

Module -18 Flip flops 1 Module -18 Flip flops 1. Introduction 2. Comparison of latches and flip flops. 3. Clock the trigger signal 4. Flip flops 4.1. Level triggered flip flops SR, D and JK flip flops 4.2. Edge triggered flip

More information

Combinational Logic Circuits. Combinational Logic

Combinational Logic Circuits. Combinational Logic Combinational Logic Circuits The outputs of Combinational Logic Circuits are only determined by the logical function of their current input state, logic 0 or logic 1, at any given instant in time. The

More information

Electronics. Digital Electronics

Electronics. Digital Electronics Electronics Digital Electronics Introduction Unlike a linear, or analogue circuit which contains signals that are constantly changing from one value to another, such as amplitude or frequency, digital

More information

R.B.V.R.R. WOMEN S COLLEGE (AUTONOMOUS) Narayanaguda, Hyderabad. ELECTRONIC PRINCIPLES AND APPLICATIONS

R.B.V.R.R. WOMEN S COLLEGE (AUTONOMOUS) Narayanaguda, Hyderabad. ELECTRONIC PRINCIPLES AND APPLICATIONS R.B.V.R.R. WOMEN S COLLEGE (AUTONOMOUS) Narayanaguda, Hyderabad. DEPARTMENT OF PHYSICS QUESTION BANK FOR SEMESTER V PHYSICS PAPER VI (A) ELECTRONIC PRINCIPLES AND APPLICATIONS UNIT I: SEMICONDUCTOR DEVICES

More information

Winter 14 EXAMINATION Subject Code: Model Answer P a g e 1/28

Winter 14 EXAMINATION Subject Code: Model Answer P a g e 1/28 Subject Code: 17333 Model Answer P a g e 1/28 Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model

More information

CS302 - Digital Logic Design Glossary By

CS302 - Digital Logic Design Glossary By CS302 - Digital Logic Design Glossary By ABEL : Advanced Boolean Expression Language; a software compiler language for SPLD programming; a type of hardware description language (HDL) Adder : A digital

More information

INTERFACING ADC/DAC. DAC INTERFACE SECTION: DAC 0800 is a monolithic, high speed, current output D/A Converter. Its unique features are:

INTERFACING ADC/DAC. DAC INTERFACE SECTION: DAC 0800 is a monolithic, high speed, current output D/A Converter. Its unique features are: INTERFACING ADC/DAC AIM: a) To interface the DAC unit to microprocessor and to write an ALP to convert the given digital word to analog voltage and also to generate sawtooth, triangular and sinewaves.

More information

arxiv:physics/ v1 [physics.ed-ph] 19 Oct 2004

arxiv:physics/ v1 [physics.ed-ph] 19 Oct 2004 I. SIMPLE 8085 µp COMPATIBLE I/O CARD with Arti Dwivedi Abstract A simple interfacing project with the 8085-microprocessor kits available in under graduate college labs has been discussed. The interface

More information

3.1 There are three basic logic functions from which all circuits can be designed: NOT (invert), OR, and

3.1 There are three basic logic functions from which all circuits can be designed: NOT (invert), OR, and EE 2449 Experiment 3 Jack Levine and Nancy Warter-Perez, Revised 6/12/17 CALIFORNIA STATE UNIVERSITY LOS ANGELES Department of Electrical and Computer Engineering EE-2449 Digital Logic Lab EXPERIMENT 3

More information

Gates and and Circuits

Gates and and Circuits Chapter 4 Gates and Circuits Chapter Goals Identify the basic gates and describe the behavior of each Describe how gates are implemented using transistors Combine basic gates into circuits Describe the

More information

MICROPROCESSORS AND MICROCONTROLLER 1

MICROPROCESSORS AND MICROCONTROLLER 1 MICROPROCESSORS AND MICROCONTROLLER 1 Microprocessor Applications Data Acquisition System Data acquisition is the process of sampling signals that measure real world physical conditions ( such as temperature,

More information

DIGITAL ELECTRONICS QUESTION BANK

DIGITAL ELECTRONICS QUESTION BANK DIGITAL ELECTRONICS QUESTION BANK Section A: 1. Which of the following are analog quantities, and which are digital? (a) Number of atoms in a simple of material (b) Altitude of an aircraft (c) Pressure

More information

Laboratory Manual CS (P) Digital Systems Lab

Laboratory Manual CS (P) Digital Systems Lab Laboratory Manual CS 09 408 (P) Digital Systems Lab INDEX CYCLE I A. Familiarization of digital ICs and digital IC trainer kit 1 Verification of truth tables B. Study of combinational circuits 2. Verification

More information

1. The decimal number 62 is represented in hexadecimal (base 16) and binary (base 2) respectively as

1. The decimal number 62 is represented in hexadecimal (base 16) and binary (base 2) respectively as BioE 1310 - Review 5 - Digital 1/16/2017 Instructions: On the Answer Sheet, enter your 2-digit ID number (with a leading 0 if needed) in the boxes of the ID section. Fill in the corresponding numbered

More information

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified) SUMMER-16 EXAMINATION Model Answer

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified) SUMMER-16 EXAMINATION Model Answer Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model answer and the answer written by candidate

More information

Digital Logic Circuits

Digital Logic Circuits Digital Logic Circuits Let s look at the essential features of digital logic circuits, which are at the heart of digital computers. Learning Objectives Understand the concepts of analog and digital signals

More information

Lecture 02: Digital Logic Review

Lecture 02: Digital Logic Review CENG 3420 Lecture 02: Digital Logic Review Bei Yu byu@cse.cuhk.edu.hk CENG3420 L02 Digital Logic. 1 Spring 2017 Review: Major Components of a Computer CENG3420 L02 Digital Logic. 2 Spring 2017 Review:

More information

Digital Electronics Course Objectives

Digital Electronics Course Objectives Digital Electronics Course Objectives In this course, we learning is reported using Standards Referenced Reporting (SRR). SRR seeks to provide students with grades that are consistent, are accurate, and

More information

Lecture 3: Logic circuit. Combinational circuit and sequential circuit

Lecture 3: Logic circuit. Combinational circuit and sequential circuit Lecture 3: Logic circuit Combinational circuit and sequential circuit TRAN THI HONG HONG@IS.NAIST.JP Content Lecture : Computer organization and performance evaluation metrics Lecture 2: Processor architecture

More information

Computer Systems and Networks. ECPE 170 Jeff Shafer University of the Pacific. Digital Logic

Computer Systems and Networks. ECPE 170 Jeff Shafer University of the Pacific. Digital Logic ECPE 170 Jeff Shafer University of the Pacific Digital Logic 2 Homework Review 2.33(d) Convert 26.625 to IEEE 754 single precision floa9ng point: Format requirements for single precision (32 bit total

More information

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified) MODEL ANSWER

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified) MODEL ANSWER Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model answer and the answer written by candidate

More information

CONTENTS Sl. No. Experiment Page No

CONTENTS Sl. No. Experiment Page No CONTENTS Sl. No. Experiment Page No 1a Given a 4-variable logic expression, simplify it using Entered Variable Map and realize the simplified logic expression using 8:1 multiplexer IC. 2a 3a 4a 5a 6a 1b

More information

COMPUTER ORGANIZATION & ARCHITECTURE DIGITAL LOGIC CSCD211- DEPARTMENT OF COMPUTER SCIENCE, UNIVERSITY OF GHANA

COMPUTER ORGANIZATION & ARCHITECTURE DIGITAL LOGIC CSCD211- DEPARTMENT OF COMPUTER SCIENCE, UNIVERSITY OF GHANA COMPUTER ORGANIZATION & ARCHITECTURE DIGITAL LOGIC LOGIC Logic is a branch of math that tries to look at problems in terms of being either true or false. It will use a set of statements to derive new true

More information

Objective Questions. (a) Light (b) Temperature (c) Sound (d) all of these

Objective Questions. (a) Light (b) Temperature (c) Sound (d) all of these Objective Questions Module 1: Introduction 1. Which of the following is an analog quantity? (a) Light (b) Temperature (c) Sound (d) all of these 2. Which of the following is a digital quantity? (a) Electrical

More information

Logic diagram: a graphical representation of a circuit

Logic diagram: a graphical representation of a circuit LOGIC AND GATES Introduction to Logic (1) Logic diagram: a graphical representation of a circuit Each type of gate is represented by a specific graphical symbol Truth table: defines the function of a gate

More information

1.) If a 3 input NOR gate has eight input possibilities, how many of those possibilities result in a HIGH output? (a.) 1 (b.) 2 (c.) 3 (d.) 7 (e.

1.) If a 3 input NOR gate has eight input possibilities, how many of those possibilities result in a HIGH output? (a.) 1 (b.) 2 (c.) 3 (d.) 7 (e. Name: Multiple Choice 1.) If a 3 input NOR gate has eight input possibilities, how many of those possibilities result in a HIGH output? (a.) 1 (b.) 2 (c.) 3 (d.) 7 (e.) 8 2.) The output of an OR gate with

More information

Gates and Circuits 1

Gates and Circuits 1 1 Gates and Circuits Chapter Goals Identify the basic gates and describe the behavior of each Describe how gates are implemented using transistors Combine basic gates into circuits Describe the behavior

More information

Digital Electronic Concepts

Digital Electronic Concepts Western Technical College 10662137 Digital Electronic Concepts Course Outcome Summary Course Information Description Career Cluster Instructional Level Total Credits 4.00 Total Hours 108.00 This course

More information

Computer Architecture and Organization:

Computer Architecture and Organization: Computer Architecture and Organization: L03: Register transfer and System Bus By: A. H. Abdul Hafez Abdul.hafez@hku.edu.tr, ah.abdulhafez@gmail.com 1 CAO, by Dr. A.H. Abdul Hafez, CE Dept. HKU Outlines

More information

In this lecture: Lecture 8: ROM & Programmable Logic Devices

In this lecture: Lecture 8: ROM & Programmable Logic Devices In this lecture: Lecture 8: ROM Programmable Logic Devices Dr Pete Sedcole Department of EE Engineering Imperial College London http://caseeicacuk/~nps/ (Floyd, 3 5, 3) (Tocci 2, 24, 25, 27, 28, 3 34)

More information

Appendix B Page 1 54/74 FAMILIES OF COMPATIBLE TTL CIRCUITS PIN ASSIGNMENT (TOP VIEWS)

Appendix B Page 1 54/74 FAMILIES OF COMPATIBLE TTL CIRCUITS PIN ASSIGNMENT (TOP VIEWS) Appendix B Page 1 54/74 FAMILIES OF COMPATIBLE TTL CIRCUITS PIN ASSIGNMENT (TOP VIEWS) See page 3 See page 3 See page 7 See page 14 See page 9 See page 16 See page 10 TEXAS INSTRUMENTS LTD have given their

More information

ELECTRONIC CIRCUITS. Time: Three Hours Maximum Marks: 100

ELECTRONIC CIRCUITS. Time: Three Hours Maximum Marks: 100 EC 40 MODEL TEST PAPER - 1 ELECTRONIC CIRCUITS Time: Three Hours Maximum Marks: 100 Answer five questions, taking ANY TWO from Group A, any two from Group B and all from Group C. All parts of a question

More information

JEFFERSON COLLEGE COURSE SYLLABUS ETC255 INTRODUCTION TO DIGITAL CIRCUITS. 6 Credit Hours. Prepared by: Dennis Eimer

JEFFERSON COLLEGE COURSE SYLLABUS ETC255 INTRODUCTION TO DIGITAL CIRCUITS. 6 Credit Hours. Prepared by: Dennis Eimer JEFFERSON COLLEGE COURSE SYLLABUS ETC255 INTRODUCTION TO DIGITAL CIRCUITS 6 Credit Hours Prepared by: Dennis Eimer Revised Date: August, 2007 By Dennis Eimer Division of Technology Dr. John Keck, Dean

More information

logic system Outputs The addition of feedback means that the state of the circuit may change with time; it is sequential. logic system Outputs

logic system Outputs The addition of feedback means that the state of the circuit may change with time; it is sequential. logic system Outputs Sequential Logic The combinational logic circuits we ve looked at so far, whether they be simple gates or more complex circuits have clearly separated inputs and outputs. A change in the input produces

More information

DIGITAL CIRCUITS AND SYSTEMS ASSIGNMENTS 1 SOLUTIONS

DIGITAL CIRCUITS AND SYSTEMS ASSIGNMENTS 1 SOLUTIONS DIGITAL CIRCUITS AND SYSTEMS ASSIGNMENTS 1 SOLUTIONS 1. Analog signal varies continuously between two amplitudes over the given interval of time. Between these limits of amplitude and time, the signal

More information

ELECTROVATE. Electromania Problem Statement Discussion

ELECTROVATE. Electromania Problem Statement Discussion ELECTROVATE Electromania Problem Statement Discussion An Competition Basic Circuiting What is Electromania? Innovation Debugging Lets Revise the Basics Electronics Digital Analog Digital Electronics Similar

More information

Digital Electronics. A. I can list five basic safety rules for electronics. B. I can properly display large and small numbers in proper notation,

Digital Electronics. A. I can list five basic safety rules for electronics. B. I can properly display large and small numbers in proper notation, St. Michael Albertville High School Teacher: Scott Danielson September 2016 Content Skills Learning Targets Standards Assessment Resources & Technology CEQ: WHAT MAKES DIGITAL ELECTRONICS SO IMPORTANT

More information

Dr. Nicola Nicolici COE/EE2DI4 Midterm Test #1 Oct 18, 2006

Dr. Nicola Nicolici COE/EE2DI4 Midterm Test #1 Oct 18, 2006 COE/EE2DI4 Midterm Test #1 Fall 2006 Page 1 Dr. Nicola Nicolici COE/EE2DI4 Midterm Test #1 Oct 18, 2006 Instructions: This examination paper includes 10 pages and 20 multiple-choice questions starting

More information

Electronics Eingineering

Electronics Eingineering Electronics Eingineering 1. The output of a two-input gate is 0 if and only if its inputs are unequal. It is true for (A) XOR gate (B) NAND gate (C) NOR gate (D) XNOR gate 2. In K-map simplification, a

More information

COMBINATIONAL and SEQUENTIAL LOGIC CIRCUITS Hardware implementation and software design

COMBINATIONAL and SEQUENTIAL LOGIC CIRCUITS Hardware implementation and software design PH-315 COMINATIONAL and SEUENTIAL LOGIC CIRCUITS Hardware implementation and software design A La Rosa I PURPOSE: To familiarize with combinational and sequential logic circuits Combinational circuits

More information

V-LAB COMPUTER INTERFACED TRAINING SET

V-LAB COMPUTER INTERFACED TRAINING SET is an important tool for Vocational Education with it s built-in measurement units and signal generators that are interfaced with computer for control and measurement. is a device for real-time measurement

More information

0 0 Q Q Q Q

0 0 Q Q Q Q Question 1) Flip Flops and Counters (15 points) a) Fill in the truth table for a JK flip flop. Use Q or Q to denote the previous value of Q and Q. (6 pts) J K CLK Q Q Q Q 1 1 1 1 1 1 Q Q b) In Figure 1a

More information

B.C.A 2017 DIGITAL ELECTRONICS BCA104T MODULE SPECIFICATION SHEET. Course Outline

B.C.A 2017 DIGITAL ELECTRONICS BCA104T MODULE SPECIFICATION SHEET. Course Outline Course Outline B.C.A 2017 DIGITAL ELECTRONICS BCA104T MODULE SPECIFICATION SHEET The purpose of the course is to teach principles of digital electronics. This course covers varieties of topics including

More information

Course Outline Cover Page

Course Outline Cover Page College of Micronesia FSM P.O. Box 159 Kolonia, Pohnpei Course Outline Cover Page Digital Electronics I VEE 135 Course Title Department and Number Course Description: This course provides the students

More information

4-bit counter circa bit counter circa 1990

4-bit counter circa bit counter circa 1990 Digital Logic 4-bit counter circa 1960 8-bit counter circa 1990 Logic gates Operates on logical values (TRUE = 1, FALSE = 0) NOT AND OR XOR 0-1 1-0 0 0 0 1 0 0 0 1 0 1 1 1 0 0 0 1 0 1 0 1 1 1 1 1 0 0 0

More information

Practical Workbook Logic Design & Switching Theory

Practical Workbook Logic Design & Switching Theory Practical Workbook Logic Design & Switching Theory Name : Year : Batch : Roll No : Department: Second Edition Fall 2017-18 Dept. of Computer & Information Systems Engineering NED University of Engineering

More information

4-bit counter circa bit counter circa 1990

4-bit counter circa bit counter circa 1990 Digital Logic 4-bit counter circa 1960 8-bit counter circa 1990 Logic gates Operates on logical values (TRUE = 1, FALSE = 0) NOT AND OR XOR 0-1 1-0 0 0 0 1 0 0 0 1 0 1 1 1 0 0 0 1 0 1 0 1 1 1 1 1 0 0 0

More information

Brought to you by. Priti Srinivas Sajja. PS01CMCA02 Course Content. Tutorial Practice Material. Acknowldgement References. Website pritisajja.

Brought to you by. Priti Srinivas Sajja. PS01CMCA02 Course Content. Tutorial Practice Material. Acknowldgement References. Website pritisajja. Brought to you by Priti Srinivas Sajja PS01CMCA02 Course Content Tutorial Practice Material Acknowldgement References Website pritisajja.info Multiplexer Means many into one, also called data selector

More information

ELECTRONICS AND COMMUNICATION ENGINEERING

ELECTRONICS AND COMMUNICATION ENGINEERING ELECTRONICS AND COMMUNICATION ENGINEERING Q1. A transmission line of characteristic impedance 50 Ω is terminated by a 50 Ω load. When excited by a sinusoidal voltage source at 10 GHz the phase difference

More information

PROPOSED SCHEME OF COURSE WORK

PROPOSED SCHEME OF COURSE WORK PROPOSED SCHEME OF COURSE WORK Course Details: Course Title : LINEAR AND DIGITAL IC APPLICATIONS Course Code : 13EC1146 L T P C : 4 0 0 3 Program: : B.Tech. Specialization: : Electrical and Electronics

More information

Preface to Third Edition Deep Submicron Digital IC Design p. 1 Introduction p. 1 Brief History of IC Industry p. 3 Review of Digital Logic Gate

Preface to Third Edition Deep Submicron Digital IC Design p. 1 Introduction p. 1 Brief History of IC Industry p. 3 Review of Digital Logic Gate Preface to Third Edition p. xiii Deep Submicron Digital IC Design p. 1 Introduction p. 1 Brief History of IC Industry p. 3 Review of Digital Logic Gate Design p. 6 Basic Logic Functions p. 6 Implementation

More information

ECE Branch GATE Paper 2002 SECTION A (75 MARKS )

ECE Branch GATE Paper 2002 SECTION A (75 MARKS ) SECTION A (75 MARKS ). This question consists of TWENTY FIVE sub-question (..25) of ONE mark each. For each of these sub-questions, four possible alternatives (A, B, C and D) are given, out of which only

More information

EXPERIMENT 12: DIGITAL LOGIC CIRCUITS

EXPERIMENT 12: DIGITAL LOGIC CIRCUITS EXPERIMENT 12: DIGITAL LOGIC CIRCUITS The purpose of this experiment is to gain some experience in the use of digital logic circuits. These circuits are used extensively in computers and all types of electronic

More information

Introduction. BME208 Logic Circuits Yalçın İŞLER

Introduction. BME208 Logic Circuits Yalçın İŞLER Introduction BME208 Logic Circuits Yalçın İŞLER islerya@yahoo.com http://me.islerya.com 1 Lecture Three hours a week (three credits) No other sections, please register this section Tuesday: 09:30 12:15

More information

Preface... iii. Chapter 1: Diodes and Circuits... 1

Preface... iii. Chapter 1: Diodes and Circuits... 1 Table of Contents Preface... iii Chapter 1: Diodes and Circuits... 1 1.1 Introduction... 1 1.2 Structure of an Atom... 2 1.3 Classification of Solid Materials on the Basis of Conductivity... 2 1.4 Atomic

More information

III/IV B.Tech (Regular) DEGREE EXAMINATION-Schema. Answer ONE question from each unit.

III/IV B.Tech (Regular) DEGREE EXAMINATION-Schema. Answer ONE question from each unit. April, 2018 Sixth Semester Time: Three Hours Answer Question No1 compulsorily Answer ONE question from each unit 1 Answer all questions a Draw the symbol of Zener diode III/IV BTech (Regular) DEGREE EXAMINATION-Schema

More information

Digital. Design. R. Ananda Natarajan B C D

Digital. Design. R. Ananda Natarajan B C D Digital E A B C D 0 1 2 3 4 5 6 Design 7 8 9 10 11 12 13 14 15 Y R. Ananda Natarajan Digital Design Digital Design R. ANANDA NATARAJAN Professor Department of Electronics and Instrumentation Engineering

More information

Function Table of an Odd-Parity Generator Circuit

Function Table of an Odd-Parity Generator Circuit Implementation of an Odd-Parity Generator Circuit The first step in implementing any circuit is to represent its operation in terms of a Truth or Function table. The function table for an 8-bit data as

More information

2 Logic Gates THE INVERTER. A logic gate is an electronic circuit which makes logic decisions. It has one output and one or more inputs.

2 Logic Gates THE INVERTER. A logic gate is an electronic circuit which makes logic decisions. It has one output and one or more inputs. 2 Logic Gates A logic gate is an electronic circuit which makes logic decisions. It has one output and one or more inputs. THE INVERTER The inverter (NOT circuit) performs the operation called inversion

More information

DELD MODEL ANSWER DEC 2018

DELD MODEL ANSWER DEC 2018 2018 DELD MODEL ANSWER DEC 2018 Q 1. a ) How will you implement Full adder using half-adder? Explain the circuit diagram. [6] An adder is a digital logic circuit in electronics that implements addition

More information

Computer Architecture (TT 2012)

Computer Architecture (TT 2012) Computer Architecture (TT 212) Laws of Attraction aniel Kroening Oxford University, Computer Science epartment Version 1., 212 . Kroening: Computer Architecture (TT 212) 2 . Kroening: Computer Architecture

More information

I.E.S-(Conv.)-2007 ELECTRONICS AND TELECOMMUNICATION ENGINEERING PAPER - II Time Allowed: 3 hours Maximum Marks : 200 Candidates should attempt Question No. 1 which is compulsory and FOUR more questions

More information

Sr. No. Instrument Specifications. TTL (Transistor-Transistor Logic) based on bipolar junction transistors

Sr. No. Instrument Specifications. TTL (Transistor-Transistor Logic) based on bipolar junction transistors MIT College of Engineering, Pune. Department of Electronics & Telecommunication (Electronics Lab) EXPERIMENT NO 01 TITLE OF THE EXPERIMENT: Verify four voltage and current parameters for TTL and CMOS (IC

More information

Course Overview. Course Overview

Course Overview. Course Overview Course Overview Where does this course fit into the Electrical Engineering curriculum? Page 5 Course Overview Where does this course fit into the Computer Engineering curriculum? Page 6 3 Course Content

More information

Digital Applications (CETT 1415) Credit: 4 semester credit hours (3 hours lecture, 4 hours lab) Prerequisite: CETT 1403 & CETT 1405

Digital Applications (CETT 1415) Credit: 4 semester credit hours (3 hours lecture, 4 hours lab) Prerequisite: CETT 1403 & CETT 1405 Digital Applications () Credit: 4 semester credit hours (3 hours lecture, 4 hours lab) Prerequisite: CETT 1403 & CETT 1405 Course Description This course covers digital techniques and numbering systems,

More information

Electronic Components And Circuit Analysis

Electronic Components And Circuit Analysis Theory /Practical Theory Semester /Annual Semester Semester No. I II Swami Ramanand Teerth Marathwada University, Nanded Syllabus B. Sc. First Year ELECTRONICS Semester System (MCQ Pattern) (To Be Implemented

More information

ELECTRICAL ELECTRONICS ENGINEERING

ELECTRICAL ELECTRONICS ENGINEERING ELECTRICAL AND ELECTRONICS ENGINEERING (Strictly as per latest RGPV Syllabus) SANJEEV GUPTA B.E., M.B.A. DHANPAT RAI PUBLICATIONS (P) LTD. 22, ANSARI ROAD, DARYAGANJ, NEW DELHI-110002 Ph.: 2327 4073, 2324

More information

Electronic Devices & Circuit and Digital Electronics

Electronic Devices & Circuit and Digital Electronics QUESTION BANK Electronic Devices & Circuit and Digital Electronics 1. Consider the following four statement i) In the 2 s complement representation, negative numbers are stored in sign magnitude form ii)

More information

DIGITAL ELECTRONICS. Methods & diagrams : 1 Graph plotting : - Tables & analysis : - Questions & discussion : 6 Performance : 3

DIGITAL ELECTRONICS. Methods & diagrams : 1 Graph plotting : - Tables & analysis : - Questions & discussion : 6 Performance : 3 DIGITAL ELECTRONICS Marking scheme : Methods & diagrams : 1 Graph plotting : - Tables & analysis : - Questions & discussion : 6 Performance : 3 Aim: This experiment will investigate the function of the

More information

6.111 Lecture # 19. Controlling Position. Some General Features of Servos: Servomechanisms are of this form:

6.111 Lecture # 19. Controlling Position. Some General Features of Servos: Servomechanisms are of this form: 6.111 Lecture # 19 Controlling Position Servomechanisms are of this form: Some General Features of Servos: They are feedback circuits Natural frequencies are 'zeros' of 1+G(s)H(s) System is unstable if

More information

I.E.S-(Conv.)-2005 ELECTRONICS AND TELECOMMUNICATION ENGINEERING PAPER - II Time Allowed: 3 hours Maximum Marks : 200 Candidates should attempt Question No. 1 which is compulsory and FOUR more questions

More information

the elektor datasheet collection

the elektor datasheet collection the elektor datasheet collection LM117 LM136 LM137 L200 LM236 LM317 1,2...37 V/1,5 A Shunt regulator 2,5 V -1,2...-37 V/1,5 A 2,8...36 V/2 A Shunt regulator 2,5 V 1,2...37 V/1,5 A LM320LZ-12 Fixed voltage

More information

Data Logger by Carsten Kristiansen Napier University. November 2004

Data Logger by Carsten Kristiansen Napier University. November 2004 Data Logger by Carsten Kristiansen Napier University November 2004 Title page Author: Carsten Kristiansen. Napier No: 04007712. Assignment title: Data Logger. Education: Electronic and Computer Engineering.

More information

Computer Architecture: Part II. First Semester 2013 Department of Computer Science Faculty of Science Chiang Mai University

Computer Architecture: Part II. First Semester 2013 Department of Computer Science Faculty of Science Chiang Mai University Computer Architecture: Part II First Semester 2013 Department of Computer Science Faculty of Science Chiang Mai University Outline Combinational Circuits Flips Flops Flops Sequential Circuits 204231: Computer

More information

Xeltronix.

Xeltronix. +91-8048720001 Xeltronix https://www.indiamart.com/xeltronix/ Reckoned firms engaged in manufacturing and supplying a quality array of Electronic Trainer Kits, we ensure that our products would serve the

More information

Thursday 5 June 2014 Afternoon

Thursday 5 June 2014 Afternoon Thursday 5 June 214 Afternoon A2 GCE ELECTRONICS F614/1 Electronic Control Systems *3119659* Candidates answer on the Question Paper. OCR supplied materials: None Other materials required: Scientific calculator

More information

Chapter 3 Digital Logic Structures

Chapter 3 Digital Logic Structures Chapter 3 Digital Logic Structures Transistor: Building Block of Computers Microprocessors contain millions of transistors Intel Pentium 4 (2000): 48 million IBM PowerPC 750FX (2002): 38 million IBM/Apple

More information

Electronic Circuits EE359A

Electronic Circuits EE359A Electronic Circuits EE359A Bruce McNair B206 bmcnair@stevens.edu 201-216-5549 1 Memory and Advanced Digital Circuits - 2 Chapter 11 2 Figure 11.1 (a) Basic latch. (b) The latch with the feedback loop opened.

More information

Serial Addition. Lecture 29 1

Serial Addition. Lecture 29 1 Serial Addition Operations in digital computers are usually done in parallel because that is a faster mode of operation. Serial operations are slower because a datapath operation takes several clock cycles,

More information

Written exam IE1204/5 Digital Design Friday 13/

Written exam IE1204/5 Digital Design Friday 13/ Written exam IE204/5 Digital Design Friday 3/ 207 08.00-2.00 General Information Examiner: Ingo Sander. Teacher: Kista, William Sandqvist tel 08-7904487 Teacher: Valhallavägen, Ahmed Hemani 08-7904469

More information

WINTER 14 EXAMINATION

WINTER 14 EXAMINATION Subject Code:173 WINTER 14 EXAMINATION Model Answer Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The

More information

Classification of Digital Circuits

Classification of Digital Circuits Classification of Digital Circuits Combinational logic circuits. Output depends only on present input. Sequential circuits. Output depends on present input and present state of the circuit. Combinational

More information

SYLLABUS of the course BASIC ELECTRONICS AND DIGITAL SIGNAL PROCESSING. Master in Computer Science, University of Bolzano-Bozen, a.y.

SYLLABUS of the course BASIC ELECTRONICS AND DIGITAL SIGNAL PROCESSING. Master in Computer Science, University of Bolzano-Bozen, a.y. SYLLABUS of the course BASIC ELECTRONICS AND DIGITAL SIGNAL PROCESSING Master in Computer Science, University of Bolzano-Bozen, a.y. 2017-2018 Lecturer: LEONARDO RICCI (last updated on November 27, 2017)

More information

DELD UNIT 3. Question Option A Option B Option C Option D Correct Option A B C

DELD UNIT 3. Question Option A Option B Option C Option D Correct Option A B C Class : S.E.Comp Matoshri College of Engineering and Research Center Nasik Department of Computer Engineering Digital Elecronics and Logic Design (DELD) UNIT - III Subject : DELD Sr. No. Question Option

More information

16 Multiplexers and De-multiplexers using gates and ICs. (74150, 74154)

16 Multiplexers and De-multiplexers using gates and ICs. (74150, 74154) 16 Multiplexers and De-multiplexers using gates and ICs. (74150, 74154) Aim: To design multiplexers and De-multiplexers using gates and ICs. (74150, 74154) Components required: Digital IC Trainer kit,

More information

S-[F] NPW-02 June All Syllabus B.Sc. [Electronics] Ist Year Semester-I & II.doc - 1 -

S-[F] NPW-02 June All Syllabus B.Sc. [Electronics] Ist Year Semester-I & II.doc - 1 - - 1 - - 2 - - 3 - DR. BABASAHEB AMBEDKAR MARATHWADA UNIVERSITY, AURANGABAD SYLLABUS of B.Sc. FIRST & SECOND SEMESTER [ELECTRONICS (OPTIONAL)] {Effective from June- 2013 onwards} - 4 - B.Sc. Electronics

More information