III/IV B.Tech (Regular) DEGREE EXAMINATION-Schema. Answer ONE question from each unit.
|
|
- Juliana Hubbard
- 5 years ago
- Views:
Transcription
1 April, 2018 Sixth Semester Time: Three Hours Answer Question No1 compulsorily Answer ONE question from each unit 1 Answer all questions a Draw the symbol of Zener diode III/IV BTech (Regular) DEGREE EXAMINATION-Schema 14ME605 Mechanical Engineering Electronics and Microprocessors Maximum : 60 Marks (1X12 = 12 Marks) (4X12=48 Marks) (1X12=12 Marks) b c Give the ripple factor of a HWR r=121 Draw the transfer characteristics of N-channel JFET d e Define Op-Amp An operational amplifier is a DC-coupled high-gain electronic voltage amplifier with a differential input and, usually, a single-ended output Draw the comparator circuit using Op-Amp f) Define CMRR The CMRR is defined as the ratio of the powers of the differential gain over the commonmode gain g Convert ( )2 into equivalent Octal system (6712)8
2 h Give the truth table of two input Ex-OR gate A B i) Draw the symbols of universal gates A B j) Write any two examples for arithmetic applications arithmetic mean, which is a quantity that is used in a wide variety of applications, such as science, engineering, medicine, statistics and finance k ) Which interrupt has highest priority in 8085? TRAP has the highest priority l) What is the noof flag bits in 8085? Five 2 a UNIT I Construct an N-channel JFET and explain its drain characteristics Junction Field Effect Transistors (JFETs) are a type of FETs (high input impedance devices) which have three terminals namely, Source (S), Gate (G) and Drain (D) These devices are also called voltage controlled devices as the voltage applied at the gate terminal determines the amount of current flowing in-between the drain and the source terminals FETs can either be composed of pn- or Schottky-junction due to which they are called pn JFETs or Metal Semiconductor FETs (MESFETs), respectively Further, the pn JFETs can be classified into two types viz, (i) n-channel JFET and (ii) p-channel JFET, depending on whether the current flow is due to electrons or holes, respectively The schematic of an n-channel JFET along with its circuit symbol is shown in Figure 1 From the layered structure shown by Figure 1a, it is clear that the n-channel JFET has its major portion made of n-type semiconductor The mutually-opposite two faces of this bulk material from the source and the drain terminals Further, it is also seen that there are two relativelysmall p-regions embedded into this substrate which are internally joined together to form the gate terminal Thus, here, the source and the drain terminals are of n-type while the gate is of p-type Due to this, two pn junctions will be formed within the device, whose analysis reveals the mode in which the JFET works Further the circuit symbol shown by Figure 1b has an arrow pointing towards the device at its Gate terminal which indicates the direction in which the current would flow, provided the pn junction is forward biased 8M
3 Working of n-channel JFET In n-channel JFET, the majority charge carriers will be the electrons as the channel formed inbetween the source and the drain is of n-type Further, the working of these devices depends upon the voltages applied at its terminals (Figure 2) Case I: Consider the case where no voltage is applied to the device ie VDS = 0 and VGS = 0 At this state, the device will be idle and no current flows through it ie IDS = 0 Case II: Now consider that the drain terminal of the device is connected to the positive terminal of the battery while its negative is connected to the source ie VDS = +ve However let the gate terminal remain at unbiased state, which means VGS = 0 At this instant, the electrons within the n-substrate of the device start moving towards the drain being attracted by the positive force exerted by the battery At the same time, the electron will also be repelled from the source as it is connected to the negative terminal of the voltage supply This results in a net flow of current from drain to source (as per conventional direction) whose value is restricted only by the resistance offered to it by the channel Further, it is seen that the increase in VDS increases the current flowing through the device at an initial state which can be termed to be JFET's Ohmic region However, it is to be noted that the increase in VDS also causes an increase in the width of the depletion regions surrounding the pn junctions This inturn causes the channel width to reduce, thereby increasing its resistance This phenomenon continues till both of the depletion regions grow upto an extent wherein they almost seem to touch each other, a condition referred to as pinch-off The corresponding value of VDS is referred to as pinch-off voltage, VP Nevertheless, even in this case, a narrow channel with high current density exists within the device due to which IDS will get saturated to a level of IDSS as indicated in Figure 2 It is this behaviour of the JFET which causes it to behave as a constant current source Case III: Next, for the set-up described in Case II, let us add the voltage source at the gate terminal such that the gate is negative wrt source ie VGS = -ve while VDS is +ve In this case, the device behaves in a way very-similar to that in Case II, but for a lower value of VDS This means that the pinch-off and the saturation occur quite earlier and are decided by the negative potential applied at the gate ie more negative the VGS, earlier the pinch-off due to which earlier will be the saturation, reducing IDSS (Figure 3) As the phenomenon continues, it is seen that a condition arises wherein the saturation level of the drain-to-source current I DS occurs right for a value of 0 ma This means that there is no current flow through
4 the device and essentially the device will turn OFF The value of VDS for which this happens will be nothing but the negative pinch-off voltage ie VDS = -VP b Find the dynamic resistance of a PN junction diode at a forward current of 2mA Assume VT=25mA 4M 3 (OR) a Explain the input characteristics of an NPN transistor 7M
5 b Derive the expressions for average, RMS currents and ripple factor of a FWR Average value of current, 5M = RMS value of current, = = = =
6 = Full Wave Rectifier: RF= a UNIT II Describe the application of Op-Amp as current to voltage convertor Following figure shows the circuit diagram of the current to voltage converter It uses simple operational amplifier and a feedback resistance The output voltage of operational amplifier is directly proportional to the current given to the inverting terminal of the op amp 6M A current to voltage converter will produce a voltage proportional to the given current This circuit is required if your measuring instrument is capable only of measuring voltages and you need to measure the current output If your instrument or data acquisition module (DAQ) has a input impedance that is several orders larger than the converting resistor, a simple resistor circuit can be used to do the conversion However, if the input impedance of your instrument is low compared to the converting resistor then the following opamp circuit should be used To analyse the current to voltage converter by inspection, if we apply KCL to the node at V- (the inverting input) and let the input current to the inverting input be I-, then Vout V Rf=Ip+I (1) since the output is connected to V- through Rf, the opamp is in a negative feedback configuration Thus V =V+=0 (2) and assuming that I- is 0 and simplifying, Vout=IpRf (3) One example of such an application is using the photodiode sensor to measure light intensity The output of the photodiode sensor is a current which changes proportional to the light intensity Another advantage of the opamp circuit is that the voltage across the photodiode (current source) is kept constant at 0V
7 b Derive an expression for an output voltage of a summing Operational amplifier using inverting amplifier configuration 6M Summing amplifier is a type operational amplifier circuit which can be used to sum signals The sum of the input signal is amplified by a certain factor and made available at the output Any number of input signal can be summed using an opamp The circuit shown below is a three input summing amplifier in the inverting mode Summing amplifier circuit In the circuit, the input signals Va,Vb,Vc are applied to the inverting input of the opamp through input resistors Ra,Rb,Rc Any number of input signals can be applied to the inverting input in the above manner Rf is the feedback resistornon inverting input of the opamp is grounded using resistor Rm RL is the load resistor By applying kirchhoff s current law at not V2 we get, Ia+Ib+Ic = If+Ib Since the input resistance of an ideal opamp is close to infinity and has infinite gain We can neglect Ib & V2 There for Ia+Ib+Ic = If (1) Equation (1) can be rewritten as (Va/Ra) + (Vb/Rb)+ (Vc/Rc) = (V2-Vo)/Rf Neglecting Vo, we get Va/Ra + Vb/Rb + Vc/Rc = -Vo/Rf Vo = -Rf ((Va/Ra)+(Vb/Rb)+(Vc/Rc)) Vo = -((Rf/Ra )Va + (Rf/Rb) Vb + (Rf/Rc) Vc) (2) If resistor Ra, Rb, Rc has same value ie; Ra=Rb=Rc=R, then equation (2) can be written as Vo = -(Rf/R) x (Va + Vb +Vc) (3) If the values of Rf and R are made equal, then the equation becomes, Vo = -(Va + Vb +Vc) 5 a (OR) Draw the circuit of Op-Amp as subtractor and find the expression for output The subtraction of the two input voltages is possible with the help of subtractor The subtractor using op-amp is shown in figure below It is also called as difference amplifier 6M
8 The input signals applied are V1 and V2Let us assume that the non-inverting terminal is at potential V Due to virtual ground concept, the inverting terminal appears to be at the same potential V as shown in the circuit diagram Let the current flowing through resistance R1 and R2 are I1 and I2 respectively Since input current to the op-amp is zero, the two currents flows through the resistance Rf as shown in circuit diagram above The current I2 is given as From the above equation voltage V can be calculated as The current I1 is given as Simplify the equation,
9 Substituting the voltage V from the equation we get, If R1=R2 If R1=R2=Rf Thus at the output we get subtraction of the two input voltages The subtractor circuits are used to solve various mathematical equations b Design an adder circuit using an Op-Amp to get the output expression as Vout= -(V1+5V2+25V3) Where V1,V2,V3 are the inputs Given that Rf=50 KΩ 6M The inverting operational amplifier that the inverting amplifier has a single input voltage, (Vin) applied to the inverting input terminal If we add more input resistors to the input, each equal in value to the original input resistor, (Rin) we end up with another operational amplifier circuit called a Summing Amplifier, summing inverter or even a voltage adder circuit as shown below In this simple summing amplifier circuit, the output voltage, ( Vout ) now becomes proportional to the sum of the input voltages, V1, V2, V3, etc Then we can modify the original equation for the inverting amplifier to take account of these new inputs thus:
10 However, if all the input impedances, ( Rin ) are equal in value, we can simplify the above equation to give an output voltage of: Summing Amplifier Equation 6 a UNIT III Show that the Excess-3 code is a self complimenting code with an example 6M 0 is complement of 15, 1 is complement of 14, 2 is complement of 13 b What are the universal gates? Implement all basic gates using universal gates 6M Universal gates - NAND and NOR NAND gate is a universal gate since it can implement the AND, OR and NOT functions
11 Using only NOR Gate NOR gate is a universal gate since it can implement the AND, OR and NOT functions 7 (OR) a Design a full adder using two half adders 4M
12 b Briefly describe R-S, J-K, D and T- type flip-flops 8M
13
14 8 a UNIT IV Explain the difference between JMP and CALL A JMP instruction permanently changes the program counter A CALL instruction leaves information on the stack so that the original program execution sequence can be resumed A jump just transfers control to a new place in memory, and continues from there as if nothing unusual had happened - the program counter is simply loaded with a new value A call first saves the processor state on the stack, including the current program counter, then jumps to a new place in memory If that code executes a return, then the processor state is restored from the stack, including the program counter, meaning that the processor jumps back to the place it was at when it made the call (or just past it, in fact) This allows us to implement subroutines (known as functions or procedures in higher level languages) which is a vital necessity in practical programming 4M b Write an assembly language program for finding the largest number in a series Program 8M MEMORY LABEL MNEMONIC HEX COMMENT CODE 4400 LXI H, Load the array size to the HL pair MOV B,M 46 Copy the array size to B register 4404 INX H 23 Increment the memory 4405 MOV A,M 7E Copy the first data to the Accumulator 4406 DCR B 05 Decrement the Array size by LOOP INX H 23 Increment the memory 4408 CMP M BE Compare accumulator content and memory 4409 JNC AHEAD D2 Jump on no carry to label 440A 0D AHEAD 440B C MOV A,M 7E Copy the memory content to the accumulator 440D AHEAD DCR B 05 Decrement register B by 1 440E JNZ LOOP C2 440F 07 Jump on non-zero to label LOOP 4411 STA HLT 76 Program ends Store accumulator content to 4300 Algorithm 1) Load the address of the first element of the array in HL pair 2) Copy the count to register B 3) Increment the pointer 4) Get the first data in accumulator 5) Decrement the count 6) Increment the pointer
15 7) Compare the content of memory addressed by HL pair with that of Accumulator] 8) If Carry = 0, go to step 10 or if Carry = 1 go to step 9 9) Copy the content of the memory addressed by HL to Accumulator 10) Decrement the count 11) Check for Zero of the count If Zero Flag (ZF) = 0, go to step 6, or if ZF = 1 go to next step 12) Store the largest data in memory 13) Terminate the program Observation Input at 4200 : 05H Array Size 4201 : 0AH 4202 : F1H 4203 : 1FH 4204 : 26H 4205 : FEH Output at 4300 : FEH 9 a (OR) Write an assembly language program to convert a BCD number into its equivalent decimal form 8M
16 b What are the operations performed by ALU of 8085 ALU performs Athematic and logical operations 1 Addition 2 Subtraction 3 AND 4 OR 5 NOT 6 XOR 4M Scheme of Evaluation 1 a) Symbol of zener diode b) 121 c) transfer characteristics graph d) forward current gain in common emitter configuration e) comparator circuit f) Ratio of common mode gain to the differential mode gain g) (6712)8 h) Truth table of Ex-OR gate i) Symbols of NAND and NOR gates j) ADD, SUB, MUL, DIV any two k) TRAP l) Five 2 a) Schematic of construction M Explanation M Graph M b) Formula for dynamic resistance M Answer M 3 a) circuit diagram M Characteristic plot M Explanation m b) Circuit diagram M Average, RMS and ripple factor M 4 a) Circuit diagram M Explanation M b) Circuit diagram M Explanation M 5 a) Circuit diagram M Derivation of output expression M b) Design equations M Circuit diagram M 6 a) Excess-3 code for an example M Compliment of the example M Proof M b) Universal gates M implementation of OR, AND, EX-OR, EX-NOR, NOT M 7 a) Full adder truth table M
17 Logic diagram using half adders M b) Four flip-flop diagrams M Truth tables M 8 a) Syntax for JMP and CALL instructions M Differences M b) Assembly language program M 9 a) Assembly language program M b) Functions of ALU M
EXPERIMENT NO -9 TRANSITOR COMMON -BASE CONFIGURATION CHARACTERISTICS
Contents EXPERIMENT NO -9 TRANSITOR COMMON -BASE CONFIGURATION CHARACTERISTICS... 3 EXPERIMENT NO -10. FET CHARACTERISTICS... 8 Experiment # 11 Non-inverting amplifier... 13 Experiment #11(B) Inverting
More informationR.B.V.R.R. WOMEN S COLLEGE (AUTONOMOUS) Narayanaguda, Hyderabad. ELECTRONIC PRINCIPLES AND APPLICATIONS
R.B.V.R.R. WOMEN S COLLEGE (AUTONOMOUS) Narayanaguda, Hyderabad. DEPARTMENT OF PHYSICS QUESTION BANK FOR SEMESTER V PHYSICS PAPER VI (A) ELECTRONIC PRINCIPLES AND APPLICATIONS UNIT I: SEMICONDUCTOR DEVICES
More informationPESIT BANGALORE SOUTH CAMPUS BASIC ELECTRONICS
PESIT BANGALORE SOUTH CAMPUS QUESTION BANK BASIC ELECTRONICS Sub Code: 17ELN15 / 17ELN25 IA Marks: 20 Hrs/ Week: 04 Exam Marks: 80 Total Hours: 50 Exam Hours: 03 Name of Faculty: Mr. Udoshi Basavaraj Module
More informationUNIT 3: FIELD EFFECT TRANSISTORS
FIELD EFFECT TRANSISTOR: UNIT 3: FIELD EFFECT TRANSISTORS The field effect transistor is a semiconductor device, which depends for its operation on the control of current by an electric field. There are
More informationBasic Electronics SYLLABUS BASIC ELECTRONICS. Subject Code : 15ELN15/25 IA Marks : 20. Hrs/Week : 04 Exam Hrs. : 03. Total Hrs. : 50 Exam Marks : 80
SYLLABUS BASIC ELECTRONICS Subject Code : /25 IA Marks : 20 Hrs/Week : 04 Exam Hrs. : 03 Total Hrs. : 50 Exam Marks : 80 Course objectives: The course objective is to make students of all the branches
More informationElectronic Circuits II - Revision
Electronic Circuits II - Revision -1 / 16 - T & F # 1 A bypass capacitor in a CE amplifier decreases the voltage gain. 2 If RC in a CE amplifier is increased, the voltage gain is reduced. 3 4 5 The load
More informationObjective: To study and verify the functionality of a) PN junction diode in forward bias. Sl.No. Name Quantity Name Quantity 1 Diode
Experiment No: 1 Diode Characteristics Objective: To study and verify the functionality of a) PN junction diode in forward bias Components/ Equipments Required: b) Point-Contact diode in reverse bias Components
More informationQ1. Explain the construction and principle of operation of N-Channel and P-Channel Junction Field Effect Transistor (JFET).
Q. Explain the construction and principle of operation of N-Channel and P-Channel Junction Field Effect Transistor (JFET). Answer: N-Channel Junction Field Effect Transistor (JFET) Construction: Drain(D)
More informationPESIT Bangalore South Campus
INTERNAL ASSESSMENT TEST 2 Date : 19/09/2016 Max Marks: 40 Subject & Code : Analog and Digital Electronics (15CS32) Section: III A and B Name of faculty: Deepti.C Time : 8:30 am-10:00 am Note: Answer five
More informationVeer Narmad South Gujarat University, Surat
Unit I: Passive circuit elements (With effect from June 2017) Syllabus for: F Y B Sc (Electronics) Semester- 1 PAPER I: Basic Electrical Circuits Resistors, resistor types, power ratings, resistor colour
More informationFIELD EFFECT TRANSISTOR (FET) 1. JUNCTION FIELD EFFECT TRANSISTOR (JFET)
FIELD EFFECT TRANSISTOR (FET) The field-effect transistor (FET) is a three-terminal device used for a variety of applications that match, to a large extent, those of the BJT transistor. Although there
More informationSyllabus for: Electronics for F Y B Sc (Electronics) Semester- 1 (With effect from June 2014) PAPER I: Basic Electrical Circuits
Unit I: Passive Devices Syllabus for: Electronics for F Y B Sc (Electronics) Semester- 1 (With effect from June 2014) PAPER I: Basic Electrical Circuits Resistors, Fixed resistors & variable resistors,
More information4.2.2 Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
4.2.2 Metal Oxide Semiconductor Field Effect Transistor (MOSFET) The Metal Oxide Semitonductor Field Effect Transistor (MOSFET) has two modes of operation, the depletion mode, and the enhancement mode.
More informationFIELD EFFECT TRANSISTORS
FIELD EFFECT TRANSISTORS Module 5 Introduction Symbol Features: 1. Voltage is applied across gate and source terminals. This voltage controls the drain current. Hence FET is a voltage controlled device.
More informationLesson number one. Operational Amplifier Basics
What About Lesson number one Operational Amplifier Basics As well as resistors and capacitors, Operational Amplifiers, or Op-amps as they are more commonly called, are one of the basic building blocks
More informationDepletion-mode operation ( 공핍형 ): Using an input gate voltage to effectively decrease the channel size of an FET
Ch. 13 MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor : I D D-mode E-mode V g The gate oxide is made of dielectric SiO 2 with e = 3.9 Depletion-mode operation ( 공핍형 ): Using an input gate voltage
More informationEE LINEAR INTEGRATED CIRCUITS & APPLICATIONS
UNITII CHARACTERISTICS OF OPAMP 1. What is an opamp? List its functions. The opamp is a multi terminal device, which internally is quite complex. It is a direct coupled high gain amplifier consisting of
More informationELECTRONICS ADVANCED SUPPLEMENTARY LEVEL
ELECTRONICS ADVANCED SUPPLEMENTARY LEVEL AIMS The general aims of the subject are : 1. to foster an interest in and an enjoyment of electronics as a practical and intellectual discipline; 2. to develop
More informationField Effect Transistors
Field Effect Transistors LECTURE NO. - 41 Field Effect Transistors www.mycsvtunotes.in JFET MOSFET CMOS Field Effect transistors - FETs First, why are we using still another transistor? BJTs had a small
More informationDifference between BJTs and FETs. Junction Field Effect Transistors (JFET)
Difference between BJTs and FETs Transistors can be categorized according to their structure, and two of the more commonly known transistor structures, are the BJT and FET. The comparison between BJTs
More informationEE 330 Lecture 27. Bipolar Processes. Special Bipolar Processes. Comparison of MOS and Bipolar Proces JFET. Thyristors SCR TRIAC
EE 330 Lecture 27 Bipolar Processes Comparison of MOS and Bipolar Proces JFET Special Bipolar Processes Thyristors SCR TRIAC Review from a Previous Lecture B C E E C vertical npn B A-A Section B C E C
More informationDEPARTMENT OF ELECTRONICS
DEPARTMENT OF ELECTRONICS Academic Planner for odd Semesters Semester : I Subject : Electronics(ELT1). Course: B.Sc. (PME) Introduction to Number systems B Construction and types, working Review of P type
More informationUNIT-1 Bipolar Junction Transistors. Text Book:, Microelectronic Circuits 6 ed., by Sedra and Smith, Oxford Press
UNIT-1 Bipolar Junction Transistors Text Book:, Microelectronic Circuits 6 ed., by Sedra and Smith, Oxford Press Figure 6.1 A simplified structure of the npn transistor. Microelectronic Circuits, Sixth
More informationOBJECTIVE TYPE QUESTIONS
OBJECTIVE TYPE QUESTIONS Q.1 The breakdown mechanism in a lightly doped p-n junction under reverse biased condition is called (A) avalanche breakdown. (B) zener breakdown. (C) breakdown by tunnelling.
More informationFederal Urdu University of Arts, Science & Technology Islamabad Pakistan THIRD SEMESTER ELECTRONICS - II BASIC ELECTRICAL & ELECTRONICS LAB
THIRD SEMESTER ELECTRONICS - II BASIC ELECTRICAL & ELECTRONICS LAB DEPARTMENT OF ELECTRICAL ENGINEERING Prepared By: Checked By: Approved By: Engr. Saqib Riaz Engr. M.Nasim Khan Dr.Noman Jafri Lecturer
More informationUnit III FET and its Applications. 2 Marks Questions and Answers
Unit III FET and its Applications 2 Marks Questions and Answers 1. Why do you call FET as field effect transistor? The name field effect is derived from the fact that the current is controlled by an electric
More informationAnalog Electronics. Electronic Devices, 9th edition Thomas L. Floyd Pearson Education. Upper Saddle River, NJ, All rights reserved.
Analog Electronics BJT Structure The BJT has three regions called the emitter, base, and collector. Between the regions are junctions as indicated. The base is a thin lightly doped region compared to the
More informationWINTER 14 EXAMINATION
Subject Code:173 WINTER 14 EXAMINATION Model Answer Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The
More informationKOM2751 Analog Electronics :: Dr. Muharrem Mercimek :: YTU - Control and Automation Dept. 1 6 FIELD-EFFECT TRANSISTORS
KOM2751 Analog Electronics :: Dr. Muharrem Mercimek :: YTU - Control and Automation Dept. 1 6 FIELD-EFFECT TRANSISTORS Most of the content is from the textbook: Electronic devices and circuit theory, Robert
More informationUNIT II JFET, MOSFET, SCR & UJT
UNIT II JFET, MOSFET, SCR & UJT JFET JFET as an Amplifier and its Output Characteristics JFET Applications MOSFET Working Principles, SCR Equivalent Circuit and V-I Characteristics. SCR as a Half wave
More informationPage 1. Date 15/02/2013
Page 1 Date 15/02/2013 Final Term Examination Fall 2012 Phy301-Circuit Theory 1. State kirchhoff s current law (KCL) Marks: 2: Answer: (PAGE 42) KIRCHHOF S CURRENT LAW Sum of all the currents entering
More informationTHE JFET. Script. Discuss the JFET and how it differs from the BJT. Describe the basic structure of n-channel and p -channel JFETs
Course: B.Sc. Applied Physical Science (Computer Science) Year & Sem.: Ist Year, Sem - IInd Subject: Electronics Paper No.: V Paper Title: Analog Circuits Lecture No.: 12 Lecture Title: Analog Circuits
More informationApproximate Hybrid Equivalent Circuits. Again, the impedance looking into the output terminals is infinite so that. conductance is zero.
Again, the impedance looking into the output terminals is infinite so that conductance is zero. Hence, the four h-parameters of an ideal transistor connected in CE transistor are The hybrid equivalent
More informationMAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified)
WINTER 2017 EXAMINATION Subject Name: Basic Electronics Model Answer Subject Code: 17321 Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given
More information(Refer Slide Time: 02:05)
Electronics for Analog Signal Processing - I Prof. K. Radhakrishna Rao Department of Electrical Engineering Indian Institute of Technology Madras Lecture 27 Construction of a MOSFET (Refer Slide Time:
More informationShankersinh Vaghela Bapu Institute of Technology INDEX
Shankersinh Vaghela Bapu Institute of Technology Diploma EE Semester III 3330905: ELECTRONIC COMPONENTS AND CIRCUITS INDEX Sr. No. Title Page Date Sign Grade 1 Obtain I-V characteristic of Diode. 2 To
More informationPractical Manual. Deptt.of Electronics &Communication Engg. (ECE)
Practical Manual LAB: BASICS OF ELECTRONICS 1 ST SEM.(CSE/CV) Deptt.of Electronics &Communication Engg. (ECE) RAO PAHALD SINGH GROUP OF INSTITUTIONS BALANA(MOHINDER GARH)12302 Prepared By. Mr.SANDEEP KUMAR
More informationHomework Assignment 07
Homework Assignment 07 Question 1 (Short Takes). 2 points each unless otherwise noted. 1. A single-pole op-amp has an open-loop low-frequency gain of A = 10 5 and an open loop, 3-dB frequency of 4 Hz.
More informationR09. 1.a) State and explain Kirchoff s laws. b) In the circuit given below Figure 1 find the current through 5 Ω resistor. [7+8] FIRSTRANKER.
SET - 1 1.a) State and explain Kirchoff s laws. b) In the circuit given below find the current through 5 Ω resistor. [7+8] 2.a) Find the impedance between terminals A and B in the following circuit ().
More informationLecture 3: Transistors
Lecture 3: Transistors Now that we know about diodes, let s put two of them together, as follows: collector base emitter n p n moderately doped lightly doped, and very thin heavily doped At first glance,
More informationAn electronic unit that behaves like a voltagecontrolled
1 An electronic unit that behaves like a voltagecontrolled voltage source. An active circuit element that amplifies, sums, subtracts, multiply, divide, differentiate or integrates a signal 2 A typical
More informationChapter 5: Field Effect Transistors
Chapter 5: Field Effect Transistors Slide 1 FET FET s (Field Effect Transistors) are much like BJT s (Bipolar Junction Transistors). Similarities: Amplifiers Switching devices Impedance matching circuits
More informationL02 Operational Amplifiers Applications 1
L02 Operational Amplifiers Applications 1 Chapter 9 Ideal Operational Amplifiers and Op-Amp Circuits Donald A. Neamen (2009). Microelectronics: Circuit Analysis and Design, 4th Edition, Mc-Graw-Hill Prepared
More information6. The Operational Amplifier
1 6. The Operational Amplifier This chapter introduces a new component which, although technically nonlinear, can be treated effectively with linear models This element known as the operational amplifier
More informationB.E. SEMESTER III (ELECTRICAL) SUBJECT CODE: X30902 Subject Name: Analog & Digital Electronics
B.E. SEMESTER III (ELECTRICAL) SUBJECT CODE: X30902 Subject Name: Analog & Digital Electronics Sr. No. Date TITLE To From Marks Sign 1 To verify the application of op-amp as an Inverting Amplifier 2 To
More informationScheme & Syllabus. New. B.Sc. Electronics. (Pass /Maintenance) Course. I st to IV th Semester. w.e.f. July Devi Ahilya Vishwavidyalaya,
Scheme & Syllabus of New B.Sc. Electronics (Pass /Maintenance) Course I st to IV th Semester w.e.f. July 2011 Devi Ahilya Vishwavidyalaya, Indore (M.P.) 452001 SEMESTER SYSTEM, 2011-2014 PROPOSED SCHEME
More informationMTLE-6120: Advanced Electronic Properties of Materials. Semiconductor transistors for logic and memory. Reading: Kasap
MTLE-6120: Advanced Electronic Properties of Materials 1 Semiconductor transistors for logic and memory Reading: Kasap 6.6-6.8 Vacuum tube diodes 2 Thermionic emission from cathode Electrons collected
More informationB.C.A 2017 DIGITAL ELECTRONICS BCA104T MODULE SPECIFICATION SHEET. Course Outline
Course Outline B.C.A 2017 DIGITAL ELECTRONICS BCA104T MODULE SPECIFICATION SHEET The purpose of the course is to teach principles of digital electronics. This course covers varieties of topics including
More informationField Effect Transistors
Chapter 5: Field Effect Transistors Slide 1 FET FET s (Field Effect Transistors) are much like BJT s (Bipolar Junction Transistors). Similarities: Amplifiers Switching devices Impedance matching circuits
More informationGeorgia Institute of Technology School of Electrical and Computer Engineering. Midterm Exam
Georgia Institute of Technology School of Electrical and Computer Engineering Midterm Exam ECE-3400 Fall 2013 Tue, September 24, 2013 Duration: 80min First name Solutions Last name Solutions ID number
More informationUNIT- IV ELECTRONICS
UNIT- IV ELECTRONICS INTRODUCTION An operational amplifier or OP-AMP is a DC-coupled voltage amplifier with a very high voltage gain. Op-amp is basically a multistage amplifier in which a number of amplifier
More informationPreface... iii. Chapter 1: Diodes and Circuits... 1
Table of Contents Preface... iii Chapter 1: Diodes and Circuits... 1 1.1 Introduction... 1 1.2 Structure of an Atom... 2 1.3 Classification of Solid Materials on the Basis of Conductivity... 2 1.4 Atomic
More informationSUMMER 13 EXAMINATION Subject Code: Model Answer Page No: / N
Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model answer and the answer written by candidate
More informationAE103 ELECTRONIC DEVICES & CIRCUITS DEC 2014
Q.2 a. State and explain the Reciprocity Theorem and Thevenins Theorem. a. Reciprocity Theorem: If we consider two loops A and B of network N and if an ideal voltage source E in loop A produces current
More informationS-[F] NPW-02 June All Syllabus B.Sc. [Electronics] Ist Year Semester-I & II.doc - 1 -
- 1 - - 2 - - 3 - DR. BABASAHEB AMBEDKAR MARATHWADA UNIVERSITY, AURANGABAD SYLLABUS of B.Sc. FIRST & SECOND SEMESTER [ELECTRONICS (OPTIONAL)] {Effective from June- 2013 onwards} - 4 - B.Sc. Electronics
More informationSEMESTER SYSTEM, A. PROPOSED SCHEME FOR B.Sc. ELECTRONICS (PASS) COURSE. B.Sc. (ELECTRONICS MAINTENANCE) COURSE
SEMESTER SYSTEM, 2010-2013 A PROPOSED SCHEME FOR B.Sc. ELECTRONICS (PASS) COURSE B.Sc. (ELECTRONICS MAINTENANCE) COURSE CLASS/ SEMESTER Sem -I Sem-II B. Sc (Elex) B. Sc (Elex. Maint) EL-1101 Components
More information6. Field-Effect Transistor
6. Outline: Introduction to three types of FET: JFET MOSFET & CMOS MESFET Constructions, Characteristics & Transfer curves of: JFET & MOSFET Introduction The field-effect transistor (FET) is a threeterminal
More informationScheme Q.1 Attempt any SIX of following 12-Total Marks 1 A) Draw symbol of P-N diode, Zener diode. 2 M Ans: P-N diode
Q. No. WINTER 16 EXAMINATION (Subject Code: 17321) Model Answer Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in themodel answer scheme.
More informationGOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION MARCH-2013 SCHEME OF VALUATION
GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION MARCH-03 SCHEME OF VALUATION Subject Code: 0 Subject: PART - A 0. What does the arrow mark indicate
More informationHomework Assignment 07
Homework Assignment 07 Question 1 (Short Takes). 2 points each unless otherwise noted. 1. A single-pole op-amp has an open-loop low-frequency gain of A = 10 5 and an open loop, 3-dB frequency of 4 Hz.
More information5.1 Introduction. transistor. Like the bipolar junction transistors (BJTs) we studied in Chapter 4,
5.1 Introduction In this chapter we introduce the second major type of transistor: the field-effect transistor. Like the bipolar junction transistors (BJTs) we studied in Chapter 4, field-effect transistors
More informationAbout the Tutorial. Audience. Prerequisites. Copyright & Disclaimer. Linear Integrated Circuits Applications
About the Tutorial Linear Integrated Circuits are solid state analog devices that can operate over a continuous range of input signals. Theoretically, they are characterized by an infinite number of operating
More informationMODULE-2: Field Effect Transistors (FET)
FORMAT-1B Definition: MODULE-2: Field Effect Transistors (FET) FET is a three terminal electronic device used for variety of applications that match with BJT. In FET, an electric field is established by
More informationFET, BJT, OpAmp Guide
FET, BJT, OpAmp Guide Alexandr Newberry UCSD PHYS 120 June 2018 1 FETs 1.1 What is a Field Effect Transistor? Figure 1: FET with all relevant values labelled. FET stands for Field Effect Transistor, it
More informationPESIT - BANGALORE SOUTH CAMPUS PART A
PESIT - BANGALORE SOUTH CAMPUS LESSON - PLAN FOR BASIC ELECTRONICS ENGG. Name of Faculty: Percentage of course Periods Reference/ Text books Topics covered Reference chapter covered Cumulative PART A Unit
More informationIntegrated Circuit: Classification:
Integrated Circuit: It is a miniature, low cost electronic circuit consisting of active and passive components that are irreparably joined together on a single crystal chip of silicon. Classification:
More informationINTEGRATED CIRCUITS AND APPLICATIONS LAB MANUAL
INTEGRATED CIRCUITS AND APPLICATIONS LAB MANUAL V SEMESTER Department of Electronics and communication Engineering Government Engineering College, Dahod-389151 http://www.gecdahod.ac.in/ L A B M A N U
More informationLinear IC s and applications
Questions and Solutions PART-A Unit-1 INTRODUCTION TO OP-AMPS 1. Explain data acquisition system Jan13 DATA ACQUISITION SYSYTEM BLOCK DIAGRAM: Input stage Intermediate stage Level shifting stage Output
More informationCHAPTER 8 FIELD EFFECT TRANSISTOR (FETs)
CHAPTER 8 FIELD EFFECT TRANSISTOR (FETs) INTRODUCTION - FETs are voltage controlled devices as opposed to BJT which are current controlled. - There are two types of FETs. o Junction FET (JFET) o Metal
More informationLecture 14. Field Effect Transistor (FET) Sunday 26/11/2017 FET 1-1
Lecture 14 Field Effect Transistor (FET) Sunday 26/11/2017 FET 1-1 Outline Introduction to FET transistors Types of FET Transistors Junction Field Effect Transistor (JFET) Characteristics Construction
More informationFIELD EFFECT TRANSISTORS MADE BY : GROUP (13)/PM
FIELD EFFECT TRANSISTORS MADE BY : GROUP (13)/PM THE FIELD EFFECT TRANSISTOR (FET) In 1945, Shockley had an idea for making a solid state device out of semiconductors. He reasoned that a strong electrical
More information2018 Delaware Science Olympiad Wonders of Electricity Workshop (Basic of OpAmp and Digital Logic)
2018 Delaware Science Olympiad Wonders of Electricity Workshop (Basic of OpAmp and Digital Logic) Contacts Gordon Lipscy acrodyn@aol.com Wayne Lu wayne_l@hotmail.com Charlie Boncelet, PhD - boncelet@udel.edu
More informationThree Terminal Devices
Three Terminal Devices - field effect transistor (FET) - bipolar junction transistor (BJT) - foundation on which modern electronics is built - active devices - devices described completely by considering
More informationGOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION MARCH-2012 SCHEME OF VALUATION
GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION MARCH-0 SCHEME OF VALUATION Subject Code: 0 Subject: Qn. PART - A 0. Which is the largest of three
More informationProf. Paolo Colantonio a.a
Prof. Paolo Colantonio a.a. 20 2 Field effect transistors (FETs) are probably the simplest form of transistor, widely used in both analogue and digital applications They are characterised by a very high
More informationExam Below are two schematics of current sources implemented with MOSFETs. Which current source has the best compliance voltage?
Exam 2 Name: Score /90 Question 1 Short Takes 1 point each unless noted otherwise. 1. Below are two schematics of current sources implemented with MOSFETs. Which current source has the best compliance
More informationElectronics I. Last Time
(Rev. 1.0) Electronics I Lecture 28 Introduction to Field Effect Transistors (FET s) Muhammad Tilal Department of Electrical Engineering CIIT Attock Campus The logo and is the property of CIIT, Pakistan
More informationElectrical, Electronic and Communications Engineering Technology/Technician CIP Task Grid
Secondary Task List 100 SAFETY 101 Describe OSHA safety regulations. 102 Identify, select, and demonstrate proper hand tool use for electronics work. 103 Recognize the types and usages of fire extinguishers.
More information= V IN. and V CE. = the supply voltage 0.7 V, the transistor is on, V BE. = 0.7 V and V CE. until saturation is reached.
Switching Circuits Learners should be able to: (a) describe and analyse the operation and use of n-channel enhancement mode MOSFETs and npn transistors in switching circuits, including those which interface
More informationBJT Amplifier. Superposition principle (linear amplifier)
BJT Amplifier Two types analysis DC analysis Applied DC voltage source AC analysis Time varying signal source Superposition principle (linear amplifier) The response of a linear amplifier circuit excited
More informationI E I C since I B is very small
Figure 2: Symbols and nomenclature of a (a) npn and (b) pnp transistor. The BJT consists of three regions, emitter, base, and collector. The emitter and collector are usually of one type of doping, while
More informationFrequently Asked Questions GE6252 BEEE UNIT I ELECTRICAL CIRCUITS AND MEASUREMENTS
Frequently Asked Questions GE6252 BEEE UNIT I ELECTRICAL CIRCUITS AND MEASUREMENTS 1. What is charge? 2. Define current. 3. Under what condition AC circuit said to be resonant? 4. What do you meant by
More informationGOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION JULY-2012 SCHEME OF VALUATION
GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION JULY-0 SCHEME OF VALUATION Subject Code: 40 Subject: PART - A 0. Which region of the transistor
More informationScheme Q.1 Attempt any SIX of following: 12-Total Marks a) Draw symbol NPN and PNP transistor. 2 M Ans: Symbol Of NPN and PNP BJT (1M each)
Q. No. WINTER 16 EXAMINATION (Subject Code: 17319) Model Answer Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer
More informationSection:A Very short answer question
Section:A Very short answer question 1.What is the order of energy gap in a conductor, semi conductor, and insulator?. Conductor - no energy gap Semi Conductor - It is of the order of 1 ev. Insulator -
More informationRoll No. B.Tech. SEM I (CS-11, 12; ME-11, 12, 13, & 14) MID SEMESTER EXAMINATION, ELECTRONICS ENGINEERING (EEC-101)
F:/Academic/22 Refer/WI/ACAD/10 SHRI RAMSWAROOP MEMORIAL COLLEGE OF ENGG. & MANAGEMENT (Following Paper-ID and Roll No. to be filled by the student in the Answer Book) PAPER ID: 3301 Roll No. B.Tech. SEM
More informationINTRODUCTION TO MOS TECHNOLOGY
INTRODUCTION TO MOS TECHNOLOGY 1. The MOS transistor The most basic element in the design of a large scale integrated circuit is the transistor. For the processes we will discuss, the type of transistor
More informationDhanalakshmi College of Engineering Manimangalam, Tambaram, Chennai
Dhanalakshmi College of Engineering Manimangalam, Tambaram, Chennai 601 301 DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING III SEMESTER - R 2013 EC6311 ANALOG AND DIGITAL LABORATORY LABORATORY
More informationFan in: The number of inputs of a logic gate can handle.
Subject Code: 17333 Model Answer Page 1/ 29 Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model
More informationPAPER-II (Subjective)
PAPER-II (Subjective) 1.(A) Choose and write the correct answer from among the four options given in each case for (a) to (j) below: (a) Improved commutation in d.c machines cannot be achieved by (i) Use
More informationUnit/Standard Number. LEA Task # Alignment
1 Secondary Competency Task List 100 SAFETY 101 Demonstrate an understanding of State and School safety regulations. 102 Practice safety techniques for electronics work. 103 Demonstrate an understanding
More informationField - Effect Transistor
Page 1 of 6 Field - Effect Transistor Aim :- To draw and study the out put and transfer characteristics of the given FET and to determine its parameters. Apparatus :- FET, two variable power supplies,
More informationPaper No. Name of the Paper Theory marks Practical marks Periods per week Semester-I I Semiconductor
Swami Ramanand Teerth Marathwada University, Nanded B. Sc. First Year Electronics Syllabus Semester system (To be implemented from Academic Year 2009-10) Name of the Theory marks Practical marks Periods
More informationELECTRONIC CIRCUITS. Time: Three Hours Maximum Marks: 100
EC 40 MODEL TEST PAPER - 1 ELECTRONIC CIRCUITS Time: Three Hours Maximum Marks: 100 Answer five questions, taking ANY TWO from Group A, any two from Group B and all from Group C. All parts of a question
More informationEE70 - Intro. Electronics
EE70 - Intro. Electronics Course website: ~/classes/ee70/fall05 Today s class agenda (November 28, 2005) review Serial/parallel resonant circuits Diode Field Effect Transistor (FET) f 0 = Qs = Qs = 1 2π
More informationMAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified) Summer 2016 EXAMINATIONS.
Summer 2016 EXAMINATIONS Subject Code: 17321 Model Answer Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the answer scheme. 2) The
More informationUNIT I Introduction to DC & AC circuits
SIDDHARTH GROUP OF INSTITUTIONS :: PUTTUR Siddharth Nagar, Narayanavanam Road 517583 QUESTION BANK (DESCRIPTIVE) Subject with Code: Basic Electrical and Electronics Engineering (16EE207) Year & Sem: II-B.
More informationShankersinh Vaghela Bapu Institute of Technology
Shankersinh Vaghela Bapu Institute of Technology B.E. Semester III (EC) 131101: Basic Electronics INDEX Sr. No. Title Page Date Sign Grade 1 [A] To Study the V-I characteristic of PN junction diode. [B]
More informationBasic Electronics Prof. Dr. Chitralekha Mahanta Department of Electronics and Communication Engineering Indian Institute of Technology, Guwahati
Basic Electronics Prof. Dr. Chitralekha Mahanta Department of Electronics and Communication Engineering Indian Institute of Technology, Guwahati Module: 3 Field Effect Transistors Lecture-7 High Frequency
More informationR & D Electronics DIGITAL IC TRAINER. Model : DE-150. Feature: Object: Specification:
DIGITAL IC TRAINER Model : DE-150 Object: To Study the Operation of Digital Logic ICs TTL and CMOS. To Study the All Gates, Flip-Flops, Counters etc. To Study the both the basic and advance digital electronics
More information