An Electronically Reconfigurable Three Band Low- Noise Amplifier in 0.5 μm GaAs phemt Technology

Transcription

1 University of Massachusetts Amherst Amherst Masters Theses February An Electronically econfiurable Three Band Low- Noise Amplifier in 0.5 μm GaAs phemt Technoloy Jeffrey A. Shatzman University of Massachusetts Amherst Follow this and additional works at: Part of the Electrical and Electronics ommons Shatzman, Jeffrey A., "An Electronically econfiurable Three Band Low-Noise Amplifier in 0.5 μm GaAs phemt Technoloy" (2011). Masters Theses February etrieved from This thesis is brouht to you for free and open access by ScholarWorks@UMass Amherst. It has been accepted for inclusion in Masters Theses February 2014 by an authorized administrator of ScholarWorks@UMass Amherst. For more information, please contact scholarworks@library.umass.edu.

2 AN ELETONIALLY EONFIGUABLE THEE BAND LOW-NOISE AMPLIFIE IN 0.5 µm GaAs phemt TEHNOLOGY A Thesis Presented by JEFFEY A. SHATZMAN Submitted to the Graduate School of the University of Massachusetts Amherst in partial fulfillment of the requirements for the deree of MASTE OF SIENE IN ELETIAL AND OMPUTE ENGINEEING May 2011 Electrical and omputer Enineerin

3 opyriht by Jeffrey A. Shatzman 2011 All ihts eserved

4 AN ELETONIALLY EONFIGUABLE THEE BAND LOW-NOISE AMPLIFIE IN 0.5 µm GaAs phemt TEHNOLOGY A Thesis Presented by JEFFEY A. SHATZMAN Approved as to style and content by: obert W. Jackson, hair hristopher Salthouse, Member K. Sifrid Ynvesson, Member hristopher V. Hollot, Department hair Electrical and omputer Enineerin

5 To my sister for showin me there is more than one way to et thins done and to my parents for always supportin me with whatever crazy thin I've been up to.

6 AKNOWLEDGMENTS First I would like to thank everyone at TriQuint Semiconductor for all the help throuhout this entire process. Particularly, I would like to thank ay Pavio and Mike Murphy for fundin the assistantship and for the foundry service. I would also like to thank al Weichert, Wayne Struble, and especially Haoyan Yu for the priceless technical advice they ave over the course of two years. Also, a bi thanks to Andy DeSalvo for help with LVS, D, and final layout/tapeout considerations. Second, I'd like to thank Professor Salthouse and Professor Ynvesson for takin the time to be on my committee. I also cannot o without thankin my parents for supportin all my decisions throuhout my academic career. Without them none of this would be possible. Finally, I'd like to thank Professor Jackson who has helped me academically and professionally since my days as an underraduate. Professor Jackson took an interest early in my career by helpin me find internships and supportin me academically by advisin on underraduate projects. His continued support put me in a reat position as a research assistant where he continued to support my work over the entire duration of my raduate schoolin. v

7 ABSTAT AN ELETONIALLY EONFIGUABLE THEE BAND LOW-NOISE AMPLIFIE IN 0.5 µm GaAs phemt TEHNOLOGY May 2011 JEFFEY A. SHATZMAN, B.Sc., UNIVESITY OF MASSAHUSETTS AMHEST M.S.E..E., UNIVESITY OF MASSAHUSETTS AMHEST Directed by: Professor obert W. Jackson State-of-the-art F front-end circuits are typically desined to operate at a sinle frequency. With an increasin number of available wireless standards, personal mobile communication devices require an increasin number of individually desined F circuits. To save space and cost, one alternative possibility is to reuse much of the circuitry by utilizin electronically reconfiurable topoloies. The ubiquitous low-noise amplifier is one of the many circuits that can be redesined with the reconfiurable aspect in mind. In this thesis, previous work in reconfiurable LNAs is reviewed as well as a brief comparison of MOS and GaAs processes used for F amplifiers. Three new reconfiurable LNA topoloies are also presented. The first two topoloies, based on the common-ate stae and synchronous filters, are investiated but not manufactured. The third desin, based on the cascode topoloy, was manufactured in a 0.5 µm GaAs process with enhancement-mode and depletion-mode phemts. The LNA features 12.7 db, 13.6 db, and 13.9 db of ain and noise fiures of 2.7 db, 3.5 db, and 4.2 db at 2.5, 3.6 and 5.8 GHz, respectively. The LNA draws 41 ma from a 3.3 V supply. vi

8 TABLE OF ONTENTS Pae AKNOWLEDGMENTS...v ABSTAT... vi LIST OF TABLES... ix LIST OF FIGUES...x HAPTE 1. INTODUTION History and Motivation Summary of hapters BAKGOUND INFOMATION Low-Noise Amplifiers for Mobile Applications Semiconductor Technoloy GaAs phemt GaAs phemt vs. MOS Prior Work on econfiurable LNAs Source Deenerated ascode Two Stae LNA ommon-gate Synchronous Filters EONFIGUABLE OMMON-GATE LNA AND SYNHONOUS FILTE LNA econfiurable ommon-gate Low-Noise Amplifiers ommon-gate Amplifier With Neative Feedback ommon-gate Amplifier With apacitive Feedback ommon-gate Amplifier With ascode Feedback Example Desin Synchronous Filter Low-Noise Amplifiers...44 vii

9 4. EONFIGUABLE ASODE LOW-NOISE AMPLIFIES Input Impedance Gain Output Impedance Noise Linearity Stability Bias Networks Power onsumption Switches Spiral Inductors with Taps Switchable apacitors Bond Wires & ESD Protection Desin of ascode in this Thesis Two-Band LNA versus Two Sinle-Band LNAs with Switches Layout of three Band LNA MEASUEMENTS Introduction esults omparison of Measurements to Simulations ONLUSIONS Summary & Final Thouhts Future Work APPENDIES A1 - OMMON-GATE WITH ASODE FEEDBAK INPUT IMPEDANE A2 - ASODE LNA DIE SIZE OMPAISON A3 - ASODE LNA SIMULATION ESULTS BIBLIOGAPHY viii

10 Table LIST OF TABLES Pae Table ommon-ate LNA performance [11]...15 Table ommon-ate amplifier parameters...23 Table ommon ate equivalent input impedance parameters...33 Table esults of common ate with cascode...41 Table equired cascode ate inductance...85 Table Input inductor with switches simulation results...88 Table apacitance and Q of switchable cap...90 Table Summary of LNA schematic simulations...96 Table Gain of LNA in-band and out-of-band...96 Table omparison of reconfiurable LNA versus traditional LNA with switches Table Measured S-Parameter results Table Measured intermodulation results Table Measured ain compression distortion Table Measured noise fiure Table S-Parameter comparison Table omparison of linearity measurements and simulations Table omparison of noise fiure measurements to simulations Table A2.1 - Sinle Band LNA omponents Table A2.2 - Two-band econfiurable LNA omponents ix

11 Fiure LIST OF FIGUES Pae Fiure Source Deenerated ascode...9 Fiure ascode LNA with switchin inductor [7]...10 Fiure Tunable floatin inductor [8]...11 Fiure Two Stae LNA [9]...12 Fiure Spiral inductor with many taps [9]...13 Fiure ommon-ate LNA with two types of feedback...14 Fiure ommon-ate LNA with dual feedback [11]...15 Fiure Synchronous filter in feedback [12]...16 Fiure ommon-ate amplifier...18 Fiure ommon-ate small sinal model...19 Fiure Noise fiure small sinal model...22 Fiure ommon ate amplifier with neative feedback...24 Fiure Ideal neative feedback system...24 Fiure Frequency response of neative feedback...25 Fiure ommon-ate amplifier with capacitive feedback...27 Fiure ommon-ate LNA with cascode feedback...29 Fiure ommon ate with cascode feedback small sinal model...30 Fiure ommon-ate small sinal model for ain and input impedance...32 Fiure ommon ate equivalent input impedance of common-ate amplifier...33 Fiure ommon-ate small sinal diaram with second tank...34 Fiure ommon-ate with both capacitive and cascode feedback...37 Fiure Gain of common-ate with cascode...38 x

12 Fiure Input match of common-ate with cascode...38 Fiure Output match of common-ate with cascode...39 Fiure Noise fiure of common-ate with cascode...39 Fiure Intermodulation distortion of common-ate with cascode (f 1 = GHz & f 2 = GHz)...40 Fiure Gain compression of common-ate with cascode...41 Fiure Fundamental and intermodulation output powers for three commonate amplifiers...43 Fiure Synchronous filter block diaram...45 Fiure Principle of operation for synchronous filter...46 Fiure In-phase quadrature synchronous filter...47 Fiure Full LNA with embedded feedback...48 Fiure Normalized transfer function of embedded synchronous filter...49 Fiure ascode LNA with output buffer...50 Fiure Small sinal model for calculatin cascode input impedance...52 Fiure ascode and output buffer small sinal model...53 Fiure Small sinal model of output buffer for output impedance...55 Fiure Small sinal model of cascode noise at input...56 Fiure Noise fiure versus ate bias voltae for different sized devices at 3.5 GHz...57 Fiure Biasin for d-mode switch...61 Fiure ompensated bias for common-source ate voltae with three enhancement mode FETs...63 Fiure Simple Bias ircuit...64 Fiure F FET D current with threshold voltae variation...65 Fiure F FET D current with temperature variation...66 Fiure Switch and small sinal equivalent...68 xi

13 Fiure Switch "On" resistance versus ate width Fiure Switch parasitic capacitance versus ate width...69 Fiure Diaram of tappable inductor and switches...71 Fiure Lumped element model of tappable spiral...72 Fiure Lumped element model of inductor and switches...73 Fiure Tappable inductor model with switch and switch bias...74 Fiure port network for inductor with switches and biasin...75 Fiure Schematic of adjustable capacitor with switches and biasin...76 Fiure From left to riht: Switchable apacitance circuit, low band equivalent circuit, mid band circuit, and hih band circuit...78 Fiure Bond wire and ESD for V DD...79 Fiure Bond wire and ESD for switches...80 Fiure Minimum noise fiure as a function of ate-source voltae...82 Fiure ommon-source stae for linearity measurements...82 Fiure IIP3 and D current as a function of total ate width...83 Fiure f -3db and OIP3 for various sizes of common ate transistors...84 Fiure Final cascode input inductor with taps for switches...87 Fiure LNA schematic - cascode half...89 Fiure Switchable capacitor bank...90 Fiure ascode LNA Output buffer...92 Fiure Third order 2 GHz maximally flat hih-pass filter...93 Fiure Full LNA Schematic...94 Fiure Summary of LNA S-parameter simulations...95 Fiure Block diaram of switches and LNAs...97 Fiure Schematic of three FET switch...98 Fiure Schematic of low-band cascode...99 xii

14 Fiure Schematic of hih-band cascode...99 Fiure Schematic of reconfiurable 2 band LNA Fiure Drawin of input spiral inductor for reconfiurable LNA Fiure Low-band comparison of reconfiurable LNA versus traditional LNA Fiure Hih-band comparison of reconfiurable LNA versus traditional LNA Fiure ross section of die [17] Fiure LNA Layout Fiure LNA die on PB - zoomed in Fiure LNA die on PB - zoomed out Fiure PB used for measurements Fiure PB with SMT capacitor Fiure PB with bond wires and die Fiure Test setup for measurements Fiure Low band input match and ain Fiure Low-band isolation and output match Fiure Mid-band input match and ain Fiure Mid-band isolation and output match Fiure Hih-band input match and ain Fiure Hih-band isolation and output match Fiure Low band intermodulation Fiure Mid-band intermodulation Fiure Upper-band intermodulation Fiure Low-band ain compression Fiure Mid-band ain compression xiii

15 Fiure Hih-band ain compression Fiure Low band noise Fiure Mid-band noise Fiure Hih-band noise Fiure Low Band S-Parameter esults omparison Fiure Low Band S-Parameter esults omparison Fiure Hih Band S-Parameter esults omparison Fiure A1.1 - ommon-ate small sinal model for input impedance Fiure A1.2 ommon ate input impedance equivalent circuit Fiure A3.1 - ascode simulation low band S-parameter esults Fiure A3.2 - ascode simulation mid-band S-parameter results Fiure A3.3 - ascode simulation hih-band S-parameter results Fiure A3.4 - ascode simulation low-band noise fiure Fiure A3.5 - ascode simulation mid-band noise fiure Fiure A3.6 - ascode simulation hih-band noise fiure Fiure A3.7 - ascode simulation low-band intermodulation distortion Fiure A3.8 - ascode simulation mid-band intermodulation distortion Fiure A3.9 - ascode simulation hih-band intermodulation distortion Fiure A ascode simulation low-band ain compression Fiure A ascode simulation mid-band ain compression Fiure A ascode simulation hih-band ain compression xiv

16 HAPTE 1 INTODUTION 1.1 History and Motivation Wireless transceivers are found in an increasin number of consumer electronic products. Hih end devices connect users to each other as well as to the internet usin numerous dedicated F links. Each link operates in a sinle frequency band, and for each band, dedicated hardware is required. There is active research into reoranizin these F circuits and the systems they work in. Instead of havin separate circuits for each separate F band, researchers have proposed the use of electronically reconfiurable circuitry capable of operatin across the frequency bands used by the different wireless protocols. There are several advantaes to havin a system that is adjustable and electronically controlled: (1) separate F circuits in a product take up I space and reducin the number of circuits and overall circuit area reduces cost (2) a reconfiurable circuit can communicate via new wireless standards as they are introduced without requirin new hardware, and (3) as circuit parameters shift over time due to deterioration, onboard computers can adjust the F circuit parameters to maintain optimum system performance. On the receiver side of the F system, antennas, low-noise amplifiers, filters, mixers, switches, power splitters, and oscillators must all be reconfiurable for the entire receiver to be considered reconfiurable. Low-noise amplifiers are interestin circuits because their desin includes many of the problems associated with active circuits such 1

17 as stability and linearity. LNAs also need to meet other specs such as ain, match, isolation, and noise. One modern LNA desin is the source deenerated cascode. For a typical cascode, the frequency band is set by as few as two lumped element circuit components, which can - for the most part - be independently desined. By electronically adjustin just these two key components, the frequency response of the entire amplifier can be readjusted without need to physically chane the circuit topoloy. The source deenerated cascode is not the only LNA topoloy amenable to electronically adjustable components, thouh. The common-ate amplifier has the advantaeous property of havin a very wide bandwidth into microwave frequencies. By addin a frequency dependent neative feedback loop, the circuit can display the desired narrow-band operation. The frequency response can be adjusted by a sinle reactive component. For this desin, the electronically controlled components can be hidden away in the feedback loop. Typically the electronically reconfiurable components are more lossy than their traditional counterparts. By puttin them in the feedback loop, they potentially can be isolated from the main sinal path. A third possibility is to use synchronous filters to select a desired channel. Synchronous filters convert F enery to a different frequency band, filter at the different band, and reconvert back to the oriinal band of operation. The advantae of synchronous filters is that the frequency response of the system can be controlled by the frequency of a sinle oscillator. By adjustin the oscillator frequency, the frequency response of the filter can be re-tuned. 2

18 1.2 Summary of hapters The remainder of this thesis is oranized as follows. hapter 2 reviews the basic theory behind LNA desin, the important circuit parameters, compares GaAs to MOS for FIs, and reviews previous work in reconfiurable LNA desin. hapter 3 introduces two new LNA desins. The circuits are described in detail and the advantaes and disadvantaes of each circuit are discussed. hapter 4 introduces a modification to the state-of-the-art cascode LNA that was fabricated and includes a comparison of the new reconfiurable LNA to a traditional receiver which is composed of two separate sinle band LNAs and a switchin network to select one of the two LNAs. hapter 5 presents the measured data of the fabricated LNA includin S- Parameters (ain, isolation, input match and output match), noise fiure, input and output third-order intercept points, and input referred ain compression. hapter 6 concludes the thesis and presents ideas for future work. 3

19 HAPTE 2 BAKGOUND INFOMATION This chapter ives a short backround of low-noise amplifiers and reviews previous work in reconfiurable desins. It also contains a brief comparison of GaAs and MOS technoloy. 2.1 Low-Noise Amplifiers for Mobile Applications The low-noise amplifier is a critically important component in both analo and diital down-convertin F receivers. In diital systems, the bit error rate improves as the sinal to noise ratio of received sinals improves. Likewise, in analo systems, sinal fidelity improves when there is less noise to corrupt the desired sinal. To maximize the ratio of sinal strenth to noise strenth, an LNA is required. Accordin to the Friss Formula, the noise fiure of a system of cascaded components is dominated by the first stae noise if the ain of the first stae is sufficiently lare. Hence, the primary job of the LNA is to have lare ain and low noise. Noise and ain are not the only important parameters of the LNA. Other factors to consider include the stability, the linearity, the input match, the output match, the power consumption, and the physical size of the I. The linearity of an LNA impacts distortion, and sinal distortion translates into effective noise. For LNAs the non-linear effects are due to non-linear transconductance and non-linear resistance. Gain compression and intermodulation distortion are common problems. 4

20 The input and output match influence other parameters. The match can be used to maximize ain or minimize noise fiure. A narrow-band match at the input can protect non-linear devices from stron out of band interferers. Typically there are tradeoffs that have to be made in order to achieve acceptable values for ain, noise, and bandwidth. Die size is an important factor in determinin the cost to manufacture an interated circuit. In the same technoloy, a smaller die will be less expensive. Power consumption is an important consideration for any electronic circuit but in mobile devices its importance is manified. The power supply for a mobile device - a battery - holds a limited chare. If the circuit consumes less power, the battery stays chared loner. Power consumption is traded off for improvements or worsenin of ain, noise, and linear rane. When desinin a low-noise amplifier, all these factors have to be taken into consideration. And typically they are not independent of each other. Different amplifier topoloies have their own advantaes and disadvantaes. For example, common-ate amplifiers can be used for wide-band applications but typically suffer from poor noise fiure. 2.2 Semiconductor Technoloy GaAs phemt The allium-arsenide pseudomorphic hih-electron mobility transistor has historically been a popular transistor for buildin active microwave circuits. The phmet is a field effect transistor with a ate, source, and drain. When a voltae is 5

21 applied from drain to source, a voltae on the ate controls the current that travels thouh a channel between the drain and source. The channel forms in an undoped layer of semiconductor material which yields carriers with a very hih mobility. This mobility translates into a lare transconductance which results in devices that are capable of hih ain and low noise. The devices are ideal for LNAs and active mixers. The phemt also demonstrates low on-resistance and a lare off-resistance makin the phemt ideal for switches and resistive FET mixers. Other structural additions to the phemt can further increase the current carryin capabilities of the channel allowin the phemt to operate well as a power amplifier [1] GaAs phemt vs. MOS ompound semiconductors have historically been at the forefront of microwave frequency active circuits. Processes such as allium arsenide have been industry favorites because of better ain and noise fiure compared to the cheaper, ubiquitous silicon MOS technoloy. ecent advances in MOS, most importantly the ever present scalin down of transistor sizes, have made silicon a viable choice for F circuits. The scalin of the transistors has yielded hiher and hiher operatin frequencies. For 65 nm MOS, the f t of the NMOS device optimized for F performance has been pushed to 250 GHz and the f max has been pushed to 220 GHz. The noise performance is also improved. At 2.4 GHz, the minimum noise fiure for the NFET device has been improved to 0.2 db and at 5.8 GHz improved to 0.3 db [2]. 6

22 ompound semiconductors still dominate in terms of hihest speed, thouh. A modified 50 nm ate lenth InGaAs/InAlAs/InP HEMT had measurable ain over 15 db at 340 GHz in a three stae amplifier. By extrapolatin the measured results, the desiners claimed to have created a HEMT with an f max of just over 1 THz [3]. Gallium arsenide still plays a pivotal role in F MMIs and particularly in power amplifiers. One of the stronest points is the power efficiency of the GaAs technoloy especially at hih frequencies. The improved efficiency is due to the hiher breakdown voltae of the GaAs transistor over the MOSFET. As MOSFET sizes scale smaller, their maximum operatin voltae decreases. When the operatin voltae is low, current must be hih. With such a lare operatin current, losses throuh any resistance are sinificant [1]. The low Q inductors in silicon have a considerable resistance associated with them; thus, the power delivered to the load is lowered and the efficiency is decreased. With GaAs, the hiher operatin voltae means less current is required for the same output power. The load of the output stae of the PA is hiher and therefore the losses in the matchin networks are lower and a hiher percentae of the power from the transistor is delivered to the load. The hiher Q inductors available on a semi-insulatin GaAs substrate are also beneficial in reducin loss. In implementation, a 60 GHz power amplifier in GaAs phemt technoloy has demonstrated a PAE as hih as 30.6% [4]. In comparison, a MOS power amplifier has demonstrated a PAE of 14% at 60 GHz [5]. One major advantae of buildin GaAs LNAs is that the LNA, power amplifier, and any switches can be interated onto a sinle die reducin required space in any product and reducin overall manufacturin costs. In addition, at hiher frequencies, GaAs still demonstrates better noise fiure. For example a 150 nm GaAs process offers a 7

23 depletion mode phemt with a minimum noise fiure of 0.7 db at 15 GHz [6]. In contrast, in an optimized 65 nm MOS process, the NFET device offers a minimum noise fiure of around 1.3 db at 15 GHz [2]. 2.3 Prior Work on econfiurable LNAs There has been a sinificant amount of effort already placed into the desin of reconfiurable low-noise amplifiers. The desins vary widely and include the cascode, common-ate LNAs, and wide-band common-source topoloies Source Deenerated ascode The source deenerated cascode low-noise amplifier is a very popular choice of low-noise amplifier. It features low noise, hih ain, low power consumption, and ood linearity. The source deeneration adds a narrow bandwidth and ood quality input match. The topoloy of the circuit without biasin is shown in Fiure

24 tqped_ehss Q2 L LG tqped_ehss Q1 L LS Fiure Source Deenerated ascode The first order model input impedance is Z in = GS1 ( ) + j ω LS + LG ω (2.1) GS1 m1 S 1 L where m1 and GS1 are the transconductance and the ate-source parasitic capacitance of transistor Q 1. L S is used to raise the real part of the input impedance to match the source impedance. L G is added to tune out the parasitic capacitance at the desired frequency of operation. The frequency response of the circuit s ain is often controlled by an L tank after the common-ate stae. The cascode is also an excellent topoloy for reconfiurable amplifiers. As few as two components can control the frequency of operation: the input inductor and one of the two reactive components in the output tank. Several new circuits have been proposed that take advantae of this. One such circuit uses two inductors in series with a switch to short circuit one of the two inductors [7]. The schematic is shown in Fiure

25 Fiure ascode LNA with switchin inductor [7] At the output, another switch is placed in parallel with the D blockin capacitor L. When the switch, made by MOSFET M s,inv, is off, the D blockin capacitor determines the output match because the off switch acts primarily as a lare resistance. When the switch is on, the switch looks like a small resistance. The output match is then determined by the D blockin capacitor L and the switch's D blockin capacitors B. By turnin just two switches on, the amplifier can be tuned to two separate bands: 2.4 GHz and 5.2 GHz. Another proposed circuit replaces ate inductor L G with an electronically tunable floatin inductor [8]. The schematic of the circuit is shown in Fiure 2.3. In the circuit, if capacitor is lare enouh to be considered a short circuit at F and inductor F is lare enouh to be considered an open circuit at F then the impedance Z ina is Z ina = 1+ jωl mms1 A (2.2) 10

26 If A is replaced with a FET operatin in the triode reion, the resistance A can be controlled by the ate-source voltae of the FET M A. The resultin impedance is continuously tunable. The limitin factor is how accurately the ate voltae of the triode FET can be controlled. At the output, the capacitor of a parallel L tank is aumented with a varactor yieldin a continuously tunable frequency response for the ain of the circuit. Fiure Tunable floatin inductor [8] Two Stae LNA Another recently proposed reconfiurable LNA is shown in Fiure 2.4. The amplifier is broken into two staes. 11

27 Fiure Two Stae LNA [9] The first stae is a wideband amplifier. The input matchin network is desined to deliver power to the first common-source stae from 2 GHz to 6 GHz. The second stae is a cascode with an L tank as a load. The common-source stae of the cascode is made of several transistors in parallel which can be turned on or off to control the ain of the LNA. The L tank at the output of the cascode is used to tune the frequency response and ive the amplifier a band-pass characteristic. The tank is adjustable usin several varactors and a spiral inductor with many taps as shown in Fiure 2.5. Each tap of the spiral has an associated MOSFET switch. When the switch is on, the outer rins of the spiral are shorted out effectively lowerin the inductance value. 12

28 Fiure Spiral inductor with many taps [9] ommon-gate ommon-ate amplifiers are another useful amplifier topoloy. Both their ain and input match are wide-band into F. The ate-source parasitic capacitance that plaues the common-source and common-drain topoloies has a much smaller effect on circuit performance in the common-ate. At frequencies of interest for F amplifiers, the zeroth order input impedance is the inverse of the transistor's transconductance. A wide-band match is implemented by settin the transconductance, m, to the inverse of the source impedance. The drawback is that noise fiure is inversely proportional to the transconductance. To maintain a ood input match there is a limit on increasin the transconductance. The voltae ain of the common-ate can be lare if the load is a lare impedance such as a hih input impedance buffer. Liscidini et al. have taken advantae of the wide-band properties of the commonate topoloy, but have improved the desin throuh the use of two feedback networks as depicted in Fiure 2.6 [11]. 13

29 Fiure ommon-ate LNA with two types of feedback The two feedback paths allow the transconductance of the main common-ate stae to increase while maintainin the wide-band input match. Assumin noiseless feedback, the noise fiure is reduced because the FET transconductance can be increased while the circuit still provides a ood match to Z S. Simulation shows that the noise from the feedback is low enouh that the LNA noise fiure is indeed reduced. 14

30 Fiure ommon-ate LNA with dual feedback [11] A simplified circuit schematic simulated by Liscidini et al. is shown in Fiure 2.7. The circuit is implemented in a differential form. apacitors 1 and 2 on each side form the voltae feedback of Fiure 2.6 and transistors M 3 and M 6 form the transconductance feedback. Table 2.1 contains the results of the simulations. By adjustin the feedback, the authors were able to reconfiure the LNA to operate in various modes dependin on system requirements. For example, in Hih IIP3 Mode, by increasin the power consumption, they were able to reatly improve the linearity and noise fiure. Table ommon-ate LNA performance [11] Low Power Mode Hih IIP3 Mode Hih Gain Mode D Power (mw) Noise fiure (db) IIP3 (dbm) Gain (db)

31 amplifier. Unfortunately, there is no confiurable control over the frequency response of the Synchronous Filters The source deenerated cascode is the state-of-the-art LNA topoloy. But like any receiver, interference from nearby transmitters can couple into the receiver chain. The transmitter sinals are stron and can act as potential blockin sinals which can result in ain compression of the LNA. In order to block these stron interferers from nearby transmitters, Vladimir Aparin suests usin a synchronous filter in a feedback loop around the LNA to cancel out any unwanted sinals. The synchronous filter itself is a band-pass filter but when placed in the feedback loop it chanes the overall amplifier into a band-stop filter capable of removin a narrow-band of stron interferers [12]. The block diaram of the circuit is shown in Fiure 2.8. Fiure Synchronous filter in feedback [12] 16

32 HAPTE 3 EONFIGUABLE OMMON-GATE LNA AND SYNHONOUS FILTE LNA Two new LNA topoloies are studied in this chapter. The first desin is based around a common-ate amplifier with active neative feedback to ive a band-pass response. The second LNA uses a synchronous filter and two feedback loops to create a band-pass LNA. In the end, neither of these desins were completed and therefore never fabricated. 3.1 econfiurable ommon-gate Low-Noise Amplifiers The common-ate amplifier topoloy is shown in Fiure 3.1. The ideal lumped element inductors and capacitors are infinite and used to provide bias that does not influence the frequency performance of the circuit. In a practical circuit, the voltae source biasin the ate could be replaced with a current mirror or a resistive voltae divider. 17

33 1 L L1 = V_D V tqped_ehss Q1 L L2 = V_D Vdd 2 Fiure ommon-ate amplifier The common-ate is most often used as a transimpedance amplifier. The input is a current and the output is a voltae. The current ain of the device is less than unity but the voltae ain can be lare and depends on the load of the stae. The input impedance is determined primarily by the transconductance of the device. For a small device, the output impedance is lare. A small sinal model is shown in Fiure 3.2. In the small sinal model, only the most influential parasitic components remain to simplify hand calculations. First, the ate-source capacitance, GS, plays a pivotal role in the input impedance and ain. The parasitics in parallel with the current source, DS and DS, sinificantly determine the output impedance and isolation of the amplifier stae. 18

34 s ds DS Port P2 Num=2 Port P1 Num=1 VS m Fiure ommon-ate small sinal model Usin the small sinal model, the input admittance, where Z L is the load of the common-ate stae, can be calculated to be Y IN = m + 1 DS + s ( + ) GS DS 1 DS + s 1 Z L DS DS DS + s + s DS DS + m. (3.1) At frequencies even several octaves past unity-ain frequency, ω t, of the device, the fraction on the riht half side is small compared to the remainder of the riht half side. If m 1 >> (3.2) DS and GS >> GD (3.3) the input admittance can be simplified and rewritten as Y = + s IN m GS. (3.4) 19

35 This is the same as if a conductance with value m were in parallel with a capacitor GS. Assumin that the ω T is rouhly the ratio of m to GS, equation (3.4) can be rewritten as Y IN s 1 + ω. = m T (3.5) At frequencies well below ω T, the input admittance is approximately equal to the transconductance of the FET. Therefore, the input impedance is rouhly Z IN = 1 m. (3.6) The voltae ain of the circuit in Fiure 3.2 is A V = 1 s 1 Z L 1 + DS s DS + sgs + m + S m s DS DS 1 DS + s DS 1 DS + s DS (3.7) where S is defined as the source resistance. Makin the assumptions that m 1 >> (3.8) DS and GS >> GD (3.9) the voltae ain is approximately 20

36 A V = GS S ( 1+ ) + + ms 1 1 ms L m s. (3.10) Substitutin ω T for m / GS yields the dominant pole at 1+ m ω 0 = ωt m S S. (3.11) The output admittance is Y OUT = 1 DS + s DS 1 1 DS S + s 1 + DS DS + m m s DS GS + s + s DS DS. (3.12) Y OUT = 1+ DS S s + S GS + + m DS DS s S DS + + DS DS S s S s 2 ( + ) GS DS GS DS. (3.13) A dramatically simplified small sinal model with a sinle noise source is shown in Fiure 3.3. The sinle noise source is back-fit to a model based on physical measurements. The sinle source is a close approximation to a more detailed model which could potentially include a ate noise source and more noise sources for the small parasitic resistances at the ate, source, and drain which are not used in this small sinal model. 21

37 s ds DS I_Noise S1 Port P2 Num=2 Port P1 Num=1 VS m Fiure Noise fiure small sinal model Assumin m 1 >> (3.14) DS and GS >> GD (3.15) The noise fiure for the common-ate amplifier is F = 1+ I 2 DN 2 N V 2 s 1 2 S 2 m 2 + ω 2 + ω 2 GS 2 DS (3.16) where V N is the noise from the noisy enerator source and S is the source impedance. Substitutin for V N yields F ω I DN = 1+ s 2 4κ T f + ω 2 S 2 m 2 GS 2 DS. (3.17) The input impedance, output impedance, voltae ain, and noise fiure of the common-ate amplifier are summarized below in Table

38 Table ommon-ate amplifier parameters Input Impedance 1 Z IN = s + m 1 ωt Y OUT Output Admittance 1+ S sgs + DS sds + DS S s = s DS S m DS S DS S 2 ( + ) GS DS GS DS A V = Voltae Gain GS S ( 1+ ) + + ms 1 1 ms m 1+ m ω 0 = ωt L m s S S F Noise Fiure ω 2 I DN S = 1+ s 2 2 4κ T f + ω m 2 GS 2 DS ommon-gate Amplifier With Neative Feedback Addin neative feedback is a useful circuit desin technique that typically sacrifices ain to improve sensitivity. Althouh the common-ate has a current ain of less than unity, it can achieve a lare voltae ain if the load impedance is lare. Takin advantae of this, it is possible to add a neative feedback circuit around a common-ate amplifier. The feedback circuit shown in Fiure 3.4 samples the voltae at the output of the common-ate amplifier and applies a current to the input of the common-ate stae. 23

39 Fiure ommon ate amplifier with neative feedback If the neative feedback block is band-stop in nature, the complete amplifier will demonstrate a band-pass response. The ideal neative feedback system is shown in Fiure 3.5. Fiure Ideal neative feedback system The transfer function is 24

40 H = Y X A =. 1+ Aβ (3.18) If A is lare, the function reduces to 1 H =. β (3.19) Possible manitudes of the functions, A, β, and H as functions of frequency are shown in Fiure 3.6. Fiure Frequency response of neative feedback Assumin A is lare, the amplifier flips the β function around creatin a band- pass system. 25

41 With the open-loop common-ate stae, it is possible to bias the device such that it achieves a wide-band match. When a band-stop feedback circuit is added, the input match becomes narrow-band. Ideally, the narrowband input match would protect the FETs from stron out of band interferers. The input match and ain are determined by a sinle band-stop filter which is another advantae because it reduces the required number of reactive components. eactive components take a lare amount of die space and the fewer filters, the smaller the die ommon-gate Amplifier With apacitive Feedback An F amplifier requires a ood input match at the desired frequency of operation. Typically the source impedance is 50 Ω. The input impedance of a simple common-ate amplifier, at frequencies much lower than the unity ain frequency, is 1 Z IN =. (3.20) m Therefore, for a ood input match (Z IN =Z 0 =50 Ω) 1 1 = = 20mS. (3.21) Z 50 m = IN The noise fiure of the common-ate stae is F 2 DN 1 2 N 2 I + ω = 1+ (3.22) V + ω 2 m 2 2 GS s 2 2 DS In a standard common-ate circuit there is a direct trade off between transconductance (and therefore ain) and input match. A ood input match results in a non-optimum noise fiure [10]. However, the addition of neative feedback [11] allows 26

42 27 the transconductance to be increased to improve noise fiure but also provides a ood input match. One way to implement this is throuh a capacitive divider as shown in Fiure 3.7. Fiure ommon-ate amplifier with capacitive feedback With the feedback, the input impedance is ( ) = = = s Z s s s s Z S L m m IN L L m L L m IN (3.23) where L is the load impedance. If 1 and 2 are small enouh, their effects on the frequency response in equation (3.23 can be inored and the equation can be simplified F F Z L m IN + = + =. (3.24) 2 1 tqped_ehss Q1

43 The feedback increases the resistive portion of the input impedance. For instance, the m can be doubled, decreasin the noise fiure, and the feedback will compensate for the increased transconductance and keep the input resistance lare enouh for a ood match. The feedback also adds a small capacitive component to the input impedance which at hih frequencies can start to derade the input match. To minimize this effect, 2 should be chosen to be small. As 2 decreases, 1 must also decrease. The size of 1 is limited, thouh, because 1 is in effect in parallel with the parasitic ate-drain capacitance of the FET. One desin approach is to use the parasitic drain-ate capacitor as 1 and then determine the appropriate size of 2 to obtain the required amount of neative feedback ommon-gate Amplifier With ascode Feedback The small sinal schematic of the common-ate amplifier with cascode feedback is shown in Fiure 3.8. The common-source stae of the cascode samples the output voltae of the main common-ate amplifier. The series inductor-capacitor circuit resonates at the chosen frequency short circuitin any sinal to round. When the L circuit is resonatin, the ate-source voltae of the common-ate in the feedback loop is zero and no current flows throuh the transistor. At frequencies far away from the resonant frequency, the L circuit opens up and a voltae develops at the source of the common-ate device. A current flows throuh the transistor. The common-ate in the feedback essentially steals the current that would otherwise flow throuh the main common-ate amplifier. 28

44 The main advantae of puttin the L circuit in the feedback loop is that the L circuit can control both the ain and input impedance. The noise contribution of Q 2 is minimized because at the resonance frequency of the L circuit, the drain current noise of Q 2 is shorted to round. tqped_ehss Q3 L L1 1 tqped_ehss Q2 Port P1 Num=1 tqped_ehss Q1 Port P2 Num=2 Fiure ommon-ate LNA with cascode feedback The size of transistor Q 1 is chosen for optimal input match as will be discussed below. The size of transistor Q 2 is fundamental in determinin the complete closed loop response of the amplifier. The small sinal model is shown in Fiure

45 components is Fiure ommon ate with cascode feedback small sinal model The ratio of output voltae to input current without the feedback or reactive H OPEN = V I O IN = m1l + 1 IN m1 IN. (3.25) IN is the source impedance of a Norton source. Equation (3.25 is equivalent to the transfer function at the resonance frequency. With the feedback added, and at a frequency far away from the frequency at which the L circuit resonates, the transfer function becomes H LOSED V = I O IN m1l IN IN m1+ 1 = m2in 1+ m1. L + 1 m1 IN (3.26) Takin the ratio of the transfer functions yields 30

46 ζ = H H OPEN LOSED = 1+ m1 L m2in m1in + 1. (3.27) Solvin for m2 yields m2 ( 1 )( +1) m1 IN = ζ m1l IN. (3.28) The sinificance of equation 3.28 is that assumin the source and load impedances are predetermined and m1 is picked for a ood input match, m2 can be chosen for any arbitrary ζ. When the series L circuit is added back to the feedback, the cascode ideally only affects the amplifier s behavior far from the resonance frequency. Therefore, ζ represents the out of band rejection the amplifier will display. The transconductance of Q 3 is not sinificant in determinin out of band rejection. Its purpose is to act as a current buffer between the common-source stae and the input of the main-common ate amplifier. The oal of the feedback is to reduce the current at the node where the cascode feeds back into Q 1 and thus reduce the current into Q 1 enerated by an out of band interferer. To make the amplifier s frequency response reconfiurable, L B and B can be replaced or supplemented by electronically adjustable reactive components such as active inductors or varactors. The active feedback is not without penalty, thouh. The feedback can cause potential instabilities as well add noise to the circuit. Parasitic transistor capacitance, primarily the ate-source capacitance of Q 2, adds extra poles to the system which are capable of creatin potential instabilities at frequencies just below the operatin frequency. 31

47 The frequency response of the circuit's ain and input impedance are determined primarily by the ate-source capacitance of the common-source stae and the inductor and capacitor between the transistors of the cascode. Fiure 3.10 is the small sinal diaram. VS m3 L LB s2 B VS m2 L Port P2 Num=2 Port P1 Num=1 VS m1 Fiure ommon-ate small sinal model for ain and input impedance The input impedance is Z IN = m1 + m3 + s 1 m1 m2 m3l L sgs m3l + 1 slb + s GS 2 B. (3.29) The derivation of equation 3.29 is found in Appendix 1. The equivalent circuit model with the same input impedance of the circuit of Fiure 3.10 is shown in Fiure 3.11 and each component value is summarized in Table

48 Z IN 1 2 L L1 = 3 4 L L2 = 1 Fiure ommon ate equivalent input impedance of common-ate amplifier Table ommon ate equivalent input impedance parameters = 1 1 m 1 2 = m1 1 m2 L = 3 LB m1 m2 GS 2 m3 4 m1 m2 = 2 ω B m3 GS1 L = 1 m1 GS 2 m2 L 2 = m1 B m2 m3 L 1 = LB m1 m2 m3 L Shunt resistor 1 represents the input impedance of the main common-ate amplifier. The other le of the equivalent circuit represents the feedback loop. Note that the neative feedback converts the ate-source capacitance into an inductance and the series L tank is converted into a parallel L tank. The inductor becomes the capacitor and vice versa. Ideally, the second branch would consist only of the parallel L tank so that at the resonant frequency, the input impedance is only 1. A neative real part of the input impedance implies a potential instability in the circuit. Below the resonance frequency of L 2 and 1, the neative resistance of 4 can dominate the real part of the input impedance and in turn, cause the input resistance to be neative. 33

49 To remove the neative portion of the input resistance, another inductor can be placed in parallel with the ate-source capacitance as shown in Fiure VS m3 L LB s2 L Ls2 B VS m2 L Port P2 Num=2 Port P1 Num=1 VS m1 Fiure ommon-ate small sinal diaram with second tank As lon as the resonance of L GS and GS is close to that of L B and B, the neative portions of the input impedance cancel each other out. The new input impedance, with no neative resistive part, is Z IN = m1 + m1 m2 m3 1 L 1 + sl GS 1 + s GS 1+ m3 1 m3 1 sl B 1 + s B. (3.30) The small sinal voltae ain of the circuit with the additional inductor in Fiure 3.12 is 34

50 A V V = V W = O IN X = s B m1 + = m2 2 2 ( 1+ m1s)( s Ls 2 s 2L + sls 2 + L) X + W( s LB B + 1) 2 ( s L + 1) m3 m3 S L B s 2 B l m1 L sl s 2 X. (3.31) If (L ) -1 =ω 0 2 and (L s2 s2 ) -1 =ω 0 2, then the voltae ain when ω = ω 0 reduces to A V = m1l m1s + 1. (3.32) This is the same ain equation as if there were no feedback at all which is the oal of addin the feedback. In the band of operation, the feedback is supposed to be 'invisible' to the main amplifier. But at frequencies far away from the band of operation, the feedback should lower the ain and derade the input match. The overall effect is a narrow-band amplifier. If the LNA requires both ood input match and ood noise fiure, a standalone common-ate amplifier would typically fail one of the requirements. Addin the capacitive feedback allows m to be increased while maintainin the ood input match. The increased m yields lower noise fiure. Addin the cascode feedback adds a narrowband match and ain Example Desin The first step in desinin a common-ate LNA with two types of neative feedback is to pick the ratio, ζ, of transimpedance transfer function in band versus out of band. For this circuit, ζ was chosen to be

51 m2 ( 1 )( +1) m1 IN = ζ m1l IN. (3.33) Usin equation (3.33 and choosin the load resistance to be 500 Ω and the source resistance to be 50 Ω, the transconductance of the common-source transistor is calculated to be 115 ms. To decrease the noise fiure, capacitive feedback is added to the main common-ate FET. The drain-ate capacitor is used as one of the capacitors in the divider feedback. The circuit is desined to operate at 3.6 GHz. The frequency response is determined primarily by the two L circuits. The first tank is composed of three components: the ate-source capacitance of the common-source stae, feedback capacitance of the main common-ate amplifier, and an additional inductor. More capacitance could be added but is unnecessary. The inductor is desined to resonate with the capacitance at 3.6 GHz. The inductor winds up bein 2.7 nh. The second tank can be used to control the bandwidth of the ain. The smaller the inductor is, the wider the bandwidth is. For this example, the inductor was chosen to be 1 nh and the required capacitance is 2 pf. If the common-ate stae in the feedback cascode is too small, the ain suffers. If it is too lare, the noise fiure suffers because the noise from the channel can flow into the source of the main common-ate amplifier. For this desin, the common-ate stae has a transconductance of 5 ms. For this example, each transistor is biased separately usin ideal D batteries. All but one of the passive components to bias the circuit are ideal F chokes and D blocks. The only non-ideal F choke is the ate bias inductor for the common-source amplifier. 36

52 To save space, the component, which is normally a lare resistor, is instead the inductor that resonates with the ate-source capacitance. The transistor models are realistic 0.5 µm phemt models. The feedback transistors have to be biased hotter than the core common-ate transistor in order to improve the linearity. The cascode feedback potentially sees larer power sinals and needs a larer bias in order to keep the F atesource voltaes from chanin the operatin reimes of the transistors. The feedback transistors also create intermodulation powers which are fed back to the main amplifier. A full schematic of the simulated circuit is shown in Fiure Simulation results for ain, input match, output match, noise fiure, IIP3, OIP3 and P1dB follow and are summarized in Table 3.3. D_Block D_Block5 D_Feed D_Feed6 I_Probe I_d3 V_D S6 Vdc=3.3 V tqped_ehss Q3 W=15 um N=1 V_D S5 Vdc=.8 V D_Feed D_Feed7 D_Block D_Block6 L D_Block L1 D_Block4 L=1.0 nh =0 1 =2.0 pf D_Feed D_Feed5 I_Probe I_d2 V_D S4 Vdc=3.3 V tqped_ehss Q2 W=65 um N=3 L L12 D_Block L=2.7 nh {t} D_Block3 =0 V_D S3 Vdc=.8 V Term Term1 Num=1 Z=50 Ohm D_Block D_Block1 D_Feed D_Feed1 D_Feed D_Feed8 V_D S1 Vdc=.5 V tqped_ehss Q1 W=31 um N=8 9 =1.3 pf {t} D_Feed D_Feed2 I_Probe I_d1 V_D S2 Vdc=3.3 V D_Block D_Block2 vo Term Term2 Num=2 Z=500 Ohm Fiure ommon-ate with both capacitive and cascode feedback 37

53 10 m Gain [db] Frequency [GHz] m19 freq= 3.590GHz db(s(2,1))=6.763 Peak Fiure Gain of common-ate with cascode -2-4 Input Match [db] m Frequency [GHz] m16 freq= 3.610GHz db(s(1,1))= Valley Fiure Input match of common-ate with cascode 38

54 0-5 Output Match [db] m Frequency [GHz] m20 freq= 3.630GHz db(s(2,2))= Valley Fiure Output match of common-ate with cascode Noise Fiure [db] m17 freq= 3.600GHz nf(2)= m Frequency [GHz] Fiure Noise fiure of common-ate with cascode 39

55 Output Power [dbm] Input Power [dbm] Fiure Intermodulation distortion of common-ate with cascode (f 1 = GHz & f 2 = GHz) 40

56 m Gain [db] m23 Pin= dbm(vo[::,1],500)-pin=6.756 m24 Pin= dbm(vo[::,1],500)-pin=5.694 m Input Power [dbm] Fiure Gain compression of common-ate with cascode Table esults of common ate with cascode Gain Input Output Noise IIP3 OIP3 Input I D [db] Match Match Fiure [dbm] [dbm] P1dB [db] [db] [db] [dbm] ma The advantae of the common-ate LNA with cascode feedback versus a common-ate LNA without feedback is the addition of a narrow-band input match and narrow-band ain. The narrow-band input match potentially protects the LNA from stron out of band interferers. Fiure 3.20 are the simulation results of an experiment 41

57 with a similar setup to that of an IM3 measurement. The fiure plots output power versus input power and compares three cases of the common-ate amplifier of Fiure 3.13: (i) the full common-ate amplifier with cascode feedback made with realistic FET models, (ii) the feedback completely removed, and (iii) the feedback replaced with linear lumped element components. The circuit is desined to operate at 3.6 GHz so the out-of-band interferers are placed at 2.4 GHz and 3.0 GHz so that the upper third order intermodulation product falls at 3.6 GHz. In the raph, the larer output powers are at 3 GHz and the smaller output powers are the 3.6 GHz intermodulation output powers. The intermodulation powers for both the stand-alone common-ate amplifier and commonate with realistic feedback are similar. With linear feedback, thouh, the value of the narrow-band input match is reconized. The intermodulation powers are around 10 db weaker. The output powers for amplifiers with feedback are lower than the output powers for the simple common-ate because the feedback adds a narrow-band response to the ain and the fundamental input tone is out of this band. 42

58 Fiure Fundamental and intermodulation output powers for three common-ate amplifiers When the feedback is realistic and non-linear, the feedback miht add no protection from stron out-of-band interferers because the feedback adds its own sinificant distortion. For the desin example, the feedback added as much distortion as it removed. If the non-linear effects of the feedback are minimized, the feedback shows some advantae. Another advantae of the feedback is that the narrow-band ain provides some rejection at frequencies other than the operatin frequency. The rejection helps protect other non-linear circuit elements further down the receive chain includin mixers and demodulators. 43

59 In the end, thouh, the issues outweihed the advantaes. The major problem with implementin a reconfiurable version of the circuit is the potential instability caused by the ate-source capacitance of the common-source stae in the feedback. The easiest fix (the inductor mentioned above) works well for one frequency, but to make the amplifier reconfiurable, the inductor would have to be reconfiurable. Each reconfiurable circuit element can be physically lare as well as noisy or non-linear. Another attempted solution to fix the potential instability was to add a neative capacitance circuit. The neative capacitance circuit was too noisy and had a very limited bandwidth and quality factor. 3.2 Synchronous Filter Low-Noise Amplifiers Synchronous filters work by down-convertin F sinals to either baseband or IF, filterin at the lower frequency, then up-convertin back to the oriinal F band. The final circuit is then a band-pass filter. The first advantae of the synchronous filter is that the center frequency of the entire filter is controlled by the down-conversion frequency. This frequency can be chaned and the entire filter response chanes. Another benefit is that the pass-band characteristics of the entire filter are controlled by whatever filter (usually low-pass) is placed between the up and down-conversion mixers. The simplest synchronous filter is shown in Fiure

60 Fiure Synchronous filter block diaram To understand the operation of the filter, examine each sinal x(t), a(t), b(t), and y(t) in the frequency domain. In Fiure 3.22, the top raph is an example input spectrum X(f). The input spectrum has two F sinals a square and a trianle. In the second plot x(t) has been multiplied by the sinal cos(ω 0 t). Then, the sinal is low-pass filtered so that only the baseband portion remains. The baseband sinal is the desired portion of the oriinal F sinal. Then, in the last raph, the baseband sinal is up-converted back to its oriinal F spectrum with the second mixer. 45

61 Fiure Principle of operation for synchronous filter The system shown in Fiure 3.22 is flawed, thouh. The key weakness of this zero-if receiver is that any information in sinal phase can be lost when the oriinal down-converted sinals add toether at baseband. This can be overcome by usin a low- IF and filterin at IF but this requires a band-pass filter be built instead of a low-pass filter and additional hih-pass filter is needed at the output to remove a newly formed imae sinal. Instead, an IQ system can be used as shown in Fiure

62 Fiure In-phase quadrature synchronous filter The IQ system preserves the modulation of the incomin sinal and allows the system to use low-pass filters. The system, as is, would have trouble actin as a standalone LNA, thouh. The first circuit the antenna sees in a receiver is rarely a mixer mixers are typically too noisy and do not have enouh ain. Instead, the synchronous filter can be used similar to the feedback used with the common-ate amplifier as demonstrated in section To make a band-pass LNA, the feedback filter has to be band-stop in nature. Unfortunately for the synchronous filter, the low-pass filters cannot simply be replaced with hih-pass filters to switch the synchronous filter from band-pass to band-stop. Instead, thouh, a novel system can be desined takin a circuit like that discussed in section where a synchronous filter, with internal low-pass filters, in a neative feedback loop around an amplifier is constructed to establish a band-stop filter. This filter is then used in another neative feedback loop of the main amplifier. In effect, the overall system is band-pass in nature. A block diaram of such a system is shown in Fiure

63 Fiure Full LNA with embedded feedback The system as shown in Fiure 3.24 is not optimized for fewest components but drawn for the simplest explanation. Several of the amplifiers are only necessary as buffers to ensure the sinal flows in the correct direction. The main amplifier could also be a common-ate. The common-ate is favorable because it has wide-band characteristics. The feedback-loop adds a band-pass characteristic to amplifier. Fiure 3.25 contains the results of a schematic simulation of the circuit in Fiure 3.24 implemented in ADS. The amplifiers are ideal voltae-controlled-voltae-sources and the mixers are ideal multipliers. The low-pass filters are first order low pass filters. There are two LO frequencies (1.5 GHz and 2.5 GHz) and two low-pass filters (50 MHz and 100 MHz -3 db cutoff). 48

64 Fiure Normalized transfer function of embedded synchronous filter The advantae of this circuit is that by chanin the LO frequency of the mixers, the center frequency of the overall amplifier correspondinly shifts. The disadvantaes are clear, thouh. For one, the circuit requires many amplifiers all of which consume D power. And to keep the out of band rejection up the ain of the amplifiers must be lare. Anytime there is lare ain, linearity becomes a concern. Another drawback is that the circuit has many components so its physical size would be lare. Finally, any system with this much active feedback can suffer from instabilities. Everythin must be meticulously checked so that the Barkhausen riterion is never met in order to keep the circuit from oscillatin. A full analysis of the stability of the circuit in Fiure 3.24 is beyond the scope of this thesis. Instead, the remainder of the thesis will be focused on the switchable cascode circuit. 49

65 HAPTE 4 EONFIGUABLE ASODE LOW-NOISE AMPLIFIES The source deenerated cascode amplifier is the state of the art choice of topoloy at F frequencies for low-noise amplifier desin. The cascode demonstrates low noise, hih ain, ood input match, ood linearity and low power consumption. The circuit diaram, with output buffer and without bias networks, is shown Fiure 4.1. One disadvantae of the cascode is a lare output impedance because of the common-ate stae. A buffer is sometimes required to be able to drive a 50 Ω load. L L Term Term1 Num=1 Z=50 Ohm tqped_ehss Q1 L Ls = tqped_ehss Q2 W=50 um N=6 L LT = T F tqped_ehss Q3 Term Term2 Num=2 Z=50 Ohm Fiure ascode LNA with output buffer The common-source amplifier suffers from the Miller-Effect. With a lare voltae ain, the effect of the ate-drain capacitance is reatly increased which severely limits the hih-frequency ain of the amplifier. With a smaller voltae ain, the Miller- Effect is decreased. The common-ate stae has a low input impedance and when added after the common-source, lowers the voltae ain of the common-source stae. The common-ate stae is a current buffer but capable of a lare voltae ain. By cascadin the staes the two staes, the cascode has a lare power ain. 50

66 4.1 Input Impedance The input impedance determines the input match of the LNA. The input match describes how much power available from the source is delivered to the circuit. For narrow-band LNAs, a narrow-band input match is helpful. Since the input matchin network helps reject out of band sinals, any out of band interferes will have a more difficult time reachin the first ain stae. Stron interferes are one of the primary culprits responsible for ain compression. By rejectin them, the input matchin network helps keep the LNA linear. The input impedance of the cascode LNA can be rouhly found usin only a first order model for the cascode. As shown in Fiure 4.2, the components that primarily determine the input impedance are the ate inductance, L G, the ate-source parasitic capacitance, GS, the source deeneration inductor, L S, and the transconductance, m. The common-ate stae does not play a pivotal role in determine the input impedance. The input impedance of a common-ate amplifier is the inverse of the transconductance. For devices with lare transconductance, the input impedance becomes small and the common-ate device can be replaced with a short circuit. 51

67 Z_IN L L s VS S2 G=m1 L Ls = Fiure Small sinal model for calculatin cascode input impedance The input impedance is then 1 ml Z IN = s( LS + LG) + + s GS GS S. (4.1) The circuit components can be chosen so that the real part of Z IN is equal to the source impedance Z 0, typically 50 Ω, and L G is then used with L S and GS to resonate out the imainary impedance at the desired frequency of operation. The inductors can be picked usin and L S = Z 0 m GS (4.2) 52

68 L G 1 = 2 0 ω GS Zo m GS. (4.3) 4.2 Gain The ain of the cascode is predominantly determined by the transconductance of common-source transistor of the cascode and to some extent the transconductance of the output buffer. The frequency response is dominated by the input ate inductor, atesource capacitance of the common-source cascode transistor, the source inductor, and the L tank between the cascode and the buffer. A small sinal model with these components is shown in Fiure 4.3. L L S V_A VIN s VS S2 G=m1 L Ls = VS S3 G=m2 L L = VS S4 G=m3 F VOUT L Fiure ascode and output buffer small sinal model The transfer function of the circuit is V V OUT IN = sll( 1 m3f) ( + ) + sl( 1+ ) + ( + ) m sls( sgs + m 1) + sgs( S + slg) s L F L m3 L F L. (4.4) 53

69 The transfer function, when written as is, can be easily broken down into the reconizable parts of the circuit. The left half fraction has the transconductance m1 which converts the input voltae into a current. The denominator is a second order low pass filter constructed from the ate-source capacitance, GS, and the two inductors which are used to set up the input match, L G & L S. The riht side fraction contains the information about the output buffer and L tank. The L tank converts the output current of the cascode into a voltae that the output buffer then uses to convert back to a voltae across the load impedance. In the cascode architecture, in terms of the ain, the transconductance of the common-ate transistor is not sinificantly important. Its primary role is to reduce the impedance seen by the common-source FET of the cascode. This effectively reduces the Miller Effect because the voltae ain of the first stae is very low. The common-ate acts as a current buffer but can contribute sinificantly to voltae ain, especially when the load of the cascode is a lare impedance (such as a hih Q tank and the ate of a small transistor in the common-source confiuration). 4.3 Output Impedance The output impedance is mostly a function of the L tank that is used to tailor the frequency response of the ain, the feedback resistor of the output buffer, and the buffer transconductance of the buffer FET. The resistance of the L tank represents the finite Q of the inductor and capacitor of the tank. If the buffer FET is small enouh, the parasitics do not play a lare role in determinin the output impedance. A small sinal model to determine the output impedance is shown in Fiure

70 F Z_OUT L L VS m Fiure Small sinal model of output buffer for output impedance The output admittance is determined to be Y OUT = 1 F + F 1 m F F sl F s. (4.5) If the transconductance is already chosen and the tank is desined, the feedback resistor F can be determined. If Z is the conjuate of the load impedance, at ω=ω 0 then F = Z m + Z. (4.6) This yields a narrow-band output match which resonates at the same resonance frequency of the tank in Fiure 4.3 (the main L tank that determines frequency response). 55

71 4.4 Noise In the LNA, the input circuit dominates noise performance. In the cascode architecture, the series resistance of the ate input inductor and internal noise sources of the common-source stae are the primary noise contributors. A small sinal model, with a simple FET model as derived in [13], is shown in Fiure 4.5. Each noise source is a thermal noise source. The values of the ate and drain current sources depend on transistor parameters includin transistor size and bias conditions. They are also correlated. The other two noises sources are uncorrelated. Fiure Small sinal model of cascode noise at input For the common-source amplifier stae, there is a minimum in the curve of the minimum noise fiure as a function of the drain-source current density (or ate-source 56

72 bias voltae). Fiure 4.6 is a sweep of the minimum noise fiure versus ate-source bias voltae for several transistors with five different ate finer widths (labeled Wx). Each device has six finers. The simulation used a TriQuint phemt model which contains more detailed information about noise than the model in Fiure 4.5. This curve can be used to find a bias voltae that will yield a potentially small noise fiure for each device size. From 450 mv to 550 mv the minimum noise fiure does not differ much for any of the devices. This ives a rane of possible bias voltaes for low noise performance. Fiure Noise fiure versus ate bias voltae for different sized devices at 3.5 GHz The other major contributor to noise is the input ate inductor. The finite Q of the inductor implies some series resistance which adds a thermal noise source before any ain. Improvin the Q of the inductor decreases the overall impact of this noise source. 4.5 Linearity The linearity of the LNA determines the maximum size sinal the amplifier can handle before the sinal is distorted to a point where it is no loner useable. Since the cascode stae has a sinificant amount of ain, the sinals seen by the output buffer are 57

73 much larer than the sinals seen by the cascode. Therefore, the output buffer is the limitin factor in determinin the linearity of the LNA. One way to improve the linearity of the output buffer is to bias the FET with a lare ate-source voltae. As the cascode swins lare sinals across the ate of the common-source buffer, the operatin reime of the transistor chanes in a non-linear manner distortin the output sinal. The major trade offs are linearity versus D current draw and optimizin for linearity while maintainin a hih quality output match. Increasin the ate voltae and the transistor size help improve the third order output intermodulation but also increase the amount of current drawn from the battery. There is a limitin factor in how much the bias voltae can be increased because there is a limit on the drain current density in the transistor technoloy. Therefore, the size of the output buffer and size of feedback resistor are the factors that predominantly determines the linearity of the LNA. Hand calculations of the output buffer would require a simple analytical model of the non-linear transconductance of the FET but no model was available. Instead, the ADS optimizer can be used instead to tune the size of the FET in the final desin. The FET model used contains non-linear information. Since the feedback resistor must be set to maintain the output match, the size of the feedback resistor is also tuned as the transconductance of the FET chanes. The ADS optimizer is capable of findin a combination of FET size and resistor size that yield ood output match while limitin distortion. A more detailed analysis with example can be found towards the end of section

74 4.6 Stability The stability of the any amplifier is important. If the amplifier is potentially unstable, it miht oscillate under certain conditions. To ensure the amplifier is stable one of many tests can be used. One simple test is the check the K- test. To be unconditionally stable, the circuit must pass three tests [14]: 1. Be stable when terminated with the system impedance 2. The K factor must be reater than 1 where K 1 = S 2 11 S S + 12 S S S 22 S 12 S The factor must be less than 1 where = S. 11S22 S12S21 Often times it is difficult to perform step 1 of the above test. onclusions drawn from the only steps 2 and 3 of the K- test do not always tell the entire story. For instance, when lookin into the drain of the common-ate stae of the cascode, the real portion of the input impedance can be neative over a certain span of frequency. If the impedance is neative enouh, the circuit could oscillate and steps 2 and 3 of the K- test miht not display that because the neative resistance is embedded between ain staes. The cure for neative resistance is to add lossy components so that if reflected waves are larer than incident waves, there is somethin to attenuate the reflected waves. In the case of the cascode, the L tank between the cascode and the buffer provides more than enouh loss to cancel out the neative resistance. are must be taken to ensure that the attenuation is enouh, thouh, or the circuit may turn out to be potentially unstable. 59

75 4.7 Bias Networks There are two types of biasin required for the cascode LNA with switches: amplifyin transistor biasin and switch biasin. The amplifyin transistors are enhancement mode transistors and require that the ate-source D bias voltae V GS be larer than zero. The switches are depletion mode devices. The depletion mode devices are off when their V GS is neative (i.e. the channel is completely pinched off) and on when V GS is zero. Biasin for the depletion mode FET switch is shown in Fiure 4.7. esistor 1 and source S1 float the transistor so that a sinle polarity supply can be used. D blockin capacitors 1 and 2 pass F sinals while not allowin any D current to escape which in turn could potentially bias the transistor in the saturation reion instead of the linear reion. D voltae source S2 is the control voltae for the switch. When S2 is hih, at V DD, the switch is on and exhibits a low resistance from source to drain. When S2 is at round, the switch is off and the drain-source resistance increases. 60

76 1 =5 pf 1 =5 kohm 2 =5 kohm tqped_phss Q1 2 =5 pf V_D S1 Vdc=VDD V_D S2 Vdc=Vswitch Fiure Biasin for d-mode switch The cascode bias requires two ate voltaes. The common-source voltae needs to be precisely controlled because small chanes in bias can alter the transconductance. The transconductance must be well controlled because the input match is tuned assumin a certain transconductance. To control the voltae precisely, a current mirror with a very stable current source is used. An extra source follower stae in the biasin helps compensate for chanes in transistor threshold voltae (due to process variation) and transistor temperature. The bias circuit is shown in Fiure 4.8. All three transistor are enhancement-mode phemts. The voltae node labeled V is applied to the ate of the common-source transistor and supplies the appropriate ate-source bias voltae. Q 1 acts like a resistor which supplies current to Q 3. The current supplied by Q 1 varies little over process variation and temperature because the current flows throuh a 1 µm wide channel 61

77 that is well controlled in size. When the source and ate are tied toether, the transistor supplies 530 µa and drops 1.8 V. Q 3 is the mirror transistor for the common-source stae. Q 2 is the source follower that helps supply extra current to the ate of the F FET. A small amount of D current can flow into the ate of the common-source amplifier in the extreme corners of process variation and at hih temperature [15]. If Q 2 were not included, the F FET would try to draw current from Q 1 and Q 3 but they cannot supply a sufficient amount of current. Under nominal conditions such as room temperature operation, ideal fabrication, and low input power to the F FET, there is no advantae to the buffer. But as conditions deviate from the ideal conditions, the buffer helps compensate for variations. The topoloy is very similar to a current-compensated BJT current mirror in which the base current of the mirror transistor and sinal transistor must be accounted for. 62

78 Vdd tqped_ehss Q1 tqped_ehss Q2 W=26 um N=1 V tqped_ehss Q3 W=31 um N=1 1 =126 kohm 2 3 =7 kohm =7 kohm Fiure ompensated bias for common-source ate voltae with three enhancement mode FETs To desin the current mirror, bein by desinin a simplified circuit as shown in Fiure 4.9. The width of FET Q 3 can be swept until V out reaches the desired output voltae. 63

79 Vdd I_D S1 Idc=530 ua Vout tqped_ehss Q3 Fiure Simple Bias ircuit Next, the F FET can be added with appropriate ate resistors 1 and 2 in Fiure 4.8 can be chosen. For resistor 2 bier is typically better but it cannot be too lare because 1 must be proportionally lare. For Q 1 to properly mirror the current throuh the F FET, the size of 1 should be 1 = 2 W F, FET W 1. (4.7) The size of Q 2 is not critical. Ideally, a small device is preferable to keep D current draw low but empirical evidence suests that a sinle 25 µm wide ate tracks best with variation in pinch off voltae. After final tunin, the circuit in Fiure 4.8 supplies 500 mv. 64

80 The raph in Fiure 4.10 demonstrates the value added by the source follower circuit. The solid line is the D current throuh a 600 µm E-mode FET where V DD = 1.65 V with the uncompensated bias circuit while sweepin the threshold voltae of the FET. As the threshold voltae increases, the drain current rapidly falls off. But when the source-follower is added, as shown with the dashed line, the current varies much less over threshold variation. Fiure 4.11 shows the value added over temperature where the solid line is the D current without the source follower and the dashed line is the D current with the source follower. [V] Fiure F FET D current with threshold voltae variation 65

81 Fiure F FET D current with temperature variation The bias of the common-ate stae of the cascode is less critical. A voltae divider is satisfactory as lon as the resistors are physically close so that they track toether in temperature and variations in processin. The output buffer is also a common-source stae. It is biased by another current mirror similar to the one in Fiure 4.8. Since the required bias voltae is hiher, Q 1 supplies more current, and the mirror transistor Q 3 is smaller. Toether, the output voltae is hiher. 4.8 Power onsumption Power consumption is always an important factor in circuit desin but is especially critical in portable applications where the primary power source is a battery with a limited amount of chare. There are always tradeoffs between power consumption 66

82 and other circuit parameters, particularly linearity, ain and noise fiure. Typically, larer D current draw results in better linearity. More current also means hiher transconductance which translates into hiher ain. And hiher ain usually means better noise fiure because power ain increases as the square of the transconductance and noise power increases linearly with the transconductance. Hiher ain in the early staes helps neate noise further down the circuit. The three amplifyin transistors are the primary source of D current draw. The bias networks and switch control voltaes also draw a miniscule amount of D current. The ate bias of the common-source stae of the cascode primarily determines the current throuh the cascode. 4.9 Switches The switches used in the new inductors and capacitors are critical to operation of the reconfiurable cascode. The switches play a key role in the determinin the Q factor of both the input ate inductor and L tank capacitor. The non-idealities of the switches, primarily the parasitic capacitance and non-zero/non-infinite on/off resistances affect the circuit performance. The best choice for switches is the depletion mode phemt. The depletion mode device exhibits a similar parasitic capacitance to the enhancement mode FET but has a lower on resistance. A small sinal circuit equivalent is shown in Fiure The equivalent circuit is composed of a parallel circuit. In the On state, the resistance is small and in the Off state, the resistance is on the order of thousands of ohms. The 67

83 capacitor is determined only by transistor size and not whether the switch is open or closed. Fiure Switch and small sinal equivalent The raphs in Fiure 4.13 and Fiure 4.14 are the simulation results of the on resistance of the switch and the associated parasitic capacitance for different values of ate lenth with a fixed number of ates (10 ates). For all FET sizes, the "off" resistance was 5000 Ω. 68

84 ON [Ω] Total Gate Width [μm] Fiure Switch "On" resistance versus ate width. par [ff] Total Gate Width[μm] Fiure Switch parasitic capacitance versus ate width The desin of the switches involves one main tradeoff between parasitic capacitance and series resistance. A larer switch has less On resistance but hiher 69

85 capacitance. At lower frequencies the capacitance miht not be important but at hih frequencies the isolation can be deraded in the Open state because the hih frequency sinals can be shorted throuh the capacitance rather than bein blocked by the lare Off resistance Spiral Inductors with Taps In order to create a reconfiurable amplifier, reconfiurable circuit elements are required. In a source deenerated cascode LNA, variations in the size of the ate inductance are capable of chanin the resonant frequency of the input impedance of the cascode. The concept behind the' tappable' inductor is shown in Fiure

86 Vctrl1 1 tqped_phss Q1 Vctrl2 2 tqped_phss Q2 Fiure Diaram of tappable inductor and switches Every metal trace has some self-inductance. The inductance is increased when the metal trace is lenthened and wrapped into a spiral structure. To electronically adjust the value of a spiral inductor turns of the spiral must be shorted out in an effort to remove them from the circuit. Usin FETs as switches, certain traces of the inductor can be shorted out effectively reducin the inductance of the structure. The FETs are imperfect, thouh, and their parasitic components affect the overall behavior of the inductor. A three band LNA requires two switches for a total of three useable settins on the inductor. To keep the Q of the inductor as hih as possible only one switch should be on at a time. Placin two switches in series to short out consecutive traces is possible but the parasitic switch resistances add toether and can reatly reduce the Q factor of the 71

87 inductor. A lumped element model that closely mimics the electromanetic simulation results of a spiral inductor without switches is shown in Fiure MUTIND MUTIND MUTIND Port P1 Num=1 Mutual Mutual1 Inductor1=L1 Inductor2=L2 Mutual Mutual2 Inductor1=L1 Inductor2=L3 Mutual Mutual3 Inductor1=L2 Inductor2=L3 Port P2 Num=2 L L L L L L Fiure Lumped element model of tappable spiral The three sections of the main spiral are broken into three separate inductors that couple as any inductors in a physical vicinity do. Each inductor also has an associated series resistance and parasitic shunt capacitors on each end. The couplin plays a key role in the model when there are no switches included. Once the switches are included, the effects of the weak couplin can be removed because they are overshadowed by the effect of the parasitics of the switches. A simple switch model is made up of a parallel circuit. A model of the inductor with switches is shown in Fiure The model is the same whether the switch is on or off. The resistance of resistors 6 and 7 is all that chanes when the switch chanes from an on state to an off state. For example, the on resistance will be several ohms while the off resistance will be several kilohms. The lare parasitic 72

88 capacitance of the switch lowers the self resonance frequency of the inductor and also increases the effective inductance below the self resonance frequency. Port P1 Num= Port P2 Num=2 L L L L L L Fiure Lumped element model of inductor and switches There is a direct trade-off in pickin the size of the FET switches. A small transistor has a low parasitic capacitance but a lare "on" resistance which reatly reduces the Q factor of the inductor. A larer FET improves the Q by reducin the parasitic resistance but at the cost of lowerin the self resonance frequency of the inductor. The type of FET used for a switch is depletion mode phemt. The depletion mode switches have a lower "on" resistance than their enhancement mode counterparts. The lumped element model with the required biasin for the d-mode phemt biasin is shown in Fiure For simplification, only a sinle switch and biasin is shown. 73

89 9 =5 pf 8 9 tqped_phss Q3 V_D S2 V_D S1 10 =5 pf Port P4 Num=2 Port P3 Num=1 L L L L Fiure Tappable inductor model with switch and switch bias The first step in desinin the 'tappable' inductor is to draw and simulate a spiral inductor for the low-band operation. Next, two taps are added at various points alon the spiral resultin in a four-port network. In the schematic simulation, the 4-port S- parameter network is used with the FET switches. A schematic with the switches, switch biasin, and a four port data block is shown in Fiure The lare 5 pf capacitors are used as D blockin capacitors. The capacitors are chosen to be 5 pf because that is upper limit for capacitors at 5 GHz in the GaAs process used. Fine tunin involves settin the overall size of the spiral structure and number of turns, the location of the taps, and the size of the switches. 74

90 Port P6 Num= Port P5 Num=1 3 ef S4P SNP1 File= 15 =5 pf =5 pf =5 pf tqped_phss Q4 18 =5 pf tqped_phss Q5 V_D S3 V_D S4 V_D S5 V_D S6 Fiure port network for inductor with switches and biasin 4.11 Switchable apacitors To control the frequency response of the ain, the capacitance for the tank between the cascode and output buffer is adjusted to resonate at the desired frequency of operation. The cascode has an inherent roll-off of ain as frequency increases. By adjustin the shunt capacitance instead of the inductance, the ain roll off can be compensated for because the larer capacitance settins have a lower Q. The parasitic series resistance of the switches lowers the Q of the capacitors and plays a more 75

91 sinificant role in determinin the Q factor of the capacitance when the switch is "on" rather than "off." The schematic of the adjustable capacitor is shown in Fiure Port P1 Num=1 3 Vdd tqped_phss Q1 2 Vc1 4 Vc2 tqped_phss Q2 4 Fiure Schematic of adjustable capacitor with switches and biasin The entire adjustable capacitance structure is made of four capacitors and two FET switches. For low frequency mode, both switches are "on." For mid-band operation one switch is turned off while the other remains on. For hih band mode, both switches are turned off. The parasitic capacitances of the switches in series with the lare parallel 76

92 plate capacitors add toether and total enouh capacitance to resonate with the inductor at the desired frequency. To desin the adjustable capacitor, there are three derees of freedom to take into consideration: capacitors 1 and 2 of Fiure 4.20 which are in series with transistor Q 1, capacitors 3 and 4 which are in series with transistor Q 2, and transistors Q 1 and Q 2. To simplify the desin several assumptions are made: 1 is the same size as 2, 3 is the same size as 4, the size of transistors Q 1 and Q 2 is the same, the parasitic capacitance of the switches is much smaller than the capacitance of the parallel plate capacitors ( 1-4 ), the "on" resistance of the switches is zero, and the "off" resistance is infinite. Fiure 4.21 shows the schematic of the capacitance structure (without biasin) and the three states that the structure can be in for low-band, mid-band, and hih-band operation. For lowband operation, both Q 1 and Q 2 are on. For mid-band operation, Q 1 is on and Q 2 is off. For hih-band operation, both Q 1 and Q 2 are off. 77

93 1 Port P1 Num=1 3 1 Port P1 Num=1 3 1 Port P1 Num=1 3 1 Port P1 Num=1 3 Vdd 1 2 par par1 par 3 tqped_phss Vc1 Q1 2 4 Vc2 tqped_phss Q Fiure From left to riht: Switchable apacitance circuit, low band equivalent circuit, mid band circuit, and hih band circuit Assumin that the size of the capacitance required for the three modes of operation are known, the equivalent circuits in Fiure 4.21 can be used to enerate three equations and three unknowns = = MB 2 2 = par HB LB. (4.8) Solvin for 1, 3, and par yields 1 3 = par 2 = 4 = 2 = 2 = 2 HB MB ( ). LB MB. (4.9) To find the required sizes of switches based on the parasitic capacitance, the raph like that of Fiure 4.14 of section 4.9 can be used. 78

94 4.12 Bond Wires & ESD Protection Fiure 4.22 shows the schematic of components between the bench top power supply and V DD for the LNA. Inductor L 1 represents a 1 meter cable between the power supply and the connector on the PB. apacitor 1 is a lare surface mount capacitor on the circuit board to supply extra current to the LNA if the power supply is too sluish to source current at hih frequency. Inductor L self_res is parasitic inductance of the SMT capacitor that ives the capacitor a self resonance frequency. The bond wire is approximately 0.5 nh. 2 is an on chip capacitor to further help keep the power supply clean. The bond wire and on chip capacitor resonate just below 2 GHz and add an out of band bump in the ain. esistor 1 is necessary to suppress as this resonance near the LNA's band of operation. Pow er Supply 3.3 V L L1 L=1 uh 1 =1.0 uf L Bond_Wire L=0.5 nh 1 =5 Ohm tqped_dml ESD_Diode w =100 um Vdd tqped_dml ESD_Diode1 w =100 um L L_self_res L=1.0 nh 2 =15 pf x3 x7 GND Fiure Bond wire and ESD for V DD ESD Diode and ESD Diode1 are on chip diodes to protect the circuit from electrostatic dischare. ESD Diode is made up of three series diodes, and ESD Diode1 is made up of seven series diodes. The three series reverse bias diodes bein shuntin current to round if for any voltae below V. The seven forward bias diodes shunt any current to round 79

95 when the voltae oes over 5 V. This ESD protection keeps the drains and sources of all the transistors safe. For the ate on the first common-source transistor, the input capacitance has been shown to be a very satisfactory protector of the transistor from ESD damae. The switches also require ESD protection and use the same setup as the V DD circuit. The on board 1 µf capacitor is not necessary and neither is the small resistance in series with the 15 pf capacitor. The schematic is shown in Fiure Pow er Supply 3.3 V SPDT Sw itch L L1 L=1 uh L Bond_Wire L=0.5 nh tqped_dml ESD_Diode w =100 um Vsw itch tqped_dml ESD_Diode1 w =100 um 2 =15 pf x3 x7 GND Fiure Bond wire and ESD for switches 4.13 Desin of ascode in this Thesis The first step in the desin of a new circuit is to list the oals and specifications of the circuit. For this circuit the primary oal is to construct an LNA that is electronically reconfiurable with three bands of operation at 2.5 GHz, 3.5 GHz and 5.5 GHz. The technoloy used will be the 0.5 µm TriQuint Semiconductor PED phemt process with enhancement mode and depletion mode transistors. The LNA is to have an input match and output match of at least 20 db, at least 15 db of transducer ain, a noise fiure better than 3 db and an input referred compression point above -10 dbm. The input third order 80

96 intermodulation power should be at least 5 dbm. The LNA is to operate with a sinle 3.3 V D power supply and draw no more than 20 ma of quiescent current not includin the output buffer. The die size should be at most 2 mm by 1 mm. The first step in desinin the LNA is to desin the cascode. The cascode desin beins with pickin the common-source transistor bias and transistor size. Usin Fiure 4.24, the optimum ate bias voltae for lowest noise fiure is around 500 mv for devices with six ate finers with a width ranin from 50 µm to 250 µm. Fiure 4.26 is a plot of IIP3 and the D drain current swept for various ate widths for the circuit in Fiure For each different transistor size, the ate and source inductors are tuned to ive an optimum input match at 2.5 GHz. The load is 5 Ω to approximate the input impedance of the common-ate stae of the cascode. As the drain current increases, so does input power. At 600 µm, the drain current is 15 ma which ives 5 ma marin from the spec. The common-source stae of the cascode is then chosen to have 6 ate finers each bein 100 µm lon. This also ives plenty of headroom for IIP3 spec of 5 dbm because at 600 µm the stae has an IIP3 of over 5 dbm. 81

97 Fiure Minimum noise fiure as a function of ate-source voltae V_D S2 Vdc=3.3 V D_Feed D_Feed1 I_Probe I_drain L LG P_nTone POT1 Num=1 Z=50 Ohm Freq[1]=2.495 GHz Freq[2]=2.505 GHz P[1]=dbmtow(Pin) P[2]=dbmtow(Pin) D_Block D_Block2 D_Feed D_Feed2 V_D S1 Vdc=0.5 V tqped_ehss Q3 L LS D_Block D_Block1 vout Term Term2 Num=2 Z=5 Ohm Fiure ommon-source stae for linearity measurements 82

98 50 25 D Drain urrent [ma] IIP3 [dbm] D urrent IIP Gate Finer Width * Number Finers Fiure IIP3 and D current as a function of total ate width The next step in the cascode desin to pick the size and bias of the common-ate transistor. The bias is chosen such that half the voltae supply drops across the commonate and the other half drops across the common-source. There is a trade off in the size of the cascode transistor. As the transistor ets larer, the transconductance increases which decreases the voltae ain of the common-source stae. The common-source stae is plaued by the Miller effect and by decreasin its load, and therefore voltae ain, the bandwidth increases. Since the hihest frequency of operation is 5.5 GHz and the unity ain frequency is 30 GHz, any additional bandwidth can be extremely helpful. The tradeoff arises because as the common-ate transistor is increased in size to ain bandwidth, the linearity of the stae drops [16]. Fiure 4.27 plots both the -3dB point of the cascode and the IIP3 for various sizes of common-ate transistors. The two input tones are at GHz and GHz. The ate and source inductors are tuned to ive the input match for best return loss. The bandwidth plateaus after the transistor ets near 400 µm total lenth. The common ate transistor is chosen to be 65 µm width 6 finers 83

99 (390 µm total). The IIP3 is sacrificed about 0.5 db under the oriinal spec in order to obtain the extra bandwidth f -3 db [MHz] IIP3 [dbm] f-3db IIP Gate Finer Width * Number Gate Finers Fiure f -3db and OIP3 for various sizes of common ate transistors The ate bias of the common-ate is tuned to 2.1 VD. This results in a 1.65 V droppin across the common-ate and 1.65 V droppin across the common-source. The next step is to desin the source-inductor of the common-source stae. This inductor increases the real portion of the input impedance of the cascode to the system impedance, 50 Ω. The transconductance of the common-source transistor is 175 ms and its ate-source capacitance is around 870 ff. To find the size of the inductor use L S = Z 0 m GS. (4.10) Accordin to equation (4.10, the source inductor should be approximately 250 ph. After final tunin, the required inductor was closer to 300 ph. 84

100 After the size of the source inductor is chosen, the ate inductor needs to be desined. The first step to desinin this inductor is to find the size of inductance required for each band. They can be approximated usin L G 1 ZoGS ω. = 2 0 GS m (4.11) Pluin in values for the three bands of operation yields the followin table Table equired cascode ate inductance Band Inductance [nh] Inductance after tunin [nh] 2.5 GHz GHz GHz The inductors need to be slihtly larer than expected because there is still some Miller effect and other stray capacitance. The next step is to desin a 5.6 nh inductor. Each windin is 15 µm and the spacin between turns is 8 µm. For the GaAs process used to fabricate the LNA, these values have yielded hih quality factor inductors. The final spiral shape used in the LNA has 3.5 total turns and is 470 µm lon and 218 µm wide. This structure yields an inductance of only 4.7 nh and a Q of 22 at 2.5 GHz. The inductor winds up bein smaller than expected because once the parasitic capacitance of the switches are in parallel with the inductor they end up increasin the amount of positive reactance below the self resonance frequency (althouh they do lower the self resonance frequency itself). 85

101 Extra metal traces that tap into the spiral are added and switches are added to connect the input of the inductor to the taps. The taps are tuned by slidin them up and down the sides of the main inductor until the input match is centered at the desired frequency. The ratio of the heiht to lenth of the main inductor miht also need to be adjusted so that the taps can remain on the sides. Fiure 4.28 shows the main inductor and the tap locations. The arrows indicate where the taps can travel to tune the match frequencies. 86

102 Fiure Final cascode input inductor with taps for switches The width of the switches is tuned so that the bottom input of the inductor is connected to one of the taps on either side of the inductor. The number of ates is also important because it, alon with the ate finer width, determines the switch parasitics 87

103 which play a key role in tunin the input circuit. The switch capacitance increases the effective inductance but also decreases the self resonance frequency. The switch size also determines Q of the input inductor. For the mid-band switch, the final size has 5 ate finers that are 300 µm wide. The switch to operate the LNA at hih band has 4 ate finers that are 470 µm lon. The input inductor is simulated in the electromanetics simulator. The S- parameters of the input inductor and switches are then simulated in the schematic simulator and summarized in Table 4.2. Table Input inductor with switches simulation results Frequency [GHz] Inductance [nh] Q Ideally the cascode's drain bias inductor would be an on-chip spiral inductor used in the L tank that determines the frequency response of the ain. Unfortunately, the bond wire (approximately 0.5 nh) resonates with the on-chip 15 pf power supply capacitor. This resonance adds a hump to the ain around 1.8 GHz. To help suppress the resonance, the drain bias inductor must be increased reatly in size to lower the resonance frequency. The bias inductor winds up bein an on-chip inductor with 8.5 turns with 8 µm spacin and 8 µm spacin trace width. At 2.5 GHz, the inductor has 23 nh of inductance and a Q of

104 The schematic of the circuit up to this point is shown in Fiure The input inductor is shown as all three inductors in parallel (L 4, L 5, & L 6 ) but in the actual circuit, only one of these three inductors is ever in use. 1 =5.0 pf InDQ2 L4 L=4.65 nh Q=5.11 F=2.5 GHz InDQ2 L5 L=2.54 nh Q=2.98 F=3.5 GHz InDQ2 L6 L=1.54 nh Q=3.35 F=5.5 GHz 2 =5.0 pf 1 =5 kohm tqped_ehss Q1 W=100 um N=6 V_D S1 L L1 Vdc=0.5 V L=300 ph = tqped_ehss Q2 W=65 um N=6 V_D S2 Vdc=2.1 V 3 =5.0 pf InDQ2 L3 L=23 nh Q=15 F=2.5 GHz V_D S3 Vdc=3.3 V Fiure LNA schematic - cascode half The L tank is the next stae to be desined. A small inductor and lare capacitor yield a more narrow pass-band. The inductor is chosen to be 0.6 nh. Anythin much smaller is difficult to build and keep the Q hih because the trace widths must be made increasinly smaller to allow a spiral structure to form and to keep the spiral from overlappin upon itself. The switchin capacitor circuit is desined usin the outline laid out in section First the required capacitances to resonate at the desired frequencies are calculated. Then the equations ive approximate values for the size capacitors and switches. Final tunin is required. The circuit used in the LNA is shown in Fiure When both Q 1 and Q 2 are on, the entire circuit acts as one lare capacitor for the low band operation. For mid band operation, Q 1 is turned off and Q 2 remains on. For hih band operation, 89

105 both transistors are off. The parasitics from the transistors are lare enouh that when both switches are off, the entire circuit acts a lare enouh capacitor to enable hih frequency operation. Table 4.3 summarizes the total capacitance and Q at the three operatin frequencies. Port P1 Num=1 1 =7.2 pf Vdd 3 =4.7 pf 1 =5 kohm 2 =5 kohm tqped_phss Q1 W=200 um N=4 2 =7.2 pf 3 =5 kohm Vctrl1 4 =5 kohm Vctrl2 tqped_phss Q2 W=80 um N=10 4 =4.7 pf Fiure Switchable capacitor bank Table apacitance and Q of switchable cap Freq apacitance [pf] Q

106 The output buffer is a common-source amplifier with resistive feedback. The transistor is biased with a hiher ate voltae than the previous staes to help increase the linear rane of the LNA. The ate-source voltae is chosen to be 900 mv which is about 100 mv below the threshold for maximum drain current density to allow for some marin. To pick the transistor size, a device is chosen to draw 10 ma to keep the total current draw near 20 ma. This transistor has three finers that are 14 µm lon. The feedback resistor is then tuned in ADS to ive the best linearity and output match but unfortunately with such a small transistor, the linearity is never up to spec. Instead of manually tunin the size of the transistor and resistor combination, the ADS optimizer can be used to improve the output match and OIP3 by simultaneously sweepin the size of the FET and feedback resistor used in the output buffer. The oals of the optimizer are OIP3 of better than 20 dbm and S(2,2) of less than -15 db at the center frequency. The optimizer ives a transistor with 3 ate finers each bein 40 µm lon and 200 Ω feedback resistor. The complete LNA has an OIP3 of at least 15 dbm for all three bands. This is less than the taret OIP3, but to keep the D current draw low, the linearity has to be sacrificed. An output match for the two upper bands is within 1 db of the oal. The output match of the lower band is sacrificed. The D current draw ends up bein nearly three times the oriinal amount by drawin 28 ma. The schematic for the output buffer is shown in Fiure

107 Port P1 Num=1 F 2 =200 Ohm =5 pf 2 =5 kohm V_D S4 Vdc=900 mv 1 =5 pf tqped_ehss Q1 W=40 um N=3 Port P2 Num=2 InDQ2 L3 L=23 nh Q=15 F=2.5 GHz V_D S3 Vdc=3.3 V Fiure ascode LNA Output buffer The bias circuits for both common-source transistors are made from the current mirrors discussed in section 4.7. The sizes of the transistors in the current mirror are tuned to ive the appropriate 500 mv and 900 mv. These are then used as the atesource bias voltaes for the common-source stae of the cascode and output buffer, respectively. The bias for the common-ate stae does not need to be as well controlled and a resistive divider is satisfactory. An additional hih-pass filter at the output helps squelch the resonance created by the bond wire and on-chip power supply capacitor. The filter is a three element hih pass filter with a f -3dB point of 2 GHz. The filter is desined usin a maximally flat low-pass prototype and transformed to into a hih-pass filter [17]. The schematic for the filter is shown in Fiure

108 1 =1.592 pf L 2 L1 =1.592 pf L=1.989 nh = Fiure Third order 2 GHz maximally flat hih-pass filter in Fiure A full schematic of the LNA includin bias circuits and ESD protection is shown 93

109 Fiure Full LNA Schematic 94

110 Fiure 4.34 summarizes the S-parameter simulation results of the LNA. The results are summarized in Table 4.4 and Table 4.5. The capacitors and inductors are simulated, one component at a time, in the electromanetic simulator and their resultin two-port S-parameters are used in the schematic simulations. The complete set of simulation results can be found in appendix A2. Fiure Summary of LNA S-parameter simulations 95

111 Table Summary of LNA schematic simulations Freq Gain Input Output Noise IIP3 OIP3 Input I D [GHz] [db] Match Match Fiure [dbm] [dbm] P 1dB [ma] [db] [db] [db] [dbm] The measurement frequencies for the 2.5 GHz intermodulation test were GHz and GHz. For the 3.5 GHz intermodulation test the measurement frequencies were GHz and GHz and for the 5.5 GHz intermodulation test, the test frequencies were GHz and GHz. Table 4.5 compares the in-band and out-of-band ain for the LNA in its three different operatin states. The low-band shows the best out-of-band rejection and the hih band shows the worst rejection. Table Gain of LNA in-band and out-of-band Low Band Operation Mid Band Operation Hih Band Operation Transducer Gain [db] Freq = 2.5 GHz Freq = 3.5 Ghz Freq = 5.5 GHz

112 4.14 Two-Band LNA versus Two Sinle-Band LNAs with Switches It is useful to compare the new reconfiurable LNA desin to a previous standard. Instead of havin a reconfiurable LNA, traditional receivers have a switchin network and several sinle-band LNAs. The switches control which LNA is in the receiver chain. A block diaram of this is shown in Fiure Fiure Block diaram of switches and LNAs For comparison purposes two systems were desined and simulated in ADS. One system had two sinle-band LNAs desined to operate at 2.5 GHz and 5..5 GHz. A SPST switch was also desinedd usin a series-shunt-series confiuration. The four switches and two LNAs were combined to form a section of a receiver front end. A two band reconfiurable LNA was also desined to operate at the same frequencies. The oal of the simulation is compare the traditional approach of LNA and receiver desin to the newly proposed approach. The key differences between the two desin is the location of switches in the circuit, the size of the switches, and the complexity of the switches. For the reconfiurable LNA, the switches are sinle FETs. For the traditional desin, each switch needs 3 transistorss to ensure low On resistance and ood Off isolation. If a sinle FET is used as a switch in the traditional desin, one of the two parameters 97

113 mentioned prior is insufficient for acceptable performance. For example, if the FET is lare, the switch has a low On resistance but the parasitic capacitance is so lare that the Off isolation is unacceptable. The parasitics of the switch ruin the input match that the LNA that is on presents to the input port. Since the input match is ruined, the noise fiure is also worsened. The ain shape remains uneffected. For simulation purposes, the resistors and capacitors are ideal, linear passive components. The inductors are individual electromanetic simulations. The transistors are 0.5 µm TriQuint GaAs phemt models. The schematic of one of the switch blocks is shown in Fiure Depletion mode phemts are chosen because they have a lower On resistance than their enhancement mode counterparts. To simplify the analysis the effects of the bond wires and ESD circuitry are inored. Port P1 Num=1 1 =8.0 pf tqped_phss Q101 W=100 um N=5 2 =8.0 pf 5 =8.0 pf 4 =8.0 pf tqped_phss Q102 W=100 um Port N=5 3 =8.0 pf P2 Num=2 2 =5 kohm V_D S1 Vdc=3.3 V 1 =5 kohm V_D S7 Vdc=3.3 V tqped_phss Q103 W=100 um N=5 6 =8.0 pf 5 =5 kohm V_D S8 Vdc=3.3 V 6 =5 kohm V_D S6 Vdc=3.3 V 4 =5 kohm V_D S4 Vdc=3.3 V 3 =5 kohm V_D S9 Vdc=3.3 V Fiure Schematic of three FET switch The schematic of the 2.5 GHz LNA is shown in Fiure 4.37 and the 5.5 GHz in Fiure The only differences between the two circuits are the values of the components. Otherwise, the circuits are the same. They are the same type of cascode and output buffer as used prior. 98

114 Port P1 9 Num=1 =8.0 pf L L1 L=4.37 nh = 1 =5 kohm tqped_ehss Q1 W=100 um N=6 V_D S1 Vdc=0.5 V L L2 L=0.48 nh = tqped_ehss Q2 W=65 um N=6 V_D S2 Vdc=2.1 V L L3 L=2 nh = V_D S3 Vdc=3.3 V 3 =1.35 pf 5 =5.0 pf 3 =5 kohm V_D S4 Vdc=0.9 V 2 =500 Ohm tqped_ehss Q3 W=40 um N=3 7 =5.0 pf L L5 L=2 nh = V_D S5 Vdc=3.3 V 6 =5.0 pf Port P2 Num=2 Fiure Schematic of low-band cascode Port P3 12 Num=1 =8.0 pf L L6 L=1.38 nh = 7 =5 kohm tqped_ehss Q8 W=100 um N=6 V_D S9 Vdc=0.5 V L L9 L=0.54 nh = tqped_ehss Q6 W=65 um N=6 V_D S11 Vdc=2.1 V L L7 L=.6 nh = V_D S12 Vdc=3.3 V 10 =0.8 pf 15 =5.0 pf 10 =5 kohm V_D S14 Vdc=0.9 V 9 =1000 Ohm tqped_ehss Q7 W=40 um N=3 13 =5.0 pf L L8 L=2 nh = V_D S13 Vdc=3.3 V 14 =5.0 pf Port P4 Num=2 Fiure Schematic of hih-band cascode The schematic of the reconfiurable LNA is shown in Fiure 4.39 and is very similar to cascode in section The major difference is that this LNA only operates over two bands instead of three bands. The input ate inductor is shown in Fiure This inductor only has one additional tap that is connected to a FET switch to short out a portion of the inductor traces. 99

115 Fiure Schematic of reconfiurable 2 band LNA 100

116 Fiure Drawin of input spiral inductor for reconfiurable LNA The simulation results for both circuits are compared side by side in Fiure 4.41 and Fiure 4.42 and the results are summarized in Table

117 S(1,1) [db] econfiurable LNA m2 m2 freq= 2.520GHz db(s(1,1))= Valley Frequency [GHz] Switches and Sinle-Band 0-5 LNAs S(1,1) [db] m9 m9 freq= 2.560GHz db(s(1,1))= Valley Frequency [GHz] S(2,1) [db] Noise Fiure [db] Output Power [dbm] m1 m5 m5 freq= 2.500GHz nf(2)= Frequency [GHz] m1 freq= 2.510GHz db(s(2,1))= Peak Frequency [GHz] Input Power [dbm] S(2,1) [db] Noise Fiure [db] Output Power [dbm] m2 m2 freq= 2.530GHz db(s(2,1))= Peak m3 Frequency [GHz] m3 freq= 2.500GHz nf(2)= Frequency [GHz] Input Power [dbm] Fiure Low-band comparison of reconfiurable LNA versus traditional LNA 102

118 S(1,1) [db] econfiurable LNA m2 freq= 5.510GHz db(s(1,1))= Valley m Frequency [GHz] Switches and Sinle-Band 0-5 LNAs S(1,1) [db] m9 freq= 5.470GHz db(s(1,1))= Valley m Frequency [GHz] S(2,1) [db] Noise Fiure [db] Output Power [dbm] m1 m5 freq= 5.500GHz nf(2)=2.719 m Frequency [GHz] m1 freq= 5.490GHz db(s(2,1))= Peak Frequency [GHz] Input Power [dbm] S(2,1) [db] Noise Fiure [db] Output Power [dbm] m2 m2 freq= 5.510GHz db(s(2,1))= Peak Frequency [GHz] m3 m3 freq= 5.500GHz nf(2)= Frequency [GHz] Input Power [dbm] Fiure Hih-band comparison of reconfiurable LNA versus traditional LNA 103

119 Table omparison of reconfiurable LNA versus traditional LNA with switches Frequency [GHz] econfiurable LNA econfiurable LNA Traditional LNA and Switches Traditional LNA and Switches Input eturn Loss [db] Gain [db] Noise Fiure [db] IIP3 [dbm] OIP3 [dbm] Input P1dB [dbm] Output P1dB [dbm] I D [ma] Several interestin conclusions can be drawn from the comparison above. First, the input match and noise fiure for both circuits are ood over both bands. The input match is better than 20 db in all four scenarios. For the low-band, the noise fiure is always better than 2 db and at hih band better than 3 db. The major discrepancy starts with the difference in ain between the reconfiurable architecture and the traditional LNA architecture. The problem stems from the Q factor of the capacitors in the L tank between the cascode and the output buffer. In the reconfiurable architecture, the Q of the capacitors is lowered because of the switchin FET resistances. In the circuit in Fiure 4.39, in low-band operation, the Q of the switchable capacitor is only 12 at 2.5 GHz. 104

120 For the linearity, the output compression powers and OIP3 powers are similar between the new and traditional circuits. The input powers are less for the traditional topoloy because of the additional ain. The output buffer is main limitin factor of the linearity of the circuit. Because there is a sinificant amount of ain from the cascode, the output buffer must deal with lare sinals. The difference in D current between the circuits is due to different sized inductors that connect the drain of the cascode to the voltae supply. The switches do not draw a sinificant amount of current. One of the advantaes of the reconfiurable circuit is that it should require less die area because a lare amount of circuitry is reused instead of duplicated. The list of lare reused components includes the D choke inductors, cascode FETs, cascode ate inductor, D blockin capacitors, D bypass capacitors, and ESD diodes. The total die space required for all these components for a sinle band LNA is approximately 430,000 µm 2 if simply placed side by side. A list of the components and their sizes can be found in the appendix. To make the LNA reconfiurable by addin a second band of operation, the circuit would need to be increased in size to approximately 580,000 µm 2. The additional space is required for additional FET switches, more ESD protection and more lare D bypass and blockin capacitors. In comparison, two sinle-band LNAs would require 860,000 µm 2 in addition to the area required for the series-shunt-series switches. Each series-shunt-series switch adds an additional 37,500 µm 2 and 4 switches are required totalin an additional 125,000 µm 2. In total, two sinle band LNAs and 4 switches would require over 1,000,000 µm 2 in comparison to the 580,000 µm 2 required for the reconfiurable LNA. The two band reconfiurable LNA is nearly 50% smaller 105

121 than the traditional approach. The space savin benefit of the reconfiurable LNA is further enhanced as more bands of operation are added because the additional space required for the reconfiurable LNA is much less per added band of operation. There are also drawbacks to the new desin, thouh. The reduction in ain due to the low Q capacitors is one problem. Also, if the specifications for the LNA are very riorous, such as a lare amount of rejection at a particular frequency (such as a harmonic of the operatin frequency or possible stron interferer), the separate LNAs are easier to desin because any additional circuitry added will not affect the behavior of the receiver in other operatin modes Layout of three Band LNA The physical layout of an LNA is a fundamental factor in determinin its performance. There are many factors that influence circuit behavior includin the sizes and shapes of components and where they are located in relation to each other. Software simulations help predict performance as well. Full simulations of all passive components are possible with Ailent's Momentum simulator. The passive components used in the LNA include resistors, capacitors and inductors. Other structures include bond pads and round vias. esistors are made from a sinle layer of resistive material includin Nichrome resistors (50 ohm / square) and a hih resistance material (320 ohm / square). Bond bands are three metal layers thick and round vias reach from the top metal layer to the back of the substrate in order to reach the round plane of the PB underneath the die. 106

122 MIM capacitors are made from sandwichin dielectric between metal plates and produce a capacitance of 630 pf/ mm 2. Spiral inductors are made from a rectanular spiral structure of a 4 µm thick metal layer. Since GaAs is a semi-insulatin substrate, the Q factor of the inductors can reach as hih as 30 in comparison to the Q of 5-10 commonly found in silicon FIs. The FETs are a multi-finer phemt devices with a 0.5 µm ate lenth. The process used supports both enhancement mode and depletion mode phemts. A cross sectional view of the die is shown in Fiure Fiure ross section of die [18] To layout the LNA described in section 4.13, the first step is to set a oal size for the layout. For this desin, 2 mm by 1 mm was the oal. The final desin fit into a rectanle 1.85 mm by 1 mm for a total area of 1.85 mm 2. The final layout that was 107

123 fabricated as shown in Fiure Each circuit component is labeled with respect to the schematic diaram in Fiure 4.33 on pae 93. The components labeled "SVIA" are the substrate vias that o all the way throuh the substrate and typically contact the round plane of the PB or packae to which the circuit die is attached. The ESD diodes are labeled as roups of series-connected diodes to minimize clutter. 108

124 Fiure LNA Layout 109

125 The input round-sinal-round structure is at the bottom of the fiure and the output is taken from the GSG structure at the top of the fiure. The GSG structure supports the use of a probe station with a 150 µm pitch probes. The three pads are 100 µm square. The outer pads are shorted to round with the substrate vias (octaons). The middle pad connects to the 5 pf D blockin capacitors which subsequently connects to the switchin inductor. The lare switchin transistors lie to either side of the inductor. Both the bottom left and riht corners contain the ESD circuitry. The 10 diodes and 15 pf capacitors make up a lare portion of the die contents. The cascode transistors are in the center of the layout. Above the cascode are the switchin capacitors and their associated lare switchin transistors. The output buffer lies above the switchin capacitors. Finally, the top GSG structure allows a probe station to probe the output sinal. The bias circuits are on the left side of the layout. They are above and below the lare spiral drain inductors. The circuit contains six spiral inductors. The spiral inductors take up a lare portion of the die. In layin the circuit out, the spirals were separated as far apart as possible to avoid any mutual couplin. In an earlier desin, the two smaller spirals in the middle of the layout were close toether. EM simulations showed they were couplin. By movin them over 100 µm apart, the couplin lessened and the effect of the couplin waned. The fabricated die is shown in Fiure 4.45 mounted on the PB with the bond wires for the D sinals soldered on. Fiure 4.46 is zoomed out to show more of the PB, and the on-board capacitor can be seen in the upper left corner. The dead space 110

126 (solid black area) above and below the circuit in the die were added for manufacturin reasons and the extra area is not included in the desin spec. If the LNA were the only circuit to be fabricated on the wafer, the dead space would not be necessary and the die size would be smaller. The die with dead space is 1.8 mm in the horizontal direction shown in Fiure 4.45 and 2 mm in the vertical direction. Without the dead-space, the die would be 1.8 mm in the horizontal and 1 mm in the vertical. Fiure LNA die on PB - zoomed in 111

127 Fiure LNA die on PB - zoomed out 112

128 HAPTE 5 MEASUEMENTS 5.1 Introduction One-hundred and seventy four die were produced by TriQuint Semiconductor with the circuit layout in Fiure 4.44 in section 4. Five printed circuit boards were manufactured. For each PB, one die was soldered directly to the PB pictured in Fiure 5.1. The red area is copper and in the blue area the copper is trimmed off. An additional 1 µf surface-mount capacitor was soldered onto the board to smooth out the power supply current. This is shown in Fiure 5.2 with a closer view of the center of the PB. Fiure 5.3 shows the die and bond wires that were soldered from the die to the PB. 113

129 Fiure PB used for measurements 114

130 Fiure PB with SMT capacitor 115

131 Fiure PB with bond wires and die The PBs were numbered 8256, 8257, 8258, 8259, & 8260 for easy identification. The D power, round, and D control lines were wire-bonded bonded directly to the P board. The F was not connected to the board and measured instead with a probe station. The input match of cascode, especially at hiher frequencies, is reatly affected by the ate inductance, and wire wire-bonds bonds add a sinificant amount of inductance. To avoid this effect, it was determined that the probe station would yield more accurate results. Also, the circuit die was not packaed. Packae parasitics can also cause deviations in expected behavior. Without an enclosin packae and with a little care to not destroy the I circuit elements, the pprobe robe station measurements were a ood choice. The switches to control on on-chip chip electronics were ubiquitous SPDT tole switches. Each switch had three short wires soldered onto each lu. The wires were 116

132 plued into a breadboard. The throws of the switch were attached to V DD and round. The pole of the switch went to the PB which then ran to the circuit die throuh a bond wire. The onboard ESD diodes kept the I safe from electrostatic dischare. The setup is shown in Fiure 5.4. Fiure Test setup for measurements Four of the most important roups of circuit parameters were measured: S- parameters, noise performance, linearity, and D power consumption. The S-parameters were measured usin a network analyzer. Noise was measured with a noise fiure analyzer that ave the noise fiure of the LNA. The linearity was measured with a spectrum analyzer and yielded input and output intermodulation distortion and the P1dB compression point. D current was measured with ammeter in series with the power supply. The measurements took a toll on the five Is. S-parameters were measured first. The probe tips destroyed the output matchin network and landin pads of one of the Is renderin it unable to be measured. Next the ain compression was measured durin which another board unexpectedly quit workin leavin only three complete sets of 117