Isolated Single-phase AC Grid Connected Converter With small Inductors and Capacitors for Micro-inverters

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1 Iolated Single-phae AC Grid Conneted Converter With mall Indutor and Capaitor for Miro-inverter Hiroki Watanabe Department of Eletrial engineering Nagaoka Univerity of Tehnology Niigata, Japan Jun-ihi Itoh Department of Eletrial engineering Nagaoka Univerity of Tehnology Niigata, Japan Abtrat In thi paper, a high power denity ingle-phae inverter for photovoltai ytem i preented. The propoed onverter onit of a reonane-type iolated DC/DC onverter, a power deoupling iruit and a urrent oure inverter (CSI). In partiular, the volume redution of apaitor and indutor i foued. Conequently, a leakage indutor of a enter-tapped tranformer i ued a a DC indutor intead of a large indutor. In addition, the redution of the input voltage ripple into the DC ide without a large moothing indutor or an eletrolyti apaitor i ahieved. Finally, the propoed onverter alo ahieve a zero urrent withing (ZCS) for all withing devie. A a imulation reult, the input voltage ripple due to the ingle-phae power flutuation i under than 5%, and the total harmoni ditortion (THD) of the inverter output urrent i le than 5%. In addition, the deign of the reonane omponent i diued. It i oberved from the imulation and the experimental reult, that the high quality fator Q hould be deigned in order to ahieve the tability of the reonane urrent. Keyword Photovoltai; grid onneted inverter; ative power deoupling; flying apaitor DC-DC onverter; ingle-phae power ripple. I. INTRODUCTION Reently, Photovoltai (PV) ytem ha been reearhing atively a a utainable power olution. In order to ahieve the flexibility, high ytem effiieny, and low manufaturing ot, utilization of the miro-inverter may beome a trend for future PV ytem intead of uing large apaity inverter [1]-[7]. In partiular, the miro-inverter require the high reliability beaue many onverter unit are adopted to the PV ytem. In order to atify thee requirement, many onverter topologie have been tudied [8]-[10]. In general, the power onverter ytem (PCS) need the iolation between the PV ide and the ingle-phae AC grid ide beaue the leakage urrent our on the power line and the earth ground. Thu, a noniolated PCS often require a bulky iolation tranformer with ommerial frequeny to AC grid ide. The miro-inverter ytem need many onverter unit. Thu the ommerial frequeny iolation tranformer inreae the ytem volume. On the other hand, the miro-inverter with the high frequeny tranformer uh a a fly-bak and a reonane-type DC/DC onverter ha been tudying. In partiular, reonanetype DC/DC onverter ahieve a ZCS or Zero voltage Swithing (ZVS) utilizing the reonane. However, the onverter effiieny dereae in omparion with the noniolated type onverter beaue of the tranformer lo. In order to eliminate the large eletrolyti apaitor, an ative power deoupling method have been tudied [11]-[17]. In the DC to ingle-phae AC grid onnetion ytem, the large eletrolyti apaitor i required beaue the intantaneou power flutuation at the twie grid frequeny our due to the ingle-phae AC grid, and it deay the performane of the maximum power point traking (MPPT). Beide, the eletrolyti apaitor limit the life-time of the onverter due to the Arrheniu law. On the other hand, the ative power deoupling method an redue the apaitane for the intantaneou power flutuation ompenation, and a mall film or a erami apaitor an be ued intead of the large eletrolyti apaitor. In addition, the elimination of the indutor i important for the high power denity deign. In partiular, the high frequeny operation an redue the indutane greatly. In thi ae, the redution of the withing loe i the key tehnology to ahieve both the high effiieny and high power denity by the ative power deoupling. However, many ative power deoupling approah dereae the onverter effiieny due to the additional omponent or the withing loe with high the frequeny operation. Thi paper preent an ative power deoupling iruit whih i integrated to the CSI and the reonane type iolated DC/DC onverter. The propoed onverter ompenate the intantaneou power flutuation without large eletrolyti apaitor. In addition, ZCS ahieve at the all withing devie. Moreover, the large indutor i not required beaue the leakage indutane of the tranformer i ued a a DC indutor.

2 Thi paper i organized a follow: firt, the onfiguration of the propoed iruit i hown. Next, the priniple of the power deoupling ontrol i deribed. In addition, the deign method of the iolated DC/DC onverter and it validity are explained with the imulation and experimental reult. Finally, the fundamental operation and eah evaluation are onfirmed. II. CIRCUIT TOPOLOGY Fig. 1 how the propoed onverter whih onit of a reonane-type iolated DC/DC onverter, an ative power deoupling iruit, and a CSI. The propoed onverter doe not need a large apaitor and indutor beaue the ative power deoupling an be employed with a mall buffer apaitor C buf, and the propoed onverter operate at the high withing frequeny more than one-hundred khz. Firtly, the reonane-type iolated DC/DC onverter ahieve the ZCS operation uing reonane with arm apaitor C 1, C and leakage indutane of the tranformer L. Note that, the withing frequeny i et at the reonane frequeny, and the primary ide MOSFET S 1 and S operate with 50% of withing duty. The reonane frequeny i deigned to be high in order to redue the volume of the tranformer. The ative power deoupling iruit ompenate the power flutuation with the mall apaitor C buf and retifie the high frequeny reonane urrent. After that, the high frequeny retified urrent flow to the ingle-phae AC grid or C buf. In order to redue the withing lo of the ative power deoupling iruit and the CSI, the delta-igma-baed pule denity modulation (Δ Σ_PDM) i applied intead of the pule width modulation (PWM). Therefore, ZCS i ahieved on the zero urrent point of the high frequeny retified urrent. A hown in Fig. 1, the propoed onverter require many withing devie. The main ontribution in thi paper i the elimination of the large paive omponent in the iruit topology, e.g. the large indutor and otly. On the other hand, the ot of the withing devie may beome heap when the miro-inverter i maively adapted to the PV ytem. Fig. 1. Propoed DC to ingle-phae AC grid onneted onverter whih i not required large energy buffer. The propoed onverter ahieve ZCS on eah MOSFET. VapI = (1 oω t) Fig. Compenation priniple of the ingle-phae power pulation. Small buffer apaitor C buf eliminate the eond-order harmoni on P in. p out ap III. CONTROL METHOD A. Priniple of ingle-phae power flutuation Fig. how the priniple of the ative power deoupling. When both the output voltage and urrent waveform are inuoidal, the intantaneou output power p out i expreed a p out VapIap = (1 oωt ) (1) where, V ap i the peak voltage, I ap i the peak urrent, and ω i the angular frequeny of the output voltage. A hown in (1), the power ripple that flutuate at twie frequeny of the AC grid our at DC link. In order to aborb the power ripple, the intantaneou power p buf, hould be ontrolled a in () Fig.3 Operation mode of ative buffer iruit and CSI. The buffer apaitor i harged and diharged by mode and mode 3. Eah mode i withed at the zero urrent point of the high frequeny pule urrent.

3 V Cmin pin ωc ab { in(ωt ) 1} Fig. 4 Control blok diagram of ative power deoupling iruit and CSI. In order to ahieve ZCS, the delta-igma-baed pule denity modulation i applied. p buf 1 = VapI ap oωt () where, the polarity of p buf, i defined a poitive when the flying apaitor C f diharge. Note that the ative power of the flying apaitor C f i zero. Due to the power deoupling, the input power i mathed to the output power. Thu, the relationhip between the input and output power i expreed a 1 p = V I = V in ap ap IN I IN B. Operation mode of ative power deoupling iruit Fig. 3 how the operation mode of the ative power deoupling iruit and the CSI when the grid voltage i the poitive. Note that, the urrent pathway from the ingle-phae grid to the mall apaitor C buf doe not our beaue the apaitor voltage i alway higher than the peak grid voltage. The ative power deoupling iruit and the CSI are ontrolled in four mode defined by the withing pattern in Fig.4. In mode1, the input power P in i diretly upplied to the inglephae grid. In thi ontrol, the buffer power p buf i ontrolled only by mode and mode 3. In mode, the mall apaitor C buf i harged. In ontrat, C buf i diharged to the ingle-phae grid in mode 3. A a reult, the mall apaitor voltage i flutuated at the twie frequeny of the ingle-phae grid. Finally, mode 4 i the freewheeling mode. In thee mode, the ative power deoupling iruit i withed in ynhronization with the operation arm dependently on the reonane urrent polarity. Conequently, the CSI operate with the ingle-phae grid voltage aording to the polarity of the reonane urrent. C. Control blok diagram of propoed iruit Fig. 4 how the ontrol blok diagram. The duty referene d mode1, d mode and d mode3 are expreed a d V IN = in( t) mode1 VINp ω d (4) mode3 (3) d d mode mode3 d = 0 d = 0 tempo tempo, d 0, d 0, d 0, d 0 where, V d i the referene value of the input voltage of the ative power deoupling iruit. d i the duty referene for the harge and diharge of the buffer apaitor C 3. On the other hand, the buffer apaitor urrent i i expreed a VapI ap i = o(ωt ) (6) v where, v i the intantaneou voltage of the buffer apaitor C buf. In addition, i i deided by the d mode,d mode3,and I d. The relationhip between the duty referene and i i expreed a mode mode3 d (5) i = ( d + d ) I (7) Aording to (6) and (7),d i expreed a VapI ap Vd d = o( ωt ) = o( ωt ) (8) v I v d where, V d ha to be atified a in the following ondition Vap V d (9) Thi i beaue the all duty ommand hould be poitive. In thi ontrol, the buffer apaitor voltage ontrol (AVR) i operated to ompenate the error between the duty referene and the atual voltage. Note that the phae referene i ynhronized to the ingle-phae AC grid voltage by Phae Looked Loop (PLL).

4 D. Modulation method of propoed onverter Fig. 5 how the modulation blok diagram of the Δ Σ_PDM. The duty ommand value d mode1 to d mode3 are onverted to the eletor ignal Sel _mode1 to Sel _mode3 for eah operation mode. Firt, the error between eah duty ommand and the eletor ignal are alulated, and integrated. Next, the quantize output Sel _mode1 to Sel _mode3 orreponding to the integral error. Note that, quantize are operated with the quantizing lok (CLK_Q), and CLK_Q i ynhronized with the zero urrent point of the pule urrent. CLK_Q i obtained by the gate ignal of the primary MOSFET beaue when the tranformer power fator i unity, the zero urrent point varie orreponding to the primary tranformer urrent zero ro point. Appling Δ Σ_PDM, the ative power deoupling iruit and the CSI ahieve the ZCS operation beaue eah MOSFET i withed at the zero urrent point of the eondary-ide input urrent. The eondary input urrent i upplied from the iolated reonane DC/DC onverter to the ative power deoupling iruit and the CSI. Note that ZCS i ahieved baed on thi urrent. Thu, the deign of the reonane parameter i important for propoed operation. IV. DESIGN METHOD OF ISOLATED RESONANCE DC/DC CONVERTER A. Fundamental deign Fig. 6 (a) how the equivalent erie reonane model of the iolated DC/DC onverter. In thi model, the moothing apaitor i onneted on the retifier output part in order to eliminate the withing frequeny omponent. In thi ae, the arm apaitor C 1, C and the leakage indutane of the tranformer L are utilized for the erie reonane, and the iolated DC/DC onverter ahieve the ZCS operation. Generally, the tranformer voltage reult in the quare waveform, and the tranformer peak voltage i alway the half of the PV input voltage V in. Fig. 6 (b) how the equivalent model for the propoed onverter. The propoed onverter doe not adopted the withing filter between the iolated DC/DC onverter and the ative power deoupling iruit beaue the high frequeny reonane urrent i utilized for the ZCS operation with the ative power deoupling iruit and the CSI. However, when the moothing apaitor i not adopted, the operation of the eondary onverter interfere to the reonane ondition. A a reult, the tranformer peak voltage flutuate depending on the operation mode a hown in Fig.3. Due to thi reaon, the onventional reonane parameter deign annot be applied for the propoed onverter. In thi hapter, a deign riterion of the reonane parameter i onidered. Firtly, the reonane frequeny f re i expreed a 1 f = re (10) π ( C1 + C ) L where, the reonane frequeny i deigned a the high frequeny more than the one-hundred khz in order to redue Fig. 5 Modulation blok diagram of delta-igma baed pule denity modulation. (a) Ideal model for erie reonane. (b) Serie reonane model of propoed iruit. Fig. 6 Equivalent model of erie reonane for iolated DC/DC onverter. the volume of the tranformer. When the withing frequeny and the reonane frequeny beome the ame, the reonane urrent ire beome inuoidal. The peak reonane urrent Ire i expreed a

5 I re 4 π V R i _ half = (11) where, V i_half i the primary-ide peak voltage of the tranformer, R i the equivalent AC reitane. In thi ae, R i expreed a R 8 N V 1 in = N (1) π I in Finally, the reonane peak urrent I re i derived from (10) and (11) I = π (13) re I in Reonane urrent [Apeak] Fig. 7 Charateriti of erie reonane urrent. When the equivalent AC reitane i ame, the reonane urrent peak beome maximum at the reonane frequeny. B. Determination of LC reonane parameter When the reonane parameter C 1, C and L are eleted baed on the reonane frequeny, many option exit. One of the riterion i the quality fator Q, and it influene to the reonane frequeny harateriti. The quality fator Q of the erie reonane i expreed a 1 L Q = (14) R C C1 + Fig. 7 how the reonane frequeny harateriti when the Q value i hanged. A hown in Fig.7, the reonane peak urrent at the reonane frequeny i the ame with both the low Q and high Q value. On the other hand, the reonane voltage i proportional to the Q value. The reonane peak indutor voltage V Lpeak i expreed a V = QR I (15) Lpeak re When the reonane parameter i deigned at the high Q value, the reonane voltage on eah reonane ondition beome large. Thu, eah omponent i required the high rated voltage. When the erie reonane i deigned to fou on the high effiieny, the Q value hould be low. Beaue in the low Q deign, the leakage indutane and the reonane peak voltage an be mall from (14) and (15). However, when the Q value i deign to low, the reonane urrent peak oillate due to the diturbane. The damping oeffiient ξ i expreed a 1 ξ = (16) Q When ξ i high, the reonane urrent flutuate untably, and it i diffiult to utain the ontinuity of the erie reonane. Epeially, the propoed iruit doe not ue the withing filter between the iolated reonane DC/DC onverter and the eondary-ide onverter. Thu, eondary-ide onverter operation interfere the reonane ondition a the diturbane. A a reult, the reonane urrent deay. Fig. 8 Simulation reult of reonane urrent. The error between the deign and the imulation value i le than 1%. Fig. 9 Comparion between reonane urrent and deign value when output power and input urrent i hanged. In order to onider the reonane ondition on the propoed onverter, two ondition are imulated in next hapter. One i the low Q value ondition, and it i onfirmed that the error between the imulation and the deign value beome large. On the other hand, in the high Q ondition, the imulation value agree with the deign value.

6 V. EVALUATION OF RESONANCE PARAMETER DESIGN A. Simulation reult Fig. 8 how the imulation reult of the propoed reonane deign. In thi imulation, the Q value i deigned to be high value, and the reonane frequeny i et at 00 khz. A hown in Fig.8, the error between the deign value and the imulation value i le than 1%, and the reonane urrent beome a inuoidal waveform. Fig. 9 how the relationhip between the output power and the reonane peak urrent. In thi reult, the input urrent ondition i hanged from 4 A to 6 A. Aording to Fig. 9, all the imulation reult agree with the deign value at the ondition of the high Q value. However, when the Q value i low, the error between the deign value and the imulation reult beome large. Fig. 10 how the imulation reult with different Q value. In the Fig. 10 (a), the reonane parameter are deigned at the low Q ondition. In addition, the reonane peak urrent i deigned to be 15.7A. Aording to Fig. 10 (a), the maximum error between the imulation value and the deign value i 5% at the ondition of the low Q value. On the other hand, with the ondition of the high Q value in Fig.10 (b), the error i redued by 99% in omparion with Fig. 10(a). It i beaue the tranformer peak voltage i flutuated in the propoed onverter. The reaon why the high error between the imulation value and the deign value our at the low Q value i explained a following. The propoed onverter doe not adopt the withing filter on the DC bu, and the reonane urrent i utilized to ahieve ZCS for the ative power deoupling iruit and the CSI. Thu, the eondary-ide peak voltage of the tranformer flutuate. For example, in mode, the eondary-ide reonane urrent flow in the mall apaitor C buf, and the eondary-ide voltage of the tranformer i lamped to the mall apaitor voltage V buf. On the other hand, in the mode1, the reonane urrent i upplied to the ingle-phae grid. A a reult, the eondary tranformer voltage i lamped to the grid voltage V a. When the Q value i low, the reonane peak urrent i flutuated everely. Thi i beaue the erie reonane i exited by the tranformer voltage. However, the ame reonane peak urrent at the all withing mode i preferable. In order to uppre the reonane peak urrent flutuation, the Q value hould be high. Thi lead to the low damping oeffiient ξ whih an utain the erie reonane. Following thee reult, when the reonane urrent i required to agree with the deign value, the Q value of the erie reonane ha to beome high. B. Experimental reult of the reonane urrent deign In order to validity of the propoed deign method, two 300W prototype iruit are teted. Table. 1 how the experimental parameter. In thi experiment, two ondition for the type iolated reonane DC/DC onverter are evaluated. The only differene between the two onverter i the reonane parameter. Therefore, the ame withing devie, tranformer ore, winding are eleted. Note that, the winding truture i different in order to adjut the leakage indutane. When the Q (a) L re : 0μH,C : 30nF,Q : 11. (b) L re : 00μH,C : 3nF,Q : 109. Fig. 10 Reonane urrent when Q value i hanged. When the ondition of the low Q value i employed, the error between the deign value and the imulation value beome large. Table.1 Experimental parameter Fig. 11 Experimental reult with ZCS of iolated reonane DC/DC onverter.

7 value i to be high, the leakage indutane i large. In addition, the reonane frequeny i deigned to 150 khz. Fig. 11 how the primary MOSFET withing waveform. Aording to fig.11, the drain-oure voltage of S 1 i withed at the zero urrent point, e.g. the ahievement of ZCS. Note that, ZCS i ahieved in both the high Q ondition. Fig. 1 how the omparion with the reonane peak urrent and the deign value. Note that, the deign value i alulated by (13). A hown in fig.13, the maximum error i 4.5% when the input urrent i 3.5 A. Furthermore, the reonane urrent peak i inreae proportionally to the input urrent. Note that, when ZCS i ahieved, the redution of the ondution lo of the eah MOSFET i important for the ahievement of the high effiieny. In thi appliation, the primary ide urrent of the tranformer i large due to the low voltage ondition. Thu, the full bridge type iolated DC/DC onverter i better at the low voltage ondition. Fig. 13 how the effiieny harateriti in both the high Q ondition and the low Q ondition. The maximum effiieny with the low Q value ondition i 96.5%. On the other hand, the maximum effiieny with the high Q value i redued by.9%. Thi i beaue the tranformer lo inreae. When the leakage indutane beome large, the oupling oeffiient of the tranformer dereae. In addition, the reonane peak voltage beome large in omparion with the low Q. a a reult, the iron lo beome large. Thu, the reonane indutor lo redution i important in order to ahieve the high effiieny. Therefore, the improvement of the onverter effiieny with the high Q value ha to be onidered. Thi reult i obtained with the half bridge iolated DC/DC onverter, and the ondution lo i large beaue the tranformer voltage beome half. In order to improve the effiieny, the full bridge iolated DC/DC onverter will be onidered. VI. FUNDAMENTAL EVALUATION OF PROPOSED CIRCUIT Table how the imulation ondition. Fig.14 how the imulation reult of the propoed iruit. Aording to fig. 14, it i onfirmed that the buffer apaitor voltage i flutuated at the twie grid frequeny, and the input voltage ripple i under than 5% by ontrolling the buffer power p buf. Thu, the operation of the power ripple ompenation i ahieved. In addition, the output power fator i almot unity at the rated power, and the output urrent THD i.3%. From thee reult, it an be onfirmed that the propoed onverter realize the power deoupling with the mall apaitor C buf. Fig. 15 how the withing waveform of the propoed iruit. Eah MOSFET of the ative buffer and the CSI are alo withed at the zero urrent point by Δ Σ_PDM. In addition, the iolated DC/DC onverter ahieve ZCS by the erie reonane operation a hown in fig. 11. It an be onluded from thee reult that, the withing loe i dratially redued. In order to further improve the effiieny, the tranformer deign and the redution of the ondution lo i important beaue the propoed onverter ha many MOSFET, and the tranformer loe uh a the iron lo and the opper lo are large. The onverter lo will be evaluated for high effiieny by experiment. Fig. 1 Comparion between deign value and experimental reult. The experimental reult agree with the deign value VII. CONCLUSION Low Q value High Q value 96.5% 93.6% Output power [W] Fig. 13 Effiieny harateriti with iolated DC/DC onverter when Q value i hanged. In the high Q ondition, the effiieny i redued to 93.6%. Thi i beaue the tranformer lo i large. Table. Simulation parameter Thi paper preented the ative power deoupling iruit whih i integrated to the CSI and the reonane type iolated DC/DC onverter. Thi onverter ompenated for the intantaneou power flutuation without the large eletrolyti apaitor. In addition, ZCS i ahieved at the all withing devie and the large indutor are not required beaue the leakage indutane of the tranformer i ued a a DC indutor. The power deoupling with the mall apaitor and the high frequeny operation wa employed. Moreover, the larifiation

8 of reonane parameter deign for the propoed onverter wa onduted. A a reult, the experimental reonane urrent peak i agree with the deign value with the error i le than 5%. In the propoed onverter, the quality fator Q of the erie reonane hould be deigned to be high in order to maintain the tability of the reonane urrent. In thi ae, the redution of the reonane indutor lo i important in order to ahieve the high effiieny. Finally, the fundamental operation of the propoed onverter wa onfirmed by imulation. A a reult, the input voltage ripple wa uppreed under than 5% by the power deoupling ontrol with mall apaitor. In the future work, the propoed onverter operation will be evaluated by the experiment. In addition, eah lo and the high effiieny deign will be onidered. REFERENCES S-M.Tayebi, X. Mu, I. Batareh: Improved three-phae miro-inverter uing dynami dead time optimization and phae-kipping ontrol tehnique, IEEE Applied Power Eletroni Conferene and Expoition (APEC), pp ,(016) X. Liu, M. Agamy, D. Dong,M. Harfman-Todorovi, L-Gare: A low-ot olar miro-inverter with oft-withing apability utilizing irulating urrent, IEEE Applied Power Eletroni Conferene and Expoition (APEC), pp ,(016) N. Pragallapati, T. Lodh, V. Agarwal: Parallel-input erie-output interleaved flybak baed olar PV module integrated miro-inverter, International Conferene on Renewable Energy Reearh and Appliation (ICRERA), pp ,(015) F. Ji, L. Mu, G. Zhu: A novel Multi-funtion photovoltai Miroinverter and it ontrol trategy, IEEE 8th International Power Eletroni and Motion Control Conferene (IPEMC-ECCE Aia), pp ,(016) E. Fonkwe, J. Kirtley, J. Elizondo: Elybak miro-inverter with reative power upport apability, IEEE 17th Workhop on Control and Modeling for Power Eletroni (COMPEL), pp.1-8,(016) H. Renaudineau, S. Kouro, K. Shaible and M. Zehelein: Flybakbaed Sub Module PV Miroinverter, EPE`16 ECCE Europe, (016) R-K. Surapaneni, A-K. Rathore: A novel ingle-phae iolated PWM half-bridge miroinverter for olar photovoltai module, ECCE US pp (015) T. Boutot and L. Chang, Development of a ingle-phae inverter for mall wind turbin, in Pro. IEEE Eletrial and Computer Engineering Canadien Conf. (CCECE 98), pp (1998) Y. Xue, L. Chang, S. B. Kjaer, Bau, J. Bordonau, T. Shimizu, Topologie of Single-phae Inverter for Small Ditributed Power Generator: An Overview, IEEE Tranation on Power Eletroni, Vol.19, No.5, pp (004) H. Hu, S. Harb, N. Kutkut, I. Batareh, Z. J. Shen, Power Deoupling Tehnique for Miro-inverter in PV Sytem a Review, Energy Converion Congre and Expoition 010, pp , pp (010) T. Shimizu, K. Wada, N. Nakamura: "Flybak-Type Single-Phae Utility Interative Inverter With Power Pulation Deoupling on the DC Input for an AC Photovoltai Module Sytem", IEEE Tran., Vol. 1, No. 5, pp (006) K. Kuaka, H. Watanabe, K. Furukawa, J. Itoh: "Power Deoupling Ciruit with Flying Capaitor DC-DC Converter", JIASC015, Vol., No. 1-78, pp. (015) F. Shimpf, L. Norum: "Effetive Ue of Film Capaitor in Single- Phae PV-inverter by Ative Power Deoupling", IECON 010, Vol., No., pp (010) Fig. 14 Simulation reult with the propoed onverter. The input voltage beome ontant by ative power deoupling. Fig. 15 Eah withing waveform applying the ZCS. The propoed onverter an ahieve the ZCS inluding the iolated reonane DC/DC onverter. Kuo-Hen Chao, Po-Tai Cheng : "Power deoupling method for inglephae three-pole AC/DC onverter " ECCE 009, pp ,(009) Ruxi Wang, F.Wang, Rixin Lai, Puqi Ning, R.Burgo, D.Boroyevih : " Study of Energy Storage Capaitor Redution for Single Phae PWM Retifier " APEC 009, pp ,(009) Chaia-Te Lee, Yen-Ming Chen, Li-Chung Chen, Po-Tai Cheng: "Effiieny Improvement of a DC/AC Converter with the Power Deoupling Capability" IEEE APEC 01 Vol., No., pp (01) Y. Ohnuma, J. Itoh: "A Single-Phae Current-Soure PV Inverter With Power Deoupling Capability Uing an Ative Buffer",, Vol. 51, No. 1, pp (015)