High Efficiency Single Phase Inverter Design

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1 High Efficiency Single Phae Inverter Deign Didi Itardi Electric Machine Control Laboratory, Electrical Engineering Departement Politeknik Negeri Batam, Indoneia Abtract The olar power plant i one of the renewable energy that already wa implemented in around the world. The important component in the renewable power plant i inverter device that convert the direct current to alternating current. The problem in the inverter are power quality, harmonic, and grid ytem. Thi paper introduced deign inverter ingle phae with totem pole circuit. The circuit reduce loe in inverter. Beide that, DC link in PCB, component placement configuration, and adding filter in the output of inverter wa implemented in the deign. The reult hown that the inverter have optimum efficiency at 98.67% and have a mall total harmonic ditortion with LC load. Keyword totem pole, inverter, DC link, filter I. INTRODUCTION Renewable energy i the mot important energy reource in Small Iland that do not connect to power ytem grid. There are ome alternative renewable energy that can be ued in that area uch a olar, wind, tidal, and micro hydro. The olar power plant i the eaiet, availability, and low maintenance [1]. The main component of olar power plant are photovoltaic (PV) cell, controller, battery, and inverter. The PV cell convert olar energy to electric energy that have many different cell configuration. The controller i the brain of the olar power plant that can manage and control the energy from the PV cell to the load and alo from and to battery. The battery i the torage energy that can charge and dicharge conveniently through controller. The inverter i coniting of power electronic component that can convert direct current (DC) to DC and DC to alternating current (AC). One of development in the olar power plant technology i the inverter deign for olar power plant. The inverter mut have a high efficiency and can be tand alone or connect to the grid []-[3]. The baic deign of inverter can be een in Fig. 1. The T1-T4 are olid tate component that act like witching device. The olid tate component that be ued in inverter are tranitor, IGBT, MOSFET, or SCR. The output of the inverter i AC voltage with zero DC component. Therefore, it till contain harmonic. The low pa filter i intalled in the inverter output to reduce the high frequency harmonic. Thi harmonic caue ome problem in output inverter uch a power quality, degradation of equipment, and inuoidal waveform quality. Moreover, the output inverter mut can match with grid ytem, Bayir Halim, Arif Juwito Febrianyah Mechantronic Study Program Electrical Engineering Departement Politeknik Negeri Batam, Indoneia V DC T1 T4 SQUARE-WAVE INVERTER D1 I O D + V O - Figure 1. Baic configuration EQUIVALENT of DC to AC Inverter CIRCUIT According to that iue, there are ome reearch about ingle phae inverter deign wa S1done by [4], S3[5], [6], and [7]. The drive circuit and control are common problem that appear in inverter. The output of inverter mut have good characteritic and can match with the grid. The brain of ingle phae inverter are microcontroller S4 a main S controller with different technique. The improved DC-AC converter wa ue opto-coupler a connector between controller and olid tate component [8], [9], and [10]. Therefore, the loe in thi optocoupler wa identified and mut to reduce in order to have a good efficiency and reliable deign. The loe in thi part can be reduced by deign in good grounding and DC link connection [8]. The inverter deign in [4]-[9] are till have power quality problem and control technique problem. In practical, there are a dead time that i required to avoid hoot-through fault; hort circuit acro the DC rail. The dead time create low frequency envelope that make low frequency harmonic emerged. Thi i the main ource of ditortion for high quality ine wave inverter. Therefore, the inverter deign by [6] and [7] wa be combined to have a good quality power. In thi paper, the deign of totem pole inverter i propoed for reduced loe and improve tability. The PWM wa generated by Arduino microcontroller with hort delay. The paper i organized a follow: In the next ection, a brief review of propoe deign of Totem Pole Inverter are preented. In Section III preent implementation of Totem Pole Inverter and dicuion of the reult. Finally, the concluion are made in ection IV. II. PROPOSE DESIGN OF TOTEM POLE INVERTER Inverter i an electronic device that i ued to convert the direct ignal into alternating ignal. The output of the inverter can be either an AC voltage with ine wave form (ine wave), a quare wave (quare wave), or ine modification (Modified Sine Wave). Semiconductor device that are widely ued in the T3 T D3 D4

2 power inverter are MOSFET, IGBT, Tranitor, or Thyritor. The low and medium power application can be ued quare wave output ignal and for high power application be ued ine wave output ignal. The propoed inverter technique ued in thi paper baed on tandard ingle phae inverter. The deign diagram of propoed inverter wa hown in Fig.. Solid tate drive Charging Battery Power Electronic Converter Energy Management LC Filter Controller output Figure. The propoed Inverter Diagram From Fig. can be een that the battery management ytem have reponible to control and manage the current in the ytem. The inverter wa change the 16 Vdc to 0 Vac inuoidal that can be explained in next ub ection. can be releaed a fat a witching frequency. The witching loe at the olid tate can be calculated [5] 1 M 1 M co co 8 3 R I, 8 CE on Q P 6 1 Q V I Q Q I V f t t Q CE w on, w off, w where M : Modulation index (0<M<1) V CE : collector-emitter voltage [V] R CE : train drain to ource on-reitance [Ω] I Q : Current in MOSFET [A] f w : frequency witching [Hz] From equation (1), the witching loe depend on rie time and fall time of the emiconductor component. With the totem pole circuit, the fall time in witching period i fater than without it. In thi circuit ue PNP and NPN tranitor in erie that can be hown in Fig. 4. A. Opto Coupler Thi circuit ue optocoupler that have continue fat witching and eay to activate with a mall voltage of 1 volt volt. Another function of thi opto coupler i to protect from feedback current from the load to controller. In thi paper ue TLP 51 component a optocoupler that can be een in Fig. 3 Figure 4. Totem Pole circuit of Inverter C. Logical circuit The purpoe of thi circuit i to invert ignal due to the microcontroller that wa ued in thi ytem. It wa invert from high ignal to low ignal and vice vera. The circuit can be een in Fig. 5. Figure 3. Baic opto-couple circuit In Fig. how that there are 4 opto-coupler in the circuit. The opto-coupler connect to each olid tate component. The reitor ue to limit the current in ignal. B. Totem Pole circuit Thi circuit can be ued to reduce power lo in the ytem at high frequency witching. The olid tate component can be more reliable with thi circuit. The current at gate MOSFET

3 Figure 5. Not Logical Circuit of Inverter D. Inverting Circuit Thi circuit erve to change the input DC voltage to AC output voltage. The DC-to-AC H-Bridge circuit comprie four MOSFET, coupled a H-bridge P-channel MOSFET for poitive voltage (+), and M-type N-channel MOSFET for negative voltage ( -). It alo come with pull-up, pull-down and activated circuit through optocoupler that i triggered from microcontroller. The working principle of thi circuit when Q1 and Q4 active at the ame time then the output connector iued a poitive voltage of +16 volt and when Q and Q3 active imultaneouly then the output connector iued a negative voltage of -16 volt, o with a fat witching can produce AC voltage 16 volt. And the voltage i inputted to the tep-up tranformer. Schematic circuit a hown in Fig. 6. F. Filter Deign Filter ue to improve the output of inverter. The inverter output ignal without filter i manipulated uing O( ) Y ( ) I ( ) Where O() i inuoidal ignal in Laplace tranform and I() i PWM ignal in Laplace tranform. O ( ) 3 By uing Eq. () and (3), Y ( ) 59 e 0.67x10 n x (4) i x10 3 x in 0.036xn 1 e After imulation and calculation, the value of the filter that wa be ued in thi circuit are 68 uf for capacitor and 10 mh for inductor with variable reitor. The circuit wa protected by fue 4 A to protect overload and hort circuit condition. Figure 6. Inverter circuit III. RESULT AND DISCUSSION The propoed totem pole inverter i implemented for ingle phae olar panel application. The detail hardware deign and it performance i evaluated and imulated in thi ection. The hardware deign conit two board; controller board and inverter board. The controller board conit microcontroller to generate PWM ignal and opto coupler circuit. The other conit totem pole, inverter, and filter circuit. The mechanical deign can be een in Fig. 8. E. PWM Circuit The PWM circuit that wa be ued in thi paper i uing Arduino Uno Microcontroller (baed on ATmega Microcontroller). The frequency output i 50 Hz with reduced ripple factor. The carrier frequency that be ued i 1500 Hz. Therefore, the complete one cyle of inuoidal output contain 30 impule a hown in Fig. 7. Figure 7. PWM output Figure 8. the mechanical deign and implementation ytem The connection between board wa deigned with improvement in DC Link connection according to [4]. Thi

4 technic improve the efficiency of the ytem and reduce the temperature. The output of SPWM from Microcontroller can be een in Fig.9. Thi SPWM have.08 Vrm, khz with contant amplitude. The output of SPWM have a ripple about 8.9%. The wave form after adding filter can be een in Fig. 1. There are till have loe. The efficiency of thi inverter reach the optimum efficiency at 98.67%. Thi reult i match with [11] and the noie happen due to RLC load and. In thi paper, the FFT output of inverter with RLC load can be een in Fig. 13. The bigget loe happen at 3 rd and 5 th normal frequency at 50 Hz. According to [1], the total harmonic ditortion of the inverter can be calculated and the reult hown that THD ytem are 1.04%. Figure 9. PWM circuit of Inverter The output ignal of opto coupler have noie at high frequency. Therefore, the filter i adding after opto coupler. The output after opto-coupler can be een in Fig. 10. The ignal SPWM have mall ripple compare the previou one. The ripple are 7.4%. Figure 11. output of inverter before filter Figure 1 Output of Inverter Figure 10 Logical Circuit of Inverter The output of inverter can be een in Fig. 11. Thi output contain high frequency ignal. Therefore, it need to be added filter. The effect of DC Link configuration reduce loe to 4% than previou one. The DC link configuration aborb the unecearry power that lo in connection and line the current path of inverter.

5 Figure 13. FFT Output of Inverter IV. CONCLUSION The deign of totem pole inverter ingle phae wa implemented. There till have ripple in ignal SPWM and alo in H-Bridge converter. The reult hown that the efficiency of the inverter i 98.67% with THD 1.04%. Thi THD match with IEEE tandard in THD for power ytem. ACKNOWLEDGMENT Thank to PT Lancang Kuning Perkaa for upporting thi project, epecially to Mr. Mulim Anori. REFERENCES [1] Rafid Haidar, Rajin Alam, Nafie B.Y., Khoru M.S., Deign and contruction of ingle phae pure ine wave inverter for photovoltaic aplication, IEEE/OSA/IAPR International Conference on Informatic, Electronic& Viion 01, pp [] Xu Jun, Han Kailing, The ingle phae inverter deign for photovolataic ytem, 016 International Sympoium on Computer, Conumer, and Control, pp [3] A. Ali Q., Awai Amin, Abdul Manan, M Khalid, Deign and Implementation of Micocontroller Baed PWM Technique For Sine Wave Inverter, IEEE POWERENG Conference, pp , Libon 009 [4] P. Sachi, I. Echeverria, A. Urua, O. Alono, E. Gubia, L. Marroyo, Electronic Converter for the Analyi of Photovoltaic Array and Inverter, IEEE 003, pp [5] Didi Itardi, Andy Triwinarko, Deign of Snubber Circuit and PI Control to Achieve Load Independent Output Voltage in Micro Smart Home Sytem, 014 International Conference on Smart-Green technology in Electrical nad Information Sytem, pp. 7-1, Bali, Nov 014. [6] Ebrahim Babaei, Sara Laali, S. Alilu, Cacaded Multilevel Inverter with Serie Connection of Novel H-Bridge Baic Unit, IEEE Tranaction on Indutrial Electronic, Vol. 61, No. 1, pp , December 014. [7] Quan Li, Peter Wolf, A Review of the Single Phae Photovoltaic Module Integrated Converter Topologie with Three Different DC Link Configuration, IEEE Tranaction on Power Electronic, vol. 3, No.3, pp , May 008. [8] Didi Itardi, Effect of Non-Tight Contruction of DC Link and Damping Ocillation to Improve the Effeciency of Fly-back Converter, Proceeding of 3 rd APTECS, pp , ITS Surabaya, Dec 011 [9] Boaming Ge, Yuhan Liu, et el., An Active Filter Method to Eliminate DC-Side Low-Frequency Power for a Single-Phae Quai-Z-Source Inverter, IEEE Tranaction on Power Electronic, vol. 63, No.8, pp , Augut 016. [10] Yan Zhou, Hongbo Li, Hua Li, A Single Phae PV Quai-Z-Source Inverter with Reduced Capacitance uing Modified Modulation and Double Frequency Ripple Suppreion Control, IEEE Tranaction on Power Electronic, vol. 31, No.3, pp , March 016 [11] Gua-Rong Zhu, H. Wang, B. Liang, A.C. Tan, J. Jiang, Enhanced Single-phae Full-Bridge Inverter with Minimal Low-Frequency Current Ripple, IEEE Tranaction on Indutrial Electronic, vol. 63, No., pp , Februari 016. [1] Brandon J. P., David J. P., A Single Phae Photovoltaic Inverter Topology with a Serie-connected Energy Buffer, IEEE Tranaction on Power Electronic, vol. 8, No.10, pp , Oct. 013