Power Factor Correction of LED Drivers with Third Port Energy Storage

Transcription

1 Power Factor Correction of LED Drivers with Third Port Energy Storage Saeed Anwar Mohamed O. Badawy Yilmaz Sozer Electrical and Computer Engineering Department The University of Akron, Akron, Ohio Abstract A three port fly-back converter is presented in this paper for light emitting diode (LED) drivers. The presented topology eliminates the need of any electrolytic capacitor in the LED driver. The elimination of a bulky capacitor using the proposed power decoupling technique makes it possible to correct the input power factor and reduce the line harmonics by means of discontinuous capacitor voltage mode. This feature allows for a unity power factor and sinusoidal input current. The simulation and experimental results are presented in the paper to confirm the validity and the effectiveness of the proposed system. Keywords Power decoupling; Third port; LED driver; Energy Storage, Power factor correction. I. INTRODUCTION Light emitting diodes (LEDs) are emerging to replace the conventional florescent and incandescent light sources due to their energy savings, high potential efficacy and long lifetime [-2]. Consequently the LED driver should be developed to reflect the long lifetime of the LED system; however the durability of the conventional LED driver is greatly limited by the electrolytic capacitor used for decoupling the AC power from the grid [3-4]. The electrolytic capacitors are bulky, costly and their lifetime is much shorter than that of the LEDs. Several techniques are developed in literature to eliminate the need of the electrolytic capacitors in LED drivers. High ripple current is used to drive the LEDs in applications where LED current control is not necessary [5]. In [6] higher order harmonics are injected into the input current to reduce the required capacitance for decoupling the power, but this topology suffers from a low power factor. The use of inductors as storage elements to absorb the ripple is presented in [7], but the low efficiency and the increased size are the disadvantages of this topology. The use of a series power decoupling circuit with the capacitors as a storage element is presented in [8]. The multiple energy transfer stages lead to decrease in the overall efficiency. The authors proposed the use of a bidirectional buck-boost parallel circuitry in [9] where only portion of the power is processed through the power decoupling circuit. Isolated AC/DC converters are more desirable in LED applications to provide isolation, voltage level shift between the grid and LED sides. A three port fly-back converter is used in [], yet the input line current suffers from discontinuity due to the presence of the main fly-back switch at the line current path. Although, this topology has a high power factor but the distorted current may not be accepted based on international standards, such as, IEEE 59 [-3]. A fly-back converter with an additional power decoupling circuitry is used in this paper to eliminate the need for an electrolytic capacitor at the input. This technique along with the application of discontinuous capacitor voltage mode (DCVM) control allows for high power factor lower Total Harmonic Distortion (THD) at the input side. This paper is organized as follows, the proposed topology is demonstrated in Section II, while the principle of operation is explained in Section III. Section IV presents the simulation results of the proposed driver topology. Experimental results are provided in Section V. Summary and conclusions are provided in Section VI. II. LED DRIVER TOPOLOGY The proposed LED driver structure is shown in Fig. in which third port concept is incorporated with a fly-back converter. The LED driver has two stages for power conversion, uncontrolled rectifier and fly-back converter. The fly-back converter consists of three switches, transformer, power decoupling capacitor and output filter capacitor. The switch is controlled to shape the input current. The switch is responsible for the power storage in the power decoupling capacitor and the switch allows the current flow to the LED. The diodes ( ) are placed to guide the flow of the current. The power decoupling capacitor ( ) is placed to store the charge for one half cycle. The input capacitor is designed to work in the DCVM. The resultant input impedance provided in Eqn. allows having sinusoidal input current. () 2 where is the input impedance, is the switching frequency, is the controlled duty ratio, and is the input capacitor. The input inductor ( ) is used as an input filter. The voltage ripple can be allowed higher on both and capacitors as none of them affect the output voltage directly. For a voltage waveform given in Eqn. (2), the commanded current should be synchronized with it as shown in Eqn. (3). sin (2) sin (3) /5/$3. 25 IEEE 226

2 The instantaneous power drawn by the source can be expressed as 2 2 cos 2 (4) The second part of Eqn. 4 represents the pulsating power which needs to be filtered by the decoupling capacitor. The pulsating power oscillates at the double line frequency. The waveforms for the unity power operation are shown in Fig. 2. S 2 is not connected directly to the output, it can have fairly large amount of voltage ripple which reduces the amount of capacitance need to be used. With the reduction in the required amount of decoupling capacitor, it is possible to use ceramic or film capacitors instead of electrolytic capacitors which can increase the reliability of the driver. The stored energy in the decoupling capacitor can be expressed as follows. 2 2 (5) (6) AC LF c F D 4 C DC D 2 D S S 3 C L where represents the output DC power, is the pulsating power, is the one complete cycle for grid, and represents the maximum and minimum voltage across the decoupling capacitor respectively. The required amount of decoupling capacitance can be expressed as D 3 2 Δ (7) Figure. The proposed three port fly-back converter. V (Normalized) I (Normalized) P Time Time Mode II.5 Output Mode Power I.5..5 Time Figure 2. Voltage, current and power waveform for unity power operation. Passive filter including inductor and capacitor are used to store energy such that it can provide constant power to output. For two port network, either the input or the output capacitor needs to be high enough to eliminate double line frequency voltage ripples. However for third port network, the additional port can hold the pulsating power. As the third port 2 (8) Δ (9) where is the frequency of the grid, is the average DC voltage across the decoupling capacitor and Δ represents the voltage fluctuation across the decoupling capacitor. For steady state operation, the average DC voltage across the decoupling capacitor needs to be controlled so that it can follow the reference decoupling capacitor voltage. III. CONTROLLER OPERATING MODES The proposed LED driver has two modes of operation. Mode I occurs when the input power is less than the required output LED power and its switching waveforms are shown in Fig. 3(a). During this mode, the fly-back switch S is turned ON for the interval [ - ] to charge the magnetizing inductance of the transformer. To compensate for extra power, switch S is turned ON for the time interval [ - ]. The power is then transferred to the output as the output switch S3 is turned ON all the time during this mode. Mode II occurs when the input power is higher than the required output LED power and its switching waveforms are shown in Fig. 3(b). During mode II, the fly-back switch S is turned ON for the interval [ - ] to charge the magnetizing inductance of the transformer. The switch S is turned ON for the time interval [ - ] and the required amount of power is transferred to the LED. When the switch S is turned OFF, the rest of the power is transferred to the power decoupling capacitor. The switch S is kept off during this mode. 227

3 Fig. 4(a) presents the current flow path when the fly-back switch S is turned ON to charge the transformer magnetization inductance for an interval [ during both modes of operations. The current flow circuitry of the decoupling capacitor discharging interval is shown in Fig. 4(b), this interval occurs at [ - ] in mode I. The charging operation of the decoupling capacitor during [ - ] interval of mode II is shown in Fig. 4(c). Finally in Fig. 4(d), the condition when the output switch is turned ON and power is transferred to the output is presented. This condition takes place during [ - interval in mode I and during - interval of mode II. (a) (b) (a) (c) (b) Figure 3. Switching sequence and current waveforms for a) Mode I, and for b) Mode II. (d) Figure 4. Current flow path for different switching conditions. 228

4 IV. SIMULATION RESULTS The simulation is performed using MATLAB/SIMULINK software to verify the effectiveness of the three port and the power factor correction circuitry. The input power to the driver and the desired output power to the LED is shown in Fig. 5. The average output to the LED is 8, and the peak power to the driver is 57. The decoupling capacitor should be able store the difference between the peak power and the average output power. Fig. 6 illustrates the grid voltage waveform of 2 RMS for the LED driver. This voltage waveform is used as a reference to generate gate pulse signals for the three switches. PLL algorithm is used to get the phase of the grid voltage. The grid current having peak amplitude of.3 is shown in Fig. 7. The current waveform illustrates the unity displacement power factor and near unity distortion factor. The distortion factor can be improved by increasing the input capacitance. An input capacitor ( ) is used to achieve the unity power factor at the input of the LED driver. The capacitor is operated in discontinues capacitor voltage mode. The waveform across the input capacitor is shown in Fig. 8. The decoupling capacitor ( ) is designed to have a low capacitance and thus allowing a high voltage ripple as show in Fig. 9. The current through the decoupling capacitor is presented in Fig.. The average current through the inductor over the half switching period is zero in steady state operation. In mode II, the inductor current is positive as it gets charged up during [ - ]. On the other hand, the capacitor current flow in the negative direction in mode I, as it supplies the magnetizing inductor during [ - ] interval. The current waveform through the transformer magnetizing inductance ( ) is shown in Fig.. So, the magnetizing current reaches to its peak of.7 during the positive or negative peak of the grid voltage in mode II operation. In mode I, the stored energy from the decoupling capacitor is used to charge the magnetizing inductance. The secondary side current is shown in Fig. 2. The peak of the instantaneous current at the secondary side reaches to 3.62 peak. After the filtering stage of the secondary side, the current ripple reduces to.35 peak current. Input current to the LED is shown in Fig. 3. The simulation results verify the improved power factor ensured by the LED drive, the low output ripple current at the output of the driver and the decoupling capacitor operation according to the designed controller. The third port enables the higher voltage ripple across the decoupling capacitor which facilitates the reduction of the output stage capacitor and lower ripple at the output of the LED driver. Voltage (V) Figure 6. Grid voltage waveform Figure 7. Input current waveform. Power (w) Input Power Reference Power Voltag e (V) Figure 5. Input power and reference power waveforms Figure 8. Input capacitor ( ) voltage. 229

5 Voltage (v) Figure 9. Decoupling capacitor ( ) voltage Figure 3. Input current to the LED Figure. Decoupling capacitor ( ) current Figure. Magnetizing Inductance ( ) current Figure 2. Secondary side current waveform. V. EXPERIMENTAL RESULTS To verify the effectiveness of the proposed LED driver topology and the controller operation, a prototype of the LED driver is developed. The experimental setup for the prototype structure is shown in Fig. 4. The required gate pulses for operating the three MOSFETS are generated by TMS32F28335 DSP. The grid voltage is detected by the voltage sensor and the PLL algorithm is implemented to achieve synchronization at the input side. In Fig. 5, the generated waveforms using the DSP are shown. Channel illustrates the fly-back switch (S) pulses operating at 6. Channel 2 illustrates the S2 operation in both mode I and II. In mode I, when the instantaneous output power is less than the average output power, the switch is turned on for [ - ] time interval for allowing the decoupling capacitor to provide additional required power. In mode II, when the instantaneous output power is more than the average output power, the switch is simply turned off and the mechanism shown in Fig. 4(c) charges the decoupling capacitor. In channel 3, the output switch (S3) operation is shown. In mode I, when the instantaneous output power is less than the average output power, the switch is turned on all the time to allow the required power flow. In mode II, when the instantaneous output power is more than the average output power, the switch is simply turned on to allow required power flow. In channel 4, the reference sinusoidal input waveform is shown which is also acted as a reference to generate the switching waveforms for the three switches of the LED driver. In Fig. 6, the input voltage, decoupling capacitor voltage, the output voltage and the output switching waveforms are shown. The detected grid signal is shown in channel. Channel 2 illustrates the decoupling capacitor voltage waveform which is sent to compare with reference for the DSP. PI controller has been used to regulate the average decoupling capacitor voltage. In channel 3, the output voltage waveform is shown. Although the waveform contains noise, more capacitor added in parallel should be sufficient enough to eliminate this noise. At this test, resistive load has been used to compare the system operation. The switching sequence of the output switch is shown in channel 4. In Fig. 7, channel presents the Ac input voltage supplied to the driver. Channel 2 presents the decoupling capacitor voltage as it is getting discharged every two input voltage 22

6 cycles. The input sinusoidal current is represented in channel 3 proving the effectiveness of the applied PFC control and the discontinuous capacitor voltage mode operation. Finally, channel 4 shows the current provided to the load. proposed system are presented. The experimental results are presented for a developed prototype of the LED driver to prove the effectiveness and the validation of the proposed system. S3 Tx V dc sense S2 S DSP V in sense Figure 4. Experimental setup. Mode I Mode II Figure 5. Grid voltage (CH4) and switching of the switches S (CH), S2 (CH2) and S3(CH3). Figure 6. Grid voltage (CH), decoupling capacitor voltage (CH2), output voltage (CH3) and the output switch S3(CH4) waveforms. VI. CONCLUSIONS In this paper, a three port fly-back configuration is proposed in an AC/DC system to eliminate the need of an electrolytic capacitor for a LED driver. The elimination of the electrolytic capacitor allows for a longer lifetime of the LED driver. Additionally, the harmonics generated by the LED driver are reduced as both the displacement and distortion power factor are improved by the controller and phase detection algorithm. The operation modes and the principles have been described in the paper. The simulation results for the Figure 7. Grid voltage (CH), decoupling capacitor voltage (CH2), grid current (CH3) and the load current (CH3) waveforms. REFERENCES [] Y.-C. Li and C.-L. Chen, A novel single-stage high-power-factor ACto- DC LED Driving circuit with leakage inductance energy recycling, IEEE Trans. on Ind. Electron., vol. 59, no. 2, pp , Jul. 22. [2] H. J. Chiu, Y. K. Lo, J. T. Chen, S. J. Cheng, C. Y. Lin, and S. C. Mou, A high-efficiency dimmable LED driver for low-power lighting applications, IEEE Trans. on Ind. Electron., vol. 57, no. 2, pp , Feb. 2. [3] A. Ristow, M. Begovic, A. Pregelj, and A. Rohatgi, Capacitors, IEEE Trans. Plasma Sci., vol. 26, no. 5, pp , Oct [4] G. Spiazzi, S. Buso, and G. Meneghesso, Analysis of a high-powerfactor electronic ballast for high brightness light emitting diodes, in Proc. IEEE Power Electron. Spec. Conf. (PESC), 25. [5] L. Gu, X. Ruan, M. Xu, and K. Yao, Means of eliminating electrolytic capacitor in AC/DC power supplies for LED lightings, IEEE Trans. on Power Electron., vol. 24, no. 5, pp , May 29. [6] S. Li, B.Ozpineci, and L.M. Tolbert, Evaluation of a current source active power filter to reduce the DC bus capacitor in a hybrid electric vehicle traction drive, in Proc. IEEE Energy Convers. Congr. Expo. (ECCE), 29. [7] T. Shimizu, K.Wada, and N.Nakamura, Flyback-type single-phase utility interactive inverter with power pulsation decoupling on the DC input for an AC photovoltaic module system, IEEE Trans. on Power Electron., vol. 2, no. 5, pp , Sep. 26. [8] A.C. Kyritsis, N. P. Papanikolaou, E. C. Tatakis. A novel Parallel Active Filter for Current Pulsation Smoothing on Single Stage Gridconnected AC-PV Modules, in Proc. European Conf. Power Electronics and Applications (EPE), 27. [9] W. Chen and S. Y. R. Hui, Elimination of an electrolytic capacitor in AC/DC light-emitting diode (LED) driver with high input power factor and constant output current, IEEE Trans. Power Electron., vol. 27, no. 3, pp , 22. [] IEEE Recommended Practices and Requirements for Harmonics control in electric power systems, IEEE Std. 59, 992. [] Limits for Harmonic Current Emissions, IEC-6 3-2, Int. Electrotech. Comm., 2. [2] W. E. Reid, Power quality issues-standards and guidelines, IEEE Trans. on Ind. Appl., Vol. 32, No. 3, pp , 996. [3] H. Haibing, S. Harb, N. Kutkut, I. Batarseh, Z.J. Shen, A Review of Power Decoupling Techniques for Microinverters With Three Different Decoupling Capacitor Locations in PV Systems, IEEE Trans. on Power Electron., vol.28, no.6, pp , June