A New Low-Voltage RMS Converter based on Current Conveyors in MOS Technology

Transcription

1 nternational Journal of Latet Trend omputg (E-SSN: ) 88 Volume, ue, Marh A New Low-Voltage onverter baed on urrent onveyor MOS Tehnology Ebrahim Farhidi epartment of EletrialEngeerg, Faulty of Engeerg, Univerity of Shouhtar Azad, Shouhrar, ran, e_farhidi@hotmail.om Abtrat: n thi paper, a new urrent mode -to- onverter iruit ug eond generation urrent onveyor () i preented. The eond generation urrent onveyor employ MOSFET tranitor that are operatg trong verted aturation region. The propoed methodology provide the followg advantage: a omplete urrent-mode iruit make it uitable for urrent-mode ignal proeg appliation; modular deign of the onverter i ahieved by ug of a the bai buildg blok; and ug of that i ative buildg blok of the onverter feature low voltage upply and low iruit omplexity, whih lead to low voltage appliation. Hpie imulation reult how high performane of the onverter and validate the workability of the propoed iruit. Keyword: urrent-mode, onverter, urrent onveyor, MOS.. ntrodution The meaurement devie i widely ued eletrial engeerg for different purpoe uh a trumentation devie [-3]. The value of a voltage or a urrent repreent the effetive energy that i tranferred to a load by a periodi oure. ifferent method have been reported for the preiion meaurement of the value of an a urrent. The on-gog trend toward lower upply voltage ha brought the area of analog tegrated iruit to limelight. n onventional iruit implementation tehnique ug op-amp and tranondutane, the upply voltage retrit the attaable maximum dynami range. Alo, it i well known that the ue of urrent-mode ative devie ha ome advantage uh a greater learity, wider bandwih, larger dynami range, and le power onumption when ompared to their voltage ounterpart: operational amplifier. The mot popular urrent-mode ative devie i eond generation urrent onveyor (). n reent year, ome tegrated deign form of true -to- onverter have been propoed. Some of them are deigned baed on bipolar tranitor [4, 5]. However, many ituation, partiularly mixed A/ ytem, it i deirable to implement the iruit the MOS tehnology. One attempt i to employ igma-delta onverter [6], but the extra needed iruit lead to a large number of tranitor and high power onumption. n thi work, a new deign to overome the above problem i preented. Ug a novel ynthei, a quarer/divider iruit baed on MOS eond generation urrent onveyor () i preented. The i a very teretg, attrative buildg blok, whih an eaily ompete with tandard operational amplifier. ( any way,it an be onidered a an exellent alternative to tandard operational amplifier). The propoed quarer/divider i modular and with low upply voltage. The time average operation i performed by a urrent-mode low pa filter whih onit of one apaitor and one MOS tranitor. The omplexity of thi filter i muh le than thoe propoed before [7, 8]. The propoed onverter require very low voltage with mimum upply voltage of one V g plu two V d and extra urrent and voltage biag are not needed. The paper organized a follow. n etion, the bai priple of urrent-mode - onverter operation i diued. n etion 3 the propoed quarer/divider and low-pa filter a the bai buildg blok of the onverter are preented. n etion 4 the iruit and imulation reult of the - onverter that demontrate the validity of the propoed method are preented; and fally, etion 5 onludg remark are provided.. ai Priple The defition of the root mean quare value of an put ignal with a period of T i given by: t T t T where (t) and (t) are put and put urrent of the -to- onverter, repetively. A mathematially equivalent expreion, but more preie oniderg the offet of the ytem [4], i given by: () () where... repreent the averagg operation. The blok diagram of propoed onverter i hown Fig., whih it onit of a quarer/divider and a low pa filter [4]. = q f L.P.F Figure. lok diagram of the -to- onverter[4] f =

2 LO H LO H nternational Journal of Latet Trend omputg (E-SSN: ) 89 Volume, ue, Marh 3. iruit eign 3. urrent onveyor The i a tree termal (,, and ) devie whoe repone, V and to the applied exitation; V, and V are given by the followg matrix repreentation [9]: the quarer/divider employg. The iruit onit of two blok and 4 diode. The -V relationhip for diode i given by: V exp (4) UT x V x z V y x V x (3) ref M4 M M M5 M6 ref M6 M8 M7 M3 M4 The node i an fite impedane node with the voltage applied to it i repliated at the node. Alo when a urrent i jeted the node, the ame urrent i jeted to node. The notation + denote a poitive put urrent onveyor (+) wherea - denote a negative put urrent onveyor (-). Thi performane an be ahieved by ombg a voltage follower plaed between termal and, with non-vertg and vertg urrent buffer (mirror) between termal and (+ and -). Fig. how blok diagram of the propoed urrent onveyor. The unity ga feedbak of op-amp at the front end fore Vx to be equal to Vy and the urrent mirror at the bak end lead to z to be equal to x + (and x -). - OP M5 M3 Figure 3. iruit diagram of the propoed Ug Kerhief voltage law (KVL) for the voltage of the diode the loop and the -V relationhip of diode it i obtaed: y replag reult: 3 M9 M M M (5) 4, rm, 3 4 it + OUT M (6) rm + - OP OUT Figure. lok diagram of the put of Fig. 3 how iruit diagram of the propoed urrent onveyor. The onveyor onit of a voltage follower and a urrent mirror. The voltage follower itelf i realized by two tage: a pair of omplimentary differential amplifier and a omplimentary ommon oure amplifier. Tranitor M- M5 and M6-M are employed for NMOS-put and PMOSput differential amplifier, repetively. Tranitor M9 and M are ued for ommon oure amplifier, whih the put of the ommon oure amplifier i fed bak to the put of differential amplifier to ure of voltage follower operation. The i deigned MOS tehnology and feature low voltage upply and low iruit omplexity, whih lead to low voltage appliation. 3. Squarer/divider n thi ubetion a modular heme of the urrent-mode quarer/divider by ug of a the bai ative buildg blok i preented. Figure 4 how the propoed iruit for M Equation (6) how the quarer/divider behaviour of the the propoed iruit the Fig Filter For a urrent-mode firt-order low-pa filter, put urrent and put urrent f Laplae doma are f related a [, ]: f (7) f whih, / i the ut-off frequeny of the filter. Fig. 5 how the bai iruit of the propoed low-pa filter. For thi iruit the -V relationhip of tranitor Mf aturation region and it derivation an be expreed by []: f Vap Vth d f dvap f (8) whih, V V i the voltage of apaitor. ap g

3 H f ap f ap nternational Journal of Latet Trend omputg (E-SSN: ) 9 Volume, ue, Marh 3 - R V ap Mf Figure 5. urrent-mode low-pa filter priple - rm 4 Figure 4. lok diagram of the propoed quarer/divider f f Vap Mf Ug (8) and alo equation ap ( ap f dv ap f ), it reult: oniderg the ut-off frequeny of the filter a: (9) f () and then, ubtitutg () to (9) give: f () ap f Fig. 6 how the propoed low-pa filter iruit baed on (), whih onit of a apaitor and only one tranitor. omparg thi filter with other propoed filter whih are realized baed on the withed apaitor tehnique [6] or i implemented by tranlear loop [7], or by two la-a tranondutor [8], how that thi analyi give a muh impler iruit. To obta thi imple iruit, a equation () diate, the ut-off frequeny of the filter i allowed to vary with put urrent. Thi dependeny to, and alo the maximum aeptable put ripple determe the uitable value for apaitor. Thi ubjet i diued next. The put urrent of the -to- onverter i a urrent with an a ripple ripple on it. n order that onverter give a good performane the amplitude of thi ripple hould be mall ompared to. Thi require uitable value for the ut-off frequeny of the filter. A it i mentioned above, i proportional to the put urrent of the onverter; however the value of the apaitor an be alulated uh a way that it elimate the effet of thi dependeny and alo ahieve enough auray the put of the onverter [, 3]. To thi end and for the firt tep, (7) time doma an be written a: d f f f () Figure 6. iruit diagram of the propoed urrent-mode lowpa filter A the put urrent of the filter onverter f i equal to the put urrent of the onverter from (8) the put urrent of the filter ( f ) and f i equal to then ubtitutg thee equation to (7) that reult: d (3) Multiplyg both ide of (3) by give: d, d (4) Equation (4) i time doma repreentation of a urrentmode filter with put of frequeny of rewritten a:, put of and ut-off. n Laplae doma, the equation an be. (5) Aumg that the put urrent i a uoidal funtion we have: o (6) true where i the frequeny of the put urrent of the onverter. Squarg both ide of (6) give the put ignal a follow:

4 H nternational Journal of Latet Trend omputg (E-SSN: ) 9 Volume, ue, Marh true o o. (7) Ug put ignal of (7) low pa filter of (5) give: where o, / g (8). (9) Aumg that and ug Taylor erie expanion give: true true o o o... 8 o 4... () 6 frequeny of the filter by employg larger apaitane or redug lear tranondutane of the tranitor of the filter. 4. Simulation Reult Fig. 7 how the omplete iruit diagram of the propoed -to- onverter baed on blok diagram of Fig. and 4 and iruit diagram of Fig. 3 and 6. The iruit wa imulated ug HSPE with.8um AMS MOS proe parameter. V dd =.93V,. V dd =-.93V and =9nF were employed. Fig. 8 how the teady-tate time repone of the -to- onverter for a 6uA peak-to-peak and khz frequeny of uoidal put urrent. The relative error of the put urrent of onverter for different amplitude of the uoidal put urrent i alulated, whih how the error le than 3% i ahieved for amplitude between ua and 5uA. 3 - R From (), the value of and peak-to-peak ripple at the put urrent are expreed a: 6, true 4 - MF MF MF3, /6 / true ripple, true (a) Figure 7. omplete iruit diagram of the propoed -to- onverter ripple, / / true (b) From () it an be onluded that if the frequeny of the put ignal i at leat five time bigger than the ut-off frequeny of the filter 5, then the auray of more than % an be obtaed at the put. n uh ae, the put urrent of the -to- onverter i a urrent with an a ripple on it. The amplitude rm of thi ripple i mall ompared to rm, i.e., rm. oniderg thee ondition and alo ug () it reult that the value of the apaitor to ahieve the auray of more than % i: 5 rm,max () m whih, i the lower end of the frequeny range and rm,max m i the put urrent higher end of the onverter. From (), it an be een more auray at the put of the onverter an be ahieved by dereag the ut-off Figure 8. Time repone of a uoidal put urrent and put urrent of the onverter 5. onluion A -to- onverter by employg a new quarer/divider baed on urrent onveyor i deigned. The propoed quarer/divider iruit ue MOS tranitor that

5 nternational Journal of Latet Trend omputg (E-SSN: ) 9 Volume, ue, Marh are operatg trong verion region and work low upply voltage. The reult of implemented onverter deigned baed on the propoed quarer/divider and implified filter how that it an be ued meaurg tegrated iruit. Referene [] Analog evie, A636 ata Sheet, Low level True -to- onverter, Available: eletroni.fr/lude_eletroni/pdf/ Analog evie/ A636JH.pdf. [] National-Semiondutor, LH9, True to onverter, Available: et/dataheet-pdf/national Semi ondutor/ LH9. html. [3] Maxim, M536 ata Sheet, True -to- onverter, Available: dataheet/dex.mvp/id/97. [4] J. Mulder, W. A. Serdijn, A.. V.. Woerd, and A. H. M. V. Roermund, "ynami tranlear - onverter," Eletron. Lett., vol. 3, no., pp , Ot [5] J. Mulder, A.. V.. Woerd, W. A. Serdijn,and A. H. M. V. Roermund, An - onverter baed on the dynami tranlear priple, EEE J. Solid-State iruit, vol. 3, no.7, pp. 46-5, Jul [6] W. S. Wey, and.. Huang, MOS delta-igma true onverter, EEE J. Solid-tate iruit, vol. 35, no., pp , Feb.. [7]. Pyhalo and S. Vlai, A ytemati deign proedure for quare-root -doma iruit baed on the ignal flow graph approah, EEE Tran. iruit Syt., Fundam. Theory Appl., Vol. 49, No., pp. 7-7, e.. [8] A. J. Lopez-Mart, and A. arloena, A.5V urrentmode MOS -to- onverter, Analog ntegrated iruit Signal Proe., vol. 36, pp , 3. [9] A. Fabre, O. Saaid, F. Wiet and. ouheron, High frequeny appliation baed on a new urrent ontrolled onveyor EEE Tranation on iruit and Sytem-, 3, pp. 8-9, 996. []. A. E La ruz-la, A. J. Lopez-Mart, A. arloena and J. Ramirez-angulo,.5v urrent-mode MOS - onverter baed on la-a tranondutor, EEE Tran. iruit Syt., Expre rief, vol. 5, no. 7, pp , Jul. 5. [] E. Farhidi, S. M. Sayedi, A.V urrent-mode true onverter baed on the floatg gate MOS tranlear priple, Miroeletroni Journal, Elevier, vol. 39, no., pp , Feb. 8. [] E. Farhidi and S. M. Sayedi, A miropower multi deade dynami range urrent-mode true rm-to-d, MWSAS 7, Proeedg of the 5 th EEE iruit and Sytem nternational Midwet Sympoium, pp , Aug. 7. [3] R. Frey, urrent mode la-a eond order filter, Eletron. Lett., vol. 3, pp. 5 6, Feb Author iography Ebrahim Farhidi wa born Shouhtar, ran, 973. He reeived the.s. degree 995 from Amir Kabir Univerity, ran, the M.S. degree 997 from Sharif Univerity, ran and the Ph.. degree 8 from eletrial engeerg at UT, ran, all eletroni engeerg. He worked for Karun Pulp and Paper ompany durg 997. From he ha been with hahid hamran univerity, Ahvaz, where he i urrently aitant profeor and head of eletrial engeerg department. He i author of more than 6 tehnial paper eletroni. Hi area of teret lude urrent-mode iruit deign, low power VLS iruit, and data onverter.