Crystal Controlled CMOS Oscillator for MHz RFID Reader. S kristalom krmiljen CMOS oscillator za MHz RFID bralnik

Transcription

1 Original cientific paper rytal ontrolled MOS Ocillator for 3.5 MHz RFID Reader S. M. A. Motakabber, M. I. Ibrahimy Journal of Microelectronic, Electronic omponent Material Vol. 43, No. (3), 9 3 Department of Electrical omputer Engineering, Faculty of Engineering, International Ilamic Univerity Malayia, Malayia Abtract: A deign procedure of MOS integrated crytal ocillator for 3.5 MHz RFID i decribed in detail by uing mathematical Mentor Graphic VSI deign tool ADK-3. The ytem i deigned by uing MOS.8 µm foundry rule evel-3 tranitor model. The frequency tability of the ocillator i created by uing piezoelectric crytal. The deigned MOS crytal ocillator can be integrated with the other part of the RFID reader ytem during VSI deign. The computer-generated phae noie i howed dbc/hz at offet of khz the power diipation i.5 mw at power upply.v. Key word: rytal ocillator, MOS ocillator, 3.5 MHz RF ocillator, piezoelectric ISO4443 S kritalom krmiljen MOS ocillator za 3.5 MHz RFID bralnik Povzetek: V članku je opian potopek načrtovanja MOS ocilatorja z integriranim kritalom za 3.5 MHz RFID pomočjo matematičnega in Mentor Graphic VSI načrtovalkega orodja ADK-3. Sitem uporablja.8 µm MOS tehnologijo in model tranzitorjev evel-3. Piezoelektričen krital krbi za tabilizacijo ocilatorja. MOS kritalni ocilator e lahko vgradi v otale dele RFID itema med načrtovanjem VSI. Računalniško generiran šum j eprikazan pri dbc/hz pri odmiku khz in moči.5 mw ob napajanju. V. Ključne beede: kritalni ocilator, MOS ocilator, 3.5 MHz RF ocilator, piezoelektričnot ISO4443 * orreponding Author amotakabber@iium.edu.my Introduction Radio Frequency Identification (RFID) i ued to identify a tagged object by uing radio frequency wave. Due to huge potential robutne nature, the RFID ytem have variou type of application uch a product chain management ytem, acce control electronic ticket, fare collection, product labeling, proximity card etc. In fact the heart of the ytem i a well table RF ource or ocillator. Almot all modern radio communication ytem i ued at leat one highly table radio-frequency ource or ocillator for enuring the reliable communication. A crytal ocillator ha the property of generating extremely table frequency. An electronic ocillator circuit produce repetitive electric ignal from a dc ource. The circuit operation principle of two main type of electronic ocillator (harmonic ocillator relaxation ocillator) are completely different. The baic tructure of a harmonic ocillator i an electronic amplifier of which output i attached with an electronic filter network. The output of the filter network i feedback again into the input of the amplifier. In the beginning when the power upply of the circuit i witched on, the amplifier output contain only noie. The noie travel through the filtering network i being filtered out. The output (or a portion of the output) i then re-amplified, filtered feedback repeatedly until it gradually reemble the inuoidal output. A piezoelectric crytal may take place of the filter network to tabilize the frequency of ocillation, reulting a a crytal ocillator. There are many technique to implement the harmonic ocillator [], becaue there are different way to deign an amplifier filter network. On the other h relaxation ocillator produce non-inuoidal output wave uch a a quare or aw-tooth wave. Thi ocillator contain a nonlinear active component like a tranitor i ued for periodically charging dicharging the energy in a capacitor or inductor. The change of energy in the de- 9 MIDEM Society

2 S. M. A. Motakabber et al; Informacije Midem, Vol. 43, No. (3), 9 3 vice caue abrupt variation on the output waveform generate non-inuoidal wave. ike a harmonic ocillator crytal ocillator are often preferred for generating a table ocillation. The integrated circuit i more reliable table to implement a an amplifier than dicrete component amplifier circuit. Therefore, the MOS circuit are bet uitable for deign of the active part of the ocillator with a quartz crytal unit. The current mode operation of analog circuit are more uitable for implementing in the MOS integrated technology. They have a greater gain-bwidth product than circuit operating in the voltage mode with the ame tranitor characteritic []. Thu current mode operation of analog circuit are uitable for high frequency analyi. The current conveyor i the baic building block for current mode operation. It can be ued for realization of negative impedance converter (NI) with current or voltage controlled negative input reitance. Such NI circuit have a great gain-bwidth product tatic characteritic whoe parameter can be eaily modified to the optimal form for ocillator under deign. Electrical Model of the rytal A piezoelectric (quartz) crytal can be modelled a an equivalent electrical network with low impedance (erie) high impedance (parallel) reonance point paced cloely together a hown in Figure. Figure : rytal ymbol it electrical equivalent model Uing aplace tranform, form the equivalent model of the crytal the impedance of thi network can be written a: Z( ) (/(. c ) +. R ) (/(. o)) Or, Z( ) R R +. + ω S + ω From Equation () aume, ω. () p () +. p ω +. ω (3.a) p + Or, ω ω ; when( ) (3.b) Where, jw, i the complex frequency, w w p are the erie reonant parallel reonant angular frequency in radian per econd repectively. In thi reearch work the deign parameter of the crytal pf,.9 mh,. pf R 35 W are conidered for generating 3.5 MHz frequency. 3 Equivalent ircuit of the MOS rytal Ocillator The detailed chematic of the olpitt crytal ocillator [3] it equivalent circuit are hown in Figure (a) (b) repectively. The nmos tranitor T act a a negative reitance device tranitor T a a bia current ource I b repectively. The tranitor T alo performed a a current mirror for the reference current I ref in the ame chip through nmos tranitor T 5. It provide the table current with repect to change of the power upply temperature. The 5pF decoupling capacitor 4 i added to prevent the high frequency noie leakage from the ocillator. The grid bia reitor R g combined with the two pmos tranitor T 3 T 4 i provided the bia for the nmos tranitor T T. The biaing i deignated in uch a way o that the tranitor can alway operate in the aturation region during the ocillation. The pmos tranitor T 3 T 4 are et to be W/ a./4. for giving a bia voltage at V dd the node a. The external capacitor 3 along with the piezoelectric crytal are worked a a reactive feedback network for three-point olpitt ocillator circuit. The capacitor 3 are elected a pf pf repectively in thi project. The MOSFET parameter are ued in thi deign a hown in Table. In Figure (b) the equivalent circuit parameter, 3 + K, the effective drain reitance of T T a, r a (r d r d ), finally R p R c + (r d3 r d4 )are ued. The drain reitance of T 5 i conidered a zero value ince during the ocillation the capacitor 4 become hort circuit.

3 S. M. A. Motakabber et al; Informacije Midem, Vol. 43, No. (3), 9 3 g m W µ I d (5) nx (a) The parameter, μ n x are defined by the proce conidered, W are the phyical dimenion of width length of the tranitor repectively. The parameter I d i the bia current of the tranitor T, in thi deign it wa conidered a 5 μa. The bia current I d can be calculated from the reference current I ref, in thi deign I ref ha been conidered a 3 μa. The apect W ratio the other parameter of the repective tranitor are hown in Table. Table : Phyical dimenion parameter of the MOSFET are ued in the deign. (Technology ued.8 µm proce ued for tranitor model evel-3) FET No. FET type W (µm) (µm) Apect ratio W gm (ma/v) rd (MΩ) (b) Figure : (a) Schematic of a olpitt crytal ocillator (b) it equivalent circuit 4. ritical Tranconductance g m The critical tranconductance g m of the tranitor T i the minimum value which i eential for utaining the ocillation of the circuit. Figure (b) i the implified mall ignal equivalent circuit of the crytal ocillator where the paive motional impedance Z m i conidered a the erie R tank (reonant) circuit. The remaining part of the circuit which include the paive a well a active component i conidered a the load impedance Z. On the bai of negative-reitance model of the ocillator, the ocillation may occur [4][5] only if, R { Z ( j } ) + R ω e (4) Here, R { Z ( jω ) } e i the real component of the impedance Z at angular frequency w of ocillator. If it i conidered that, R R { Z ( j ) } e ω ω π x3.5x rad/, the critical tranconductance of the tranitor T i calculated a g m.4 ma/v. Uing a afety factor of about 4, the tranitor T mut have a critical g m 5. ma/v. From MOSFET theory, the relation of g m with tranitor phyical dimenion proce parameter are a follow T nmos T nmos T3 pmos T4 pmos T5 nmos Etimation of the Ocillation Frequency by the Feedback Model According to the feedback theory, a circuit would be ocillating only, if the mall ignal cloe-loop gain of the circuit i greater than unity the phae hift of the feedback loop i equal to zero (poitive feedback). The cloed-loop gain can be repreented a Equation (). T ( ) A( ) F( ) () Here, A() i the gain without feedback F() i the feedback factor. From Figure (b), the value of the generated frequency can be calculated by Equation (7). ω (7) (. ) + 3 When the capacitor inductor deign value are ued in Equation (7), the generated frequency of ocillation i, ω rad x, or, f x Hz

4 S. M. A. Motakabber et al; Informacije Midem, Vol. 43, No. (3), 9 3 ayout Deign The layout deign i done in analog deign mode by Mentor Graphic deign tool kit ADK-3. The deigned ocillator layout with an iolation buffer amplifier i hown in Figure 3. The maximum amplitude wing of the inuoidal wave i 7 mv PP at power upply.v, power conumption i 5 mw The phae noie meaured by imulation i 39.5 dbc/hz at khz offet frequency. The deigned ocillator can tart up reliably within a wide range of upply voltage (.9~3.V) able to operate in a wide range of temperature ( ~5 ) to maintain a table frequency. Figure 3: The deigned ocillator an iolation buffer amplifier layout To prevent the ocillator circuit from the ubtrate noie all the p-channel tranitor are placed inide the n-well the n-well i connected with the power upply rail V dd In addition the n-channel tranitor T T are urrounded by two guard ring which are connected to the ubtrate. The unued area of the chip are filled with extra connection to the ubtrate well-region. To avoid the loading effect of the ocillator an iolation buffer amplifier i alo deigned on the ame ilicon chip. The ocillator including an analog buffer amplifier i occupied a die area of 7µm x µm. The amplitude of the ocillation i controlled carefully to prohibit the potential of the drain of T the ource of T from exceeding power upplie V dd V repectively to prevent the latch-up effect. 7 Simulated Reult The imulated reult are hown in Figure 4. The ocillator layout circuit i imulated which ha been deigned by uing MOS.8 µm foundry rule together with a buffer amplifier a hown in Figure 3. Different VSI deign oftware are ued for imulation purpoe it found the ame performance of the circuit. (a) (b) Figure 4: (a) Build-up of ocillation time domain ignal of the ocillator, (b) frequency domain repreentation of the output ignal 8. Dicuion oncluion A tep by tep procedure of integrated crytal ocillator deign ha been decribed. Thi deign can be a guideline for a reliable hort time tart-up low phae noie allowing frequency tability ± 7. khz for 3.5 MHz RFID ytem. In ISO4443 tard thi i eential for 3.5 MHz RFID ytem. Any additional capacitor

5 S. M. A. Motakabber et al; Informacije Midem, Vol. 43, No. (3), 9 3 acro the piezoelectric crytal caue the parallel reonance to hift downward. Thi technique can be ued to adjut the ocillator frequency exactly at 3.5 MHz. The capacitor 3 value are affected the gain of the ocillator circuit oberved that lower the value higher the gain, again the gain i alo affected by the 3 ratio, higher the value a the reult of higher gain. A buffer circuit i ued in thi deign with the ocillator to derive a load during imulation. Thi buffer i ued to iolate the load from the ocillator circuit which enure the table ocillation. Reference. W. Thommen, An Improved ow Power rytal Ocillator, Proceeding of the 5th European Solid-State ircuit onference, ESSIR 99, - 3 Sept. 999, pp I. I. Ivanievic D. M. Vailjevic, The Quartz rytal Ocillator Realization Uing urrent onveyor, IEEE Tranaction on ircuit Sytem- I, Aug. l993, vol. 4, pp P. Andreani, W. Xiaoyan,. Vi, A. Fard, A Study of Phae Noie in olpitt -tank MOS Ocillator, IEEE Journal of Solid-State ircuit, vol. 4 (5), May 5, pp M. Toki T. Huchiawa, A Method of Analyzing Negative Reitive Equivalent apacitance of MOS rytal Ocillator, Electronic ommunication in Japan (Part II: Electronic), vol. 77(), June 994, pp B. Mekoob S. Praad, oop-gain Meaurement Feedback Ocillator Deign, IEEE Microwave Guided Wave etter, vol. (9), Sept. 99, pp Arrived:.. 3 Accepted: