A Single-Stage High-Frequency Isolated Three-Phase AC/DC Converter

Transcription

1 1 A Single-Stage High-Freueny Isolated Three-Phase AC/DC nverter Diego Santos Greff and Ivo Barbi* *I Senior Member Federal University of Santa Caratina/Power letronis Institute Florianopolis, SC, , Brazil dsgreff@yahoo.om.br, ivobarbi@inep.ufs.br Abstrat Reently global suppliers of teleom energy solutions have been researhing alternative retifier topologies apable of proessing high power using ohmi isolation with ompat size. This paper introdues a new onept of a singlestage high-freueny isolated three-phase AC/DC onverter. In order to validate this topology, forward/flybak onverters and three-phase buk retifiers are briefly reviewed. This paper also presents a modeling and ontrol tehniue proposal. The theoretial onepts are verified by the digital simulation of a retifier onneted to a 22V rms grid delivering 6kV A at 6V/1A. Keywords - three-phase PWM buk retifier, high-freueny isolation, do transform. I. INTRODUCTION The reuirements of rigid harmoni standards rule out the use of lassi diode retifiers as the front-end onverter for high-power a-d appliations. These impositions led to the employment of the standard three-phase PWM retifiers as front-end a-d onverters, known as boost or buk retifiers. Both tehnologies provide low total harmoni distortion, power fator orretion, onstant power flow, so that minimal filtering omponent size and ost an be ahieved. Buk topologies an be a onvenient alternative when the input line voltage is high as opposed to boost topologies, whih have the undesirable property of high devie voltage ratings, or when the variable d output voltage exeeds the appropriate levels. In some high power appliations, ohmi isolation between the load and the grid is neessary. In suh ases, usually a two-stage power proessing unit is used being omposed of: a front-end six-swith buk or boost retifier asaded with an isolated d/d onverter. In three-phase uninterruptible power supplies (UPS), isolation is ofterovided by a bulky ommerial freueny transformer either at the input or at the a output side. The first high-freueny isolated topology was proposed in the [1] using a swith-mode retifier (SMR) struture that has six hard swithing thyristors with bidiretional urrent flow. Improvement on this topology [2] an be ahieved by using the PWM ontrol method for the SMR, based on oordinate transforms. In this method the iron loss in the transformer may beome visible beause of the high-freueny. Referene [3] proposed a novel ZVS PWM three-phase retifier, topologially euivalent to the onverter desribed /6/$2. '26 I 2648 in [1] and [2] but is improved by ZVS whih makes use of the parasiti apaitanes of the swithes and the transformer leakage indutane. However, to obtain all the benefits of this struture, twelve power swithes (MOSFTs or IGBTs) and a ompliated PWM strategy are reuired for effetive implementation. In this paper a simple and novel tehniue to isolate unidiretional three-phase buk retifiers is introdued. The topology is shown in Figure 1. The high-freueny isolation utilizes a forward/flybak onverter introdued by [4]. It is worth emphasizing that no additional swithes are reuired in the d-d onverter and a wide load voltage regulation is ahieved, obviously defined by the transformer design. In order to validate the proposed topology a review of buk retifiers, the modulation tehniue used, the modeling and ontrol of the retifier and simulation results are presented. 1 Va Vb V Fig. 1. Da4 Da1 Sa D1 D4 Da5 Da2 High-Freueny isolated three-phase AC/DC onverter. Sb D2 D5 II. FORWARD/FLYBACK CONVRTR High-freueny isolation is ahieved by a forward/flybak onverter [4], whih is atually a forward onverter with transformer demagnetization trough the load. The forward subonverter operates in ontinuous ondution mode (CCM) and the flybak sub-onverter iisontinuous ondution mode (DCM). This is defined so that the forward sub-onverter proesses pratially all of the power delivered to the load. Figure 2 shows the topology of the forward/flybak onverter. 1 patent reuired: PI Da6 Da3 S D3 D6 Drl

2 Sw Ii mag Ii magpk Ii Dp In s Ii M i mag I In s Ii m I Ii DRL Ii M Ii m Fig. 2. Forward/flybak onverter. Ii I Ii magpk I Ii Ii M The operating stages an be briefly desribed in three intervals: 1) First Stage: the swith is losed, the transformer s ore is magnetized and power is transfered from soure to the load through seondary winding n s, aording to Figure 3(a); 2) Seond Stage: the swith is opened, the urrent of L o free-wheels through, demagnetization of the transformer s ore is initiated by the demagnetizing urrent through demagnetizing winding trough the load, as observed in Figure 3(b); 3) Third Stage: the swith is still open, the urrent of L o free-wheels through and the transformer s ore is ompletely demagnetized, aording to Figure 3(). Sw Sw (a) First State Fig. 4. Iv I. V Sw o I It a =T It o it It d Ii m Forward/flybak onverter theoretial waveforms. As a omplement to the operating stages and waveforms, some relevant peak voltage euations an be defined for the semiondutor devies: Swith peak voltage: v swpk = V o (2) D s seondary diode peak voltage: v pk = n s V o (3) D d demagnetizing diode peak voltage:: v pk = V o (4) free-wheel diode peak voltage:: v Drlpk = n s V o (5) Fig. 3. Sw (b) Seond State () Third State Operation states of the forward/flybak onverter. Figure 4 shows the main waveforms for the above mentioned operating stages. From the volt seond balane, the ratio of the demagnetizing turns per primary turns is obtained whih, ensures the demagnetization of the transformer s ore and operation of the flybak sub-onverter in DCM. V o (1 D) D (1) 2649 III. MODULATION TCHNIQU The iruit diagram of the unidiretional three-phase PWM buk retifier is shown in Figure 1. The use of a unidiretional buk retifier is justified by the grid-to-load power flow appliation, simplifying and reduing osts of the power, proessing and drive strutures [5]. Regarding the line urrent filtering in the boost topology, the ontinuous input urrent minimizes the reuirements for additional input filtering, while in the ase of the buk retifier, an input filter is neessary in order to eliminate the swithingfreueny harmonis. The buk retifier operates with a lower output voltage than the boost retifier. It also presents an advantage when regarding protetion sine the shoot-through of a bridge leg is possible in the boost retifier. Therefore, the buk topology ould be more onvenient in some high power appliations. In lassial buk retifiers a path for the load urrent must be always available, even at the swithing instant. In the proposed topology, it is not appropriate for the swithing pattern to provide a ontinuous path for the load urrent, sine this

3 TABL I MODULATION STATS State Two-Level Three-Level Swithes m a m b m y a y b y S1 S2 S ±1 Vv sa,b, Vv t Im a Im b Vs1 Im operation would saturate the ore of the transformer. Thus, a simplified modulation an be used in this ase. In this paper, a balaned grid voltage soure with a peak voltage of V pk : v a v b v = V pk sin(ω t) V pk sin(ω t 12 o ) V pk sin(ω t 12 o ) (6) Defining three modulating signals m a,m b,m with modulation index M: m a M sin(ω t) m b m = M sin(ω t 12 o ) M sin(ω t 12 o ) (7) A simple way to obtain an adeuate salar modulation is by providing a three-level modulation, as proposed by [6], whih applies a transformation matrix to onvert a low-level modulated signal into a three-level modulated signal. y a y b y = m a m b m (8) The matrix of (8) onverts the two-level modulating variables m a,m b,m into three-level modulating variables y a,y b,y. The proper magnitude of the modulating signal y ab along with minimum logi implementation an be diretly applied to drive the swithes. Table I summarizes the modulating signals and swithing states for the modulatioresented. In Figure 5, the resulting waveforms of the level transformation illustrate an adeuate signal omposition to drive the swithes of a buk retifier. Fig. 5. Iy a Iy b Iy Transform Waveforms. A. AC Input Model The euivalent per phase iruit of the buk retifier under analysis is shown in Figure 6, and onsidering that the per phase input urrent of the retifier bridge [i s ] ab is defined by: [i s ] ab = I o [m] ab (1) L s I[v]ab I I[i ] ab C f Fig. 6. R s Per phase euivalent input iruit. I[i s ] ab =I o [m] ab The state euations that represent the above iruit in threephase oordinates are: IV. MODLING AND CONTROL The modeling applied here is based ohase variables in the do oordinates system [7], [8], [9]. In order to simplify the analysis, a 9 o phase lead is applied to the grid voltage soures (6) and to the modulating signals (7). In the following analysis, the seondary omponents are transferred to the primary of the transformer. R o =( n s ) 2 R o ; L o =( n s ) 2 L o ; C o =(n s ) 2 C o ; I o =(n s ) I o ; (9) 265 =[i ] ab [i s ] ab (11) = C f d [v ] ab [i s ] ab (12) [v ] ab =[v] ab L s d [i s] ab R s (13) Substituting (1) into (12): = C f d [v ] ab I o [m] ab (14)

4 Inserting (13) into (14) results in the input line urrent of the buk retifier: = C f d [v] ab L s C f d2 2 R s C f d (15) I o [m] ab Applying the Park transform to (15) and suppressing the zero seuene oordinate due to the absene of a ground, the main state euations for the input a model io oordinates are obtained: i d R s C f di d i R s C f di ωr s C f i L s C f d2 i d 2 2 ω L s C f di = C f dv d ω 2 L s C f i d ω C f v m d I o (16) ωr s C f i L s C f d2 i 2 2 ω L s C f di d = C f dv ω 2 L s C f i ω C f v d m I o (17) The euations that represent the iruit of Figure 7 are defined below: [v ] T ab [m] ab = L o di o i o =C o dv o v o R o v o (19) (2) In this analysis it is onsidered that the filter apaitor voltage [v ] ab is ihase with and has the same amplitude as the grid voltage [v ] ab, so that (19) an be rewritten as: [v] T ab [m] ab = L o di o Inserting (2) into (21) yields: v o (21) [v] T ab [m] ab = L o C o dv 2 o 2 L o R o dv o v o (22) In order to obtain a load model in the do oordinates system the Park transform is applied to (22) and the left-hand terms are defined by the following euality: [v] T 3 ab [m] ab = 2 V pk T m o m d m (23) Using the fundamental onepts of small-signal modeling, linearization and deoupling, in addition to some algebrai manipulations, results in the small-signal transfer funtion of the do urrents (ĩ d, ĩ ) with respet to the modulation signals ( m d, m ) of the a input model: G i (s) = ĩd(s) m d (s) = ĩ(s) m (s) = I o s 2 ω Rs s 2 L s ω 2 ( ω 2 ω 2 ω 2 ) (18) B. DC ad Model In order to obtain a simplified model, the forward/flybak onverter is onsidered to operate as a forward onverter in CCM. The flybak sub-onverter is negleted beause, in this design, the effet of the demagnetizing urrent is not relevant to the load voltage omposition. The output filter and load are referred to the primary of the transformer and a load euivalent iruit is defined in Figure 7. Fig. 7. Ii o [v ] T ab.[m]ab Ii Ii - ad euivalent iruit. L o C o Iv o V pk m d =L o C o dv 2 o 2 L o R o dv o v o (24) The linearized small-signal representation of (25) in the freueny domain is: 3 2 V pk m d (s) =L o C o ṽ o (s) s2 L o R o ṽ o (s) sṽ o (s) (25) Substituting the term m d (s) in (25) by the transfer funtion of (18), the transfer funtion of the load voltage ṽ o(s) with respet to the diret input urrent ĩ d (s) is defined as: =ṽ o G v (s) (s) 3 ĩ d (s) = 2 Vpk I o where: C. Closed-op ntrol ω 2 = s 2 ω Rs s 2 L s ω 2 ( ω 2 ω2 ω 2 L o C o s2 L o R s 1 (26) o 1 L s C f (27) The blok diagram depited in Figure 8 omprises the isolated buk retifier, the oordinate transformations, the modulation and the losed loop load voltage. The loop ontrol is illustrated ietail in Figure 9, where C i (s) is the urrent ompensator, C v (s) is the voltage ompensator, K i is the input urrent sample gain, K v is the load voltage sample gain, and Vt 1 is the gain that represents the PWM modulator. In order to ontrol the seond-order harateristis of the a-input, G i (s), and the d-load, G vd (s), linear analog ompensators were designed )

5 Iv ia Iv Ib Iv I Ki Ii Ia Ii Ib Ii I Ii a Ii b Ii Ii a Ii b Ii Park Transform I I d Ii ia Ib I I ref I dref Current ntrolers Voltage ntroler Unidiretional Three-Phase PWM Buk Retifier M ' M d' PWM Pattern d Deoupling M ia Ib I d V Oref Drl Inverse Park Transform Kv line urrent and the total harmoni distortion (THD), whih was less than 4%. va[v], ia*1[a] Fig. 8. mplete ontrol loop blok diagram. Fig. 1. Phase voltage and line urrent. Ii ref C i (s) Im' (s) V t -1 G i (s) Ii (s) G v (s) Fig. 9. Ii dref K i Im' d (s) C i (s) K i V t -1 C v (s) Iid d (s) G i (s) Iv o ref mplete blok diagram of the ontrol loops. V. SIMULATION RSULTS G vd (s) In order to validate the proposed isolated buk retifier, a losed-loop simulation was realized with the following projet parameters: V line line = 38V ; f =3kHz; P o = 6kW; V o =6V ; I o = 1A. An appropriate design of the a input filter was arried out to provide a high power-fator (e.g. greater than.98), and low T.H.D of line urrent, (i.e., up to 5%) and resulted in L s = 175µH and C f =23µF. The transformer, output filter and load parameters are: L mag = 3.3mH; = 28turns; n s = 12turns; = 3turns; L o = 13µH; C o = 3µF ; R o =.6Ω. The high uality of the filtered line urrent is verified in Figure 1. Figure 11 shows the urrent and voltage waveforms of the a filter apaitor. Note that the voltage losely follows the grid phase voltage. The voltage aross the seondary diodes an be observed in Figure 12, where the peak values follow the peak voltage values estimated by euations (3), (4) and (5). Figure 13 shows that the ore is ompletely demagnetized by the demagnetization winding. The peak voltage aross the swithes (see Figure 14) is limited to np V o = 56V. The performane of the ontrol system was tested for a 5% load inrease. The results of Figure 15 and 16 showed that the voltage was properly ontrolled To onfirm the exellent performane of the isolated buk retifier, partially due to the modulation strategy and input filter uality, Figure 17 illustrates the spetrum of the filtered Kv 2652 vf[v] e if*3[a] Fig. 11. Voltage and urrent of a filter apaitor C f. Fig. 12. vds[v] vdd[v] vdrl[v] Voltage aross diodes D s (thik line), D d and D rl (thin line). VI. CONCLUSION A new single-stage high-freueny isolated three-phase AC/DC onverter was presented. The topology uses only three swithes and is a promising alternative solution for ommerial appliations, suh as teleommuniatioower supplies or UPS systems. The use of the forward/flybak onverter is an original, robust and flexible struture to isolate buk retifiers without using ompliated PWM modulation strategies or additional

6 ids[a] idd[a] Fig Current through diodes D s and D d. Fig. 16. io[a] ad urrent for a 5% step inrease in Total Harmoni Spetrum of the Input Line Current vsw[v] 3 2 Current Amplitude [A] 5 THDi = 3.96% Freueny [Hz] Fig. 14. Voltage aross swith Sa. Fig. 17. THD and input line urrent harmoni spetrum. Fig. 15. vo[v] ad voltage for a 5% step inrease in. swithes. The ontrol is based on sampling the input urrents and the load voltage, instead of the tehniue normally used whih onsists of the additional measuring the voltages aross the apaitors. The transformer is designed to operate over a wide range of turns ratios by using one or more assoiated transformers. However, speial are should be taken with the voltages aross the seondary diodes. If these voltages are too high, the feasibility of forward/flybak onverter would not be viable. The new topology was verified by simulations with exellent results. In the near future, results of a prototype that is urrently being designed and onstruted will be published RFRNCS [1] Manias, S.; Ziogas, P. D.,A Novel Sinewave in AC to DC with High- Freueny Transformer Isolation, I Transations on Industry letronis, Vol.I-32, No.4, pp , [2] Inagaki, K.; Furuhashi, T.; Ishiguro, A.; Ishida, M.; Okuma, S.,A new PWM ontrol method for a to d onverters with high-freueny transformer isolation, I Industry Appliation Soiety nferene Pro. 1989, pp [3] Vlatkovi, V.; Borojevi, B.; Lee, F. C.,A Zero-Voltage Swithed, Three- Phase Isolated PWM Buk Retifier, I Transations on Power letronis, Vol.1, No.2, Marh [4] Park, J.N.; Zaloum, T.R.,A Dual Mode Forward/Flybak nverter, I Power letronis Speialists nferene, PSC 82 Reord, 1982, pp [5] Malesani, L.; Tenti, P.,Three-Phase AC/DC PWM nverter with Sinusoidal AC Currents and Minimum Filter Reuirements, I Transations on Industry Appliations, Vol. IA-23, No.1, January/February [6] Wang, X.; Boon-Tek, O., Unity PF Current-Soure retifier Based on Dynami Trilogi PWM, I Transations on Power letronis, Vol.8, No.3, July [7] Borgonovo, D.; Modelagem e ntrole de Retifiadores PWM Trifsios mpregando a Transformao de Park., Federal University of Santa Catarina, Master Thesis, Florianpolis, 21. [8] Hiti S. ; Vlatkovi V.; Borojevi D.; Lee F.C.Y.,A new ontrol algorithm for three-phase PWM buk retifier with input displaement fator ompensation., I Transations on Power letronis, Vol.9, No.2, pp , Marh [9] spinoza J.R.; Joos G.,State variable deoupling and power flow ontrol in PWM urrent-soure retifiers,i Transations on Industrial letronis, Vol.45, No.1, pp , February 1998.