CS61C : Machine Structures
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1 inst.eecs.berkeley.edu/~cs61c CS61C : Machine Structures Lecture 23! Introduction to Synchronous Digital Systems (SDS) Switches, Transistors, Gates!!!Senior Lecturer SOE Dan Garcia!!! Web turns 25 In 1989, Sir Tim Berners- Lee sat in an office in CERN and developed the WWW. Celebrate: #web25! bits.blogs.nytimes.com/2014/03/11/as-the-world-wide-web-turns-25-fear-about-its-future! CS61C L23 Synchronous Digital Systems (1)! Garcia, Fall 2011 UCB!
2 New- School Machine Structures (It s a bit more complicated!) Parallel Requests Assigned to computer e.g., Search Garcia Parallel Threads Assigned to core e.g., Lookup, Ads Software Parallel Instruc2ons >1 one Dme e.g., 5 pipelined instrucdons Parallel Data >1 data one Dme e.g., Add of 4 pairs of words Hardware descrip2ons All one Dme Harness Parallelism & Achieve High Performance Hardware Warehous e Scale Computer Today s Lecture Core Memory Input/Output InstrucDon Unit(s) Main Memory Computer (Cache) Core Cor FuncDonal e Unit(s) A 3 +B 3 A 2 +B 2 A 1 +B 1 A 0 +B 0 Smart Phone Logic Gates CS61C L23 Synchronous Digital Systems (2)!
3 What is Machine Structures? SoHware Hardware Applica2on (Chrome) Compiler Assembler Processor Memory Datapath & Control Digital Design Circuit Design transistors Opera2ng System (MacOS X) I/O system Instruc2on Set Architecture 61C CoordinaDon of many levels of abstrac-on ISA is an important abstracdon level: contract between HW & SW CS61C L23 Synchronous Digital Systems (3)!
4 Machine Interpreta4on Levels of RepresentaDon/ InterpretaDon High Level Language Program (e.g., C) Compiler Assembly Language Program (e.g., MIPS) Assembler Machine Language Program (MIPS) Hardware Architecture Descrip2on (e.g., block diagrams) Architecture Implementa4on temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; lw! $t0, 0($2)! Anything can be represented lw! $t1, 4($2)! as a number, sw! $t1, 0($2)! sw! $t0, 4($2)! i.e., data or instrucdons ! ! ! ! Logic Circuit Descrip2on (Circuit Schema2c Diagrams) CS61C L23 Synchronous Digital Systems (4)!
5 Synchronous Digital Systems Hardware of a processor, such as the MIPS, is an example of a Synchronous Digital System Synchronous: All operadons coordinated by a central clock Digital: Heartbeat of the system! All values represented by discrete values Electrical signals are treated as 1s and 0s; grouped together to form words CS61C L23 Synchronous Digital Systems (5)!
6 Logic Design Next several weeks: we ll study how a modern processor is built; starting with basic elements as building blocks Why study hardware design? Understand capabilities and limitations of hw in general and processors in particular What processors can do fast and what they can t do fast (avoid slow things if you want your code to run fast!) Background for more in depth hw courses (CS 150, CS 152) There is just so much you can do with standard processors: you may need to design own custom hw for extra performance CS61C L23 Synchronous Digital Systems (6)!
7 Switches: Basic Element of Physical Implementations Implemen2ng a simple circuit (arrow shows ac2on if wire changes to 1 ): A Z Close switch (if A is 1 or asserted) and turn on light bulb (Z) A Z Open switch (if A is 0 or unasserted) and turn off light bulb (Z) Z A CS61C L23 Synchronous Digital Systems (7)!
8 Switches (cont d) Compose switches into more complex ones (Boolean func2ons): AND A B Z A and B A OR Z A or B B CS61C L23 Synchronous Digital Systems (8)!
9 Transistor Networks Modern digital systems designed in CMOS MOS: Metal- Oxide on Semiconductor C for complementary: normally- open and normally- closed switches MOS transistors act as voltage- controlled switches CS61C L23 Synchronous Digital Systems (9)!
10 MOS Transistors Three terminals: drain, gate, and source Switch acdon: if voltage on gate terminal is (some amount) higher/lower than source terminal then conducdng path established between drain and source terminals G G S D S D n-channel open when voltage at G is low closes when: voltage(g) > voltage (S) + ε p-channel closed when voltage at G is low opens when: voltage(g) < voltage (S) ε CS61C L23 Synchronous Digital Systems (10)!
11 MOS Networks 1 (voltage source) 3v X Y what is the relationship between x and y? x 0 volts y 0v 0 (ground) 3 volts CS61C L23 Synchronous Digital Systems (11)!
12 Transistor Circuit Rep. vs. Block diagram! Chips are composed of nothing but transistors and wires.! Small groups of transistors form useful building blocks.! 1 (voltage source) a" b" c" 0" 0" 1" 0" 1" 1" 1" 0" 1" 1" 1" 0" 0 (ground) Block are organized in a hierarchy to build higher-level blocks: ex: adders.! (You can build AND, OR, NOT out of NAND!)! CS61C L23 Synchronous Digital Systems (12)!
13 How many hours h on Project 2a?! a) 0 h < 10! b) 10 h < 20! c) 20 h < 30! d) 30 h < 40! e) 40 h! Other administrivia?! CS61C L23 Synchronous Digital Systems (13)!
14 I could live without your handouts! a) Strongly disagree! b) Mildly disagree! c) Neutral! d) Mildly agree! e) Strongly agree! CS61C L23 Synchronous Digital Systems (14)!
15 Signals and Waveforms: Clocks! Signals! When digital is only treated as 1 or 0! Is transmitted over wires continuously! Transmission is effectively instant! - Implies that any wire only contains 1 value at a time! CS61C L23 Synchronous Digital Systems (15)!
16 Signals and Waveforms! CS61C L23 Synchronous Digital Systems (16)!
17 Signals and Waveforms: Grouping! CS61C L23 Synchronous Digital Systems (17)!
18 Signals and Waveforms: Circuit Delay! 2" 3" 4" 5" 3" 10" 0" 1" 5" 13" 4" 6" CS61C L23 Synchronous Digital Systems (18)!
19 Sample Debugging Waveform! CS61C L23 Synchronous Digital Systems (19)!
20 Type of Circuits! Synchronous Digital Systems are made up of two basic types of circuits:! Combinational Logic (CL) circuits! Our previous adder circuit is an example.! Output is a function of the inputs only.! Similar to a pure function in mathematics, y = f(x). (No way to store information from one invocation to the next. No side effects)! State Elements: circuits that store information.! CS61C L23 Synchronous Digital Systems (20)!
21 Circuits with STATE (e.g., register)! CS61C L23 Synchronous Digital Systems (21)!
22 Peer Instruction! 1) SW can peek at HW (past ISA abstraction boundary) for optimizations! 2) SW can depend on particular HW implementation of ISA! 12! a) FF! b) FT! c) TF! d) TT! CS61C L23 Synchronous Digital Systems (22)!
23 Design Hierarchy system datapath control code registers multiplexer comparator state registers combinational logic register logic switching networks CS61C L23 Synchronous Digital Systems (23)!
24 And in conclusion! ISA is very important abstraction layer! Contract between HW and SW! Clocks control pulse of our circuits! Voltages are analog, quantized to 0/1! Circuit delays are fact of life! Two types of circuits:! Stateless Combinational Logic (&,,~)! State circuits (e.g., registers)! CS61C L23 Synchronous Digital Systems (24)!
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