Module-1 Biasing of BJT

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1 Module 1 : Biasing of BJ Motivation: Module-1 Biasing of BJ his topic develops the fundamental understanding of transistor as a BJ. It gives an idea of types of transistor, the characteristics and the biasing Syllabus: Module Contents Biasing of BJ: DC operating point, opic Reference Duration Hour Self- Study 1Hour BJ characteristics & parameters Hour 2Hour All biasing circuits, Hour 1Hour analysis of above circuits CE and their design, variation of operation point and its stability Hour 2Hour Differential Amplifier, Hour 1Hour constant current source, current mirror Hour 2Hour 1.3. Weightage in university Examination: Learning Objective/ Outcome: Learning Objective: In this module student will try to 1. Understand concept of various components. 2. Understand concepts that underpin the disciplines of Analog and digital electronic logic circuits Learning Outcome: At the end student will be able Achieve Knowledge and Awareness of various components to design stable analog circuits Course Outcome: Student will be able to achieve Knowledge and Awareness of various components to design stable analog circuits heoretical Background: One has to have basic knowledge of electronics, to describe and understand the analysis and design of transistor amplifier basic principles of operations, working, characteristics and application of Voltage Regulators and components Abbreviations: IC is the collector current

2 IB is the base current IE is the emitter current 1.7. Notations: CMRR = Common Mode Rejection Ratio PSRR = Power Supply Rejection Ratio 1.8. Formulae: (IE = IC + IB) VEB = f1(vcb, IE) IC= f2(vcb, IE) VBE = f1 ( IB, VCE ) IC = f2( IB, VCE ) VBB = IB RB+ VBE IB = (VBB VBE ) / RB IC = IE= ICO / ( 1-αdc) = ICEO 1.9. Key Definitions: Semiconductor Any material that possesses a resistivity much higher than good conductors and much lower than good insulators. Bipolar ype of device whose functioning involves both majority and minority charge carriers Bipolar junction transistor. BJ Bipolar junction transistor is a 3-layer device containing both types of semiconductor material (either in p-n-p or np-n form). It typically has three terminals, common base (emitter, etc.) Configuration in which the base (emitter, etc.) the terminal of a three- terminal device is common to both the input and output loops of the circuit Characteristics Set of graphs that display any operating feature of an

3 Module 1 : Biasing of BJ 3 electronic device, such as collector current vs. collectoremitter voltage for a set of different base currents. Cut-off State of a semiconductor device in which the current is a minimum Active region Area on a device characteristic where the ratio between applied voltage and resulting current is constant. hat is, the device is not operating in regions such as saturation, cutoff, or ohmic. Saturation Condition in a semiconductor in which no further increase in current results, no matter how much additional voltage is applied. (2) In a BJ, the state in CE which the voltage from collector to emitter is a minimum, typically 100 mv. (3) In an FE, the state in which an increase in the voltage from drain to source does not result in a significant increase in non-zero drain current. Majority carriers Charge carriers made abundant in the doping process of extrinsic material electrons in n-type material or holes in p-type material. Minority carriers Charge carriers that are deficient in extrinsic material holes in n-type material or electrons in p- type material. Operational amplifier An Operational amplifier ("op-amp") is a DC-coupled high-gain electronic voltage amplifier with a differential input and, usually, a single-ended output. An op-amp produces an output voltage that is typically hundreds of thousands times larger than the voltage difference between its input terminals Differential amplifier An Operational amplifier ("op-amp"), which amplifies the difference between two input signals 1.10 Introduction

4 A transistor is basically a Si on Ge crystal containing three separate regions. It can be either NPN or PNP type. As shown in fig.1 Fig 1 ypes of PNP and NPN transistor he middle region is called the base and the outer two regions are called emitter and the collector. he outer layers although they are of same type but their functions cannot be changed. hey have different physical and electrical properties. In most transistors, emitter is heavily doped. Its job is to emit or inject electrons into the base. hese bases are lightly doped and very thin, it passes most of the emitter-injected electrons on to the collector. he doping level of collector is intermediate between the heavy doping of emitter and the light doping of the base. he collector is so named because it collects electrons from base. he collector is the largest of the three regions; it must dissipate more heat than the emitter or base. he transistor has two junctions. One between emitter and the base and other between the base and the collector. Because of this the transistor is similar to two diodes, one emitter diode and other collector base diode. When transistor is made, the diffusion of free electrons across the junction produces two depletion layers. For each of these depletion layers, the barrier potential is 0.7 V for Si transistor and 0.3 V for Ge transistor. he depletion layers do not have the same width, because different regions have different doping levels. he more heavily doped a region is, the greater the concentration of ions near the junction. his means the depletion layer penetrates more deeply into the base and slightly into emitter. Similarly, it penetration more into collector. he thickness of collector depletion layer is large while the base depletion layer is small as shown in fig 2

5 Module 1 : Biasing of BJ 5 Fig. 2 Depletion Layer If both the junctions are forward biased using two d.c sources, as shown in fig 3, free electrons (majority carriers) enter the emitter and collector of the transistor, joins at the base and come out of the base. Because both the diodes are forward biased, the emitter and collector currents are large. CE Fig 3 Forward biased junction If both the junction are reverse biased as shown in fig, the small currents flows through both junctions only due to thermally produced minority carriers and surface leakage. hermally produced carriers are temperature dependent it approximately doubles for every 10 degree Celsius rise in ambient temperature. he surface leakage current increases with voltage. When the emitter diode is forward biased and collector diode is reverse biased as shown in fig 4 then one expect large emitter current and small collector current but collector current is almost as large as emitter current. Fig 4 Forward and reverse biased emitter When emitter diodes forward biased and the applied voltage is more than 0.7 V (barrier potential) then larger number of majority carriers (electrons in n-type) diffuse across the junction.

6 Once the electrons are injected by the emitter enter into the base, they become minority carriers. hese electrons do not have separate identities from those, which are thermally generated, in the base region itself. he base is made very thin and is very lightly doped. Because of this only few electrons traveling from the emitter to base region recombine with holes. his gives rise to recombination current. he rest of the electrons exist for more time. Since the collector diode is reverse biased, (n is connected to positive supply) therefore most of the electrons are pushed into collector layer. hese collector elections can then flow into the external collector lead. hus, there is a steady stream of electrons leaving the negative source terminal and entering the emitter region. he VEB forward bias forces these emitter electrons to enter the base region. he thin and lightly doped base gives almost all those electrons enough lifetime to diffuse into the depletion layer. he depletion layer field pushes a steady stream of electron into the collector region. hese electrons leave the collector and flow into the positive terminal of the voltage source. In most transistor, more than 95% of the emitter injected electrons flow to the collector, less than 5% fall into base holes and flow out the external base lead. But the collector current is less than emitter current DC Operating Point Relation between different currents in a transistor: he total current flowing into the transistor must be equal to the total current flowing out of it. Hence, the emitter current IE is equal to the sum of the collector (IC ) and base current (IB). hat is, IE = IC + IB he currents directions are positive directions. he total collector current IC is made up of two components. 1. he fraction of emitter (electron) current which reaches the collector (adc IE ) 2. he normal reverse leakage current ICO adc is known as large signal current gain or dc alpha. It is always positive. Since collector current is almost equal to the IE therefore αdc IE varies from 0.9 to Usually, the reverse leakage current is very small compared to the total collector current.

7 Module 1 : Biasing of BJ NOE: he forward bias on the emitter diode controls the number of free electrons infected into the base. he larger (VBE) forward voltage, the greater the number of injected electrons. he reverse bias on the collector diode has little influence on the number of electrons that enter the collector. Increasing VCB does not change the number of free electrons arriving at the collector junction layer. he symbol of npn and pnp transistors are shown in fig no 5 Breakdown Voltages: CE Fig. 5 Symbols of npn and pnp transistor Since the two halves of a transistor are diodes, two much reverse voltage on either diode can cause breakdown. he breakdown voltage depends on the width of the depletion layer and the doping levels. Because of the heavy doping level, the emitter diode has a low breakdown voltage approximately 5 to 30 V. he collector diode is less heavily doped so its breakdown voltage is higher around 20 to 300 V BJ Characteristics and parameters he Common Base Configuration: If the base is common to the input and output circuits, it is known as common base configuration as shown in fig 6.

8 Fig. 6 Common base configuration For a pnp transistor the largest current components are due to holes. Holes flow from emitter to collector and few holes flow down towards ground out of the base terminal. he current directions are shown in fig 6. (IE = IC + IB) (4) For a forward biased junction, VEB is positive and for a reverse biased junction VCB is negative. he complete transistor can be described by the following two relations, which give the input voltage VEB and output current IC in terms of the output voltage (VCB) and input current IE. VEB = f1(vcb, IE) (5) IC= f2(vcb, IE) (6) he output characteristic: he collector current IC is completely determined by the input current IE and the VCB voltage. he relationship is given in fig 7 It is a plot of IC versus VCB, with emitter current IE as parameter. he curves are known as the output or collector or static characteristics. he transistor consists of two diodes placed in series back to back (with two cathodes connected together). he complete characteristic can be divided in three regions. Fig. 7 output characteristic (1) Active region: In this region the collector diode is reverse biased and the emitter diode is forward biased. Consider first that the emitter current is zero. hen the collector current is small and equals the reverse saturation current ICO of the collector junction considered as a diode.

9 Module 1 : Biasing of BJ 9 If the forward current IB is increased, then a fraction of IE ie. Adc IE will reach the collector. In the active region, the collector current is essentially independent of collector voltage and depends only upon the emitter current. Because adc is, less than one but almost equal to unity, the magnitude of the collector current is slightly less that of emitter current. he collector current is almost constant and work as a current source. he collector current slightly increases with voltage. his is due to early effect. At higher voltage collector gathers in a few more electrons. his reduces the base current. he difference is so small, that it is usually neglected. If the collector voltage is increased, then space charge width increases; this decreased the effective base width. hen there is less chance for recombination within the base region. (2) Saturation region: he region to the left of the ordinate VCB = 0, and above the IE = 0, characteristic in which both emitter and collector junction are forward biased, is called saturation region. When collector diode is forward biased, there is large change in collector current with small CE changes in collector voltage. A forward bias means, that p is made positive with respect to n, there is a flow of holes from p to n. his changes the collector current direction. If diode is sufficiently forward biased the current changes rapidly. It does not depend upon emitter current. he region below IE = 0 and to the right of VCB for which emitter and collector junctions are both reversed biased is referred to cutoff region. he characteristics IE = 0, is similar to other characteristics but not coincident with horizontal axis. he collector current is same as ICO. (3) Cut off region: ICBO is frequently used for ICO. It means collector to base current with emitter open. his is also temperature dependent. he Input Characteristic: In the active region the input diode is forward biased, therefore, input characteristic is simply the forward biased characteristic of the emitter to base diode for various collector voltage. Fig 8 Below cut in voltage (0.7 or 0.3) the emitter current is very small. he curve with the collector open represents the forward biased emitter diode. Because of the early effect the emitter current increases for same VEB. (he diode becomes better diode).

10 When the collector is shorted to the base, the emitter current increases for a given VEB since the collector now removes minority carriers from the base, and hence base can attract more holes from the emitter. his mean that the curve VCB= 0, is shifted from the character when VCB = open. Fig. 8 he Input Characteristic Equivalent circuit of a transistor: (Common Base) In an ideal transistor, adc= 1. his means all emitter electrons entering the base region go on to the collector. herefore, collector current equals emitter current. For transistor action, emitter diode acts like a forward bias diode and collector diode acts like a current source. he equivalent circuits of npn and pnp transistors are shown in fig 9, he current source arrow points for conventional current. he current source is controlled by emitter current. Fig. 9 he Input Characteristic Common Emitter configuration: he common emitter configuration of BJ is shown in fig 10 Fig. 10 Common Emitter configuration In common emitter configuration the emitter is made common to the input and output. It is also referred to as grounded emitter configuration. It is most commonly used configuration.

11 Module 1 : Biasing of BJ 11 In this, base current and output voltages are taken as impendent parameters and input voltage and output current as dependent parameters VBE = f1 ( IB, VCE ) (5) IC = f2( IB, VCE ) (6) Input Characteristic: he curve between IB and VBE for different values of VCE is shown. Since the base emitter junction of a transistor is a diode, therefore the characteristic is similar to diode one. With higher values of VCE collector gathers slightly more electrons and therefore base current reduces. Normally this effect is neglected. (Early effect). When collector is shorted with emitter then the input characteristic is the characteristic of a forward biased diode when VBE is zero and IB is also zero. CE Fig. 11 Input Characteristic Output Characteristic: he output characteristic is the curve between VCE and IC for various values of IB. For fixed value of IB and is shown in fig 12. For fixed value of IB, IC is not varying much dependent on VCE but slopes are greater than CE characteristic. he output characteristics can again be divided into three parts. (1) Active Region: Fig. 12 Output Characteristic

12 In this region collector junction is reverse biased and emitter junction is forward biased. It is the area to the right of VCE = 0.5 V and above IB= 0. In this region transistor current responds most sensitively to IB. If transistor is to be used as an amplifier, it must operate in this region. If adc is truly constant then IC would be independent of VCE. But because of early effect, adc increases by 0.1% (0.001) e.g. from to as VCE increases from a few volts to 10V. hen bdc increases from / ( ) = 200 to / ( ) = 250 or about 25%. his shows that small change in a reflects large change in b. herefore the curves are subjected to large variations for the same type of transistors. (2) Cut Off: Cut off in a transistor is given by IB = 0, IC= ICO. A transistor is not at cut off if the base current is simply reduced to zero (open circuited) under this condition, IC = IE= ICO / ( 1-αdc) = ICEO (7) he actual collector current with base open is designated as ICEO. Since even in the neighborhood of cut off, a dc may be as large as 0.9 for Ge, then IC=10 ICO(approximately), at zero base current. Accordingly in order to cut off transistor it is not enough to reduce IB to zero, but it is necessary to reverse bias the emitter junction slightly. It is found that reverse voltage of 0.1 V is sufficient for cut off a transistor. In Si, the a dc is very nearly equal to zero, therefore, IC = ICO. Hence even with IB= 0, IC= IE= ICO so that transistor is very close to cut off. In summary, cut off means IE = 0, IC = ICO, IB = -IC = -ICO, and VBE is a reverse voltage whose magnitude is of the order of 0.1 V for Ge and 0 V for Si. Reverse Collector Saturation Current ICBO: When in a physical transistor emitter current is reduced to zero, then the collector current is known as ICBO (approximately equal to ICO). Reverse collector saturation current ICBO also varies with temperature, avalanche multiplication and variability from sample to sample. Consider the circuit shown in fig 13. VBB is the reverse voltage applied to reduce the emitter current to zero.

13 Module 1 : Biasing of BJ 13 IE = 0, IB = -ICBO If we require, VBE = V hen - VBB + ICBO RB < V Fig. 13 If RB = 100 K, ICBO = 100 m A, hen VBB must be 10.1 Volts. Hence transistor must be capable to withstand this reverse voltage before breakdown voltage exceeds. CE VCE = VCB + VBE = - VBC + VBE is also few tenths of volts. Hence saturation region is very (3) Saturation Region: In this region both the diodes are forward biased by at least cut in voltage. Since the voltage VBE and VBC across a forward is approximately 0.7 V therefore, close to zero voltage axis, where all the current rapidly reduces to zero. In this region the transistor collector current is approximately given by VCC / R C and independent of base current. Normal transistor action is last and it acts like a small ohmic resistance. Comparison Biasing with and without resistance Fixed Bias or Base Bias:

14 In order for a transistor to amplify, it has to be properly biased. his means forward biasing the base emitter junction and reverse biasing collector base junction. For linear amplification, the transistor should operate in active region (If IE increases, IC increases, VCE decreases proportionally). he source VBB, through a current limit resistor RB forward biases the emitter diode and VCC through resistor RC (load resistance) reverse biases the collector junction as shown in fig 14 Fig. 14 Biasing with and without resistance he dc base current through RB is given by IB = (VBB - VBE) / RB or VBE = VBB - IB RB Normally VBE is taken 0.7V or 0.3V. If exact voltage is required, then the input characteristic ( IB vs VBE) of the transistor should be used to solve the above equation. he load line for the input circuit is drawn on input characteristic. he two points of the load line can be obtained as given below For IB = 0, VBE = VBB. and For VBE = 0, IB = VBB/ RB. he intersection of this line with input characteristic gives the operating point Q as shown in fig 15 If an ac signal is connected to the base of the transistor, then variation in VBE is about Q - point. his gives variation in IB and hence IC. Fig. 15 operating point Q In the output circuit, the load equation can be written as VCE = VCC- IC RC

15 Module 1 : Biasing of BJ 15 his equation involves two unknown VCE and IC and therefore cannot be solved. o solve this equation output characteristic ( IC vs VCE) is used. he load equation is the equation of a straight line and given by two points: IC= 0, VCE = VCC & VCE = 0, IC= VCC / RC he intersection of this line which is also called dc load line and the characteristic gives the operating point Q as shown in fig 16 CE Fig. 16 Operating point point. At this point base current is zero and collector current is almost negligibly small. At cut off the emitter diode comes out of forward bias and normal transistor action is lost. o a close approximation. VCE ( cut off)» VCC (approximately). he intersection of the load line and IB = IB(max) characteristic is known as saturation point. At this point IB= IB(max), IC= IC(sat). At this point collector diodes comes out of reverse bias and again transistor action is lost. o a close approximation, IC(sat)» VCC / RC(approximately ). he IB(sat) is the minimum current required to operate the transistor in saturation region. If the IB is less than IB (sat), the transistor will operate in active region. If IB > IB (sat) it always operates in saturation region. If the transistor operates at saturation or cut off points and nowhere else then it is operating as a switch is shown in fig 17 he point at which the load line intersects with IB = 0 characteristic is known as cut off

16 Fig. 17 ransistor as switch VBB = IB RB+ VBE IB = (VBB VBE ) / RB If IB> IB(sat), then it operates at saturation, If IB = 0, then it operates at cut off. If a transistor is operating as an amplifier then Q point must be selected carefully. Although we can select the operating point anywhere in the active region by choosing different values of RB & RC but the various transistor ratings such as maximum collector dissipation PC(max) maximum collector voltage VC(max) and IC(max) & VBE(max) limit the operating range. Once the Q point is established an ac input is connected. Due to this the ac source the base current varies. As a result of this collector current and collector voltage also varies and the amplified output is obtained. If the Q-point is not selected properly then the output waveform will not be exactly the input waveform. i.e. It may be clipped from one side or both sides or it may be distorted one. Example-1 Find the transistor current in the circuit shown in fig if ICO= 20nA, β =100. Solution: For the base circuit, 5 = 200 x IB herefore, Since ICO << IB, therefore, IC = β IB = 2.15 ma From the collector circuit, VCE = 10-3 x 2.15 = 3.55 V Since, VCE = VCB + VBE hus, VCB = = 2.55 V herefore, collector junction is reversing biased and transistor is operating in its active region. Example - 2 If a resistor of 2K is connected in series with emitter in the circuit as shown in fig 2 find the currents. Given ICO= 20 na, β =100. Solution: IE = IB + IC = IB IB = 101 IB For the base circuit, 5 = 200 x IB k x 101 IB herefore, Since ICO << IB, therefore, IC = βib = 1.07 ma From the collector circuit, VCB = 10-3 x x 101 x = 3.93 V herefore collector junction is reverse biased and transistor is operating in its active region. Emitter Feedback Bias:

17 Module 1 : Biasing of BJ 17 Fig 18, shows the emitter feedback bias circuit. In this circuit, the voltage across resistor RE is used to offset the changes in bdc. If bdc increases, the collector current increases. his increases the emitter voltage which decrease the voltage across base resistor and reduces base current. he reduced base current result in less collector current, which partially offsets the original increase in bdc. he feedback term is used because output current ( IC) produces a change in input current ( IB ). RE is common in input and output circuits. In this case Since IE = IC + IB Fig. 18 CE Emitter Feedback Bias Circuit (8) In this case, S is less compared to fixed bias circuit. hus the stability of the Q point is better. Further, herefore, (9) If IC is to be made insensitive to βdc than RE cannot be made large enough to swamp out the effects of βdc without saturating the transistor. Collector Feedback Bias: In this case, the base resistor is returned back to collector as shown in fig 19. If temperature increases. βdc increases. his produces more collectors current. As IC increases, collector emitter voltage decreases. It means less voltage across RB and causes a decrease in base current this decreasing IC, and compensating the effect of bdc.

18 Fig. 19 Base Emitter as collector In this circuit, the voltage equation is given by (10) Circuit is stiff sensitive to changes in βdc. he advantage is only two resistors are used. hen, herefore, It is better as compared to fixed bias circuit. Further, (11) Circuit is still sensitive to changes in βdc. he advantage is only two resistors are used. Voltage Divider Bias: If the load resistance RC is very small, e.g. in a transformer coupled circuit, then there is no improvement in stabilization in the collector to base bias circuit over fixed bias circuit. A circuit which can be used even if there is no dc resistance in series with the collector, is the voltage divider bias or self bias. Fig 20 he current in the resistance RE in the emitter lead causes a voltage drop which is in the direction to reverse bias the emitter junction. Since this junction must be forward biased, the base voltage is obtained from the supply through R1, R2 network. If Rb = R1 R2 equivalent resistance is very very small, then VBE voltage is independent of ICO and IC / ICO is 0. For best stability R1 & R2 must be kept small.

19 Module 1 : Biasing of BJ 19 Fig. CE 20 Voltage Divider Bias or Self Bias If IC tends to increase, because of ICO, then the current in RC increases, hence base current is decreased because of more reverse biasing and it reduces IC. o analysis this circuit, the base circuit is replaced by its the venin s equivalent as shown in fig 21 hevenin's voltage is Fig. 21 hevenin's voltage Rb is the effective resistance seen back from the base terminal (12)

20 If VBE is considered to be independent of IC, then he smaller the value of Rb, the better is the stabilization but S cannot be reduced be unity. Hence IC always increases more than ICO. If Rb is reduced, then current drawn from the supply increases. Also if RE is increased then to operate at same Q-point, the magnitude of VCC must be increased. In both the cases the power loss increased and reduced h. In order to avoid the loss of ac signal because of the feedback caused by RE, this resistance is often by passed by a large capacitance (> 10 m F) so that its reactance at the frequency under consideration is very small. Emitter Bias: Fig 22 shown the emitter bias circuit. he circuit gets this name because the negative supply VEE is used to forward bias the emitter junction through resistor RE. VCC still reverse biases collector junction. his also gives the same stability as voltage divider circuit but it is used only if split supply is available. Fig. 22 Emitter Bias In this circuit, the voltage equation is given by

21 Module 1 : Biasing of BJ 21 Stability of operating point Let us consider three operating points of transistor operating in common emitter amplifier. 1. Near cut off 2. Near saturation 3. In the middle of active region If the operating point is selected near the cutoff region, the output is clipped in negative half cycle as shown in fig 23 CE Fig. 23 cutoff region If the operating point is selected near saturation region, then the output is clipped in positive cycle as shown in fig 24 Fig. 24 Fig. 25 If the operating point is selected in the middle of active region, then there is no clipping and the output follows input faithfully as shown in fig 25 If input is large then clipping at both sides will take place. he first circuit for biasing the transistor is CE configuration is fixed bias. In biasing circuit shown in fig 26(a), two different power supplies are required. o avoid the use of two supplies the base resistance RB is connected to VCC as shown in fig 26(b).

22 Fig. 26(a) Fig. 26(b) Now VCC is still forward biasing emitter diode. In this circuit Q point is very unstable. he base resistance RB is selected by noting the required base current IB for operating point Q. IB = (VCC VBE ) / RB Voltage across base emitter junction is approximately 0.7 V. Since VCC is usually very high i.e. IB = VCC/ RB Since IB is constant therefore it is called fixed bias circuit Analysis Analysis of CE amplifier: In a transistor amplifier, the dc source sets up quiescent current and voltages. he ac source then produces fluctuations in these current and voltages. he simplest way to analyze this circuit is to split the analysis in two parts: dc analysis and ac analysis. One can use superposition theorem for analysis. AC & DC Equivalent Circuits: For dc equivalent circuit, reduce all ac voltage sources to zero and open all ac current sources and open all capacitors. With this reduced circuit shown in fig 30 dc current and voltages can be calculated.

23 Module 1 : Biasing of BJ 23 Fig. 30 For ac equivalent circuits reduce CE dc voltage sources to zero and open current sources and short all capacitors. his circuit is used to calculate ac currents and voltage as shown in fig 31. Fig. 31 he total current in any branch is the sum of dc and ac currents through that branch. he total voltage across any branch is the sum of the dc voltage and ac voltage across that branch. Phase Inversion: Because of the fluctuation is base current; collector current and collector voltage also swings above and below the quiescent voltage. he ac output voltage is inverted with respect to the ac input voltage, meaning it is 180o out of phase with input.

24 During the positive half cycle base current increase, causing the collector current to increase. his produces a large voltage drop across the collector resistor; therefore, the voltage output decreases and negative half cycle of output voltage is obtained. Conversely, on the negative half cycle of input voltage less collector current flows and the voltage drop across the collector resistor decreases, and hence collector voltage increases we get the positive half cycle of output voltage as shown in fig 32. Fig. 32 AC Load line: Consider the dc equivalent circuit shown below. Fig. 33

25 Module 1 : Biasing of BJ 25 Assuming IC = IC(approx), the output circuit voltage equation can be written as he slop of the d.c load line is. When considering the ac equivalent circuit, the output impedance becomes RC RL which is less than (RC +RE). CE In the absence of ac signal, this load line passes through Q point. herefore ac load line is a line of slope (-1 / ( RC RL) ) passing through Q point. herefore, the output voltage fluctuations will now be corresponding to ac load line as shown in fig 34. Under this condition, Q-point is not in the middle of load line, therefore Q-point is selected slightly upward, means slightly shifted to saturation side. Fig. 34 Voltage gain: o find the voltage gain, consider an unloaded CE amplifier. he ac equivalent circuit is shown in fig 35. he transistor can be replaced by its collector equivalent model i.e. a current source and emitter diode which offers ac resistance r'e.

26 Fig. 35 he input voltage appears directly across the emitter diode. herefore emitter current ie = Vin / r'e. Since, collector current approximately equals emitter current and IC = ie and vout = - ie RC (he minus sign is used here to indicate phase inversion) Further vout = - (Vin RC) / r'e herefore voltage gain A = vout / vin = -RC / r'e he ac source driving an amplifier has to supply alternating current to the amplifier. he input impedance of an amplifier determines how much current the amplifier takes from the ac source. In a normal frequency range of an amplifier, where all capacitors look like ac shorts and other reactance are negligible, the ac input impedance is defined as zin= vin/ iin Where vin, iin are peak to peak values or rms values he impedance looking directly into the base is symbolized zin (base) and is given by Z in(base) = vin / ib, Since,v in = ie r'e» bi b r'e zin (base) = b r'e. From the ac equivalent circuit, the input impedance zin is the parallel combination of R1, R2 and b r'e. Zin = R1 R2 b r'e he hevenin voltage appearing at the output is vout = A vin

27 Module 1 : Biasing of BJ 27 he hevenin impedance is the parallel combination of RC and the internal impedance of the current source. he collector current source is an ideal source, therefore it has an infinite internal impedance. zout = RC. he simplified ac equivalent circuit is shown in fig 36 Example-: Fig. 36 CE Select R1 and R2 for maximum output voltage swing in the circuit shown in fig.37. Solution: We first determine ICQ for the circuit For maximum swing, V'CC = 2 VCEQ he quiescent value for VCE is the given by

28 VCEQ= (3.13 ma) (500 W ) = 1.56 V he intersection of the ac load line on the VCE axis is V'CC = 3.13V. From the manufacturer's specification, β for the 2N3904 is 180. RB is set equal to 0.1 βre. So, RB = 0.1(180 )(100) = 1.8 K W VBB = (3.13 x 10-3) (1.1 x 100) = V Since we know VBB and RB, we find R1 and R2, he maximum output voltage swing, ignoring the non-linearity's at saturation and cutoff, would then be he load lines are shown on the characteristics of the figure below Fig.38 he maximum power dissipated by the transistor is calculated to assure that it does not exceed the specifications. he maximum average power dissipated in the transistor is P(transistor)= VCEQ ICQ = (1.56 (V)) (3.13 ma) =4.87 mw his is well within the 350 mw maximum given on the specification sheet. he maximum conversion efficiency is he swamped Amplifier: he ac resistance of the emitter diode r'e equals 25mV / IE and depends on the temperature. Any change in r'e will change the voltage gain in CE amplifier. In some applications, a change in voltage is acceptable. But in many applications we need a stable voltage gain is required.

29 Module 1 : Biasing of BJ 29 o make it stable, a resistance re is inserted in series with the emitter and therefore emitter is no longer ac grounded. is shown below. Fig.39 CE Because of this the ac emitter current flows through re and produces an ac voltage at the emitter. If re is much greater than r'e almost all of the ac input signal appears at the emitter, and the emitter is bootstrapped to the base for ac as well as for dc. In this case, the collector circuit is given by Now r'e has a less effect on voltage gain, swamping means re >> r'e If swamping is less, voltage gain varies with temperature. If swamping is heavy, then gain reduces very much. Analysis of CC amplifier: If a high impedance source is connected to low impedance amplifier then most of the signal is dropped across the internal impedance of the source. o avoid this problem common collector amplifier is used in between source and CE amplifier. It increases the input impedence of the CE amplifier without significant change in input voltage.

30 Fig 37, shows a common collector (CC) amplifier. Since there is no resistance in collector circuit, therefore collector is ac grounded. It is also called grounded collector amplifier. When input source drives the base, output appears across emitter resistor. A CC amplifier is like a heavily swamped CE amplifier with a collector resistor shorted and output taken across emitter resistor. vout = vin - vbe Fig. 40 herefore, this circuit is also called emitter follower, because VBE is very small. As vin increases, vout increases. If vin is 2V, vout = 1.3V If vin is 3V, vout = 2.3V. Since vout follows exactly the vin therefore, there is no phase inversion between input and output. he output circuit voltage equation is given by VCE = VCC IE RE Since IE» IC \ IC = (VCC VCE ) / RE his is the equation of dc load line. he dc load line is shown in fig 37. Voltage gain:

31 Module 1 : Biasing of BJ 31 Fig 38, shows an emitter follower driven by a small ac voltage. he input is applied at the base of transistor and output is taken across the emitter resistor.fig 39, shows the ac equivalent circuit of the amplifier. he emitter is replaced by ac resistance r'e. he ac output voltage is given by vout = RE ie Fig. 41 CE Fig. 42 and, vin = ie (RE + r'e ) herefore, A = RE / ( RE +r'e ) Since r'e << RE \ A» 1. herefore, it is a unity gain amplifier. he practical Fig. 43 emitter follower circuit is shown in Fig 40. he ac source (vs) with a series resistance RS drives the transistor base. Because of the biasing resistor and input impedance of the base, some of the ac signal is lost across the source resistor. he ac equivalent circuit is shown in Fig. 41.

32 Fig. 44 he input impedance at the base is given by he total input impedance of an emitter follower includes biasing resistors in parallel with input impedance of the base. zin = R1 R2 b (r'e + RE) Since b RE is very large as compared to R1 and R2. hus, zin R1 R2 herefore input impedance is very high. Applying hevenin's theorem to the base circuit of Fig.41, it becomes a source vin and a series resistance (R1 R2 RS ) as shown in Fig. 42.

33 Module 1 : Biasing of BJ 33 Fig. 45 CE Find the Q-point of the emitter follower circuit of fig. belowwith R1 = 10 KΩ and R2 = 20 Example 1: KΩ. Assume the transistor has a β of 100 and input capacitor C is very-very large. Fig. 46 Solution: We first find the hevenin's equivalent of the base bias circuitry. RB = R1 R2 = 6.67 K Ω From the bias equation we have

34 Example - 2 Find the output voltage swing of the circuit of fig. 46. Solution: he Q-Point location has already been calculated in Example-1. We found that the quiescent collector current is 4.95 ma. he Output voltage swing = 2. IC peak. (RE RLoad) = 2(4.95 x 10-3) (300) = 2.97V his is less than the maximum possible output swing. Continuing the analysis, VCEQ = VCC ICQ RE = 9.03 V V'CC = VCEQ + ICQ (RE RLoad ) = 10.5 V he load lines for this problem are shown in Fig. 47. Fig Design Common Emitter Amplifier Design Example -1 (Common Emitter Amplifier Design) Design a common-emitter amplifier with a transistor having a β =200 and VBE = 0.7 V. Obtain an overall gain of A V 100 and maximum output voltage swing. Use the CE configuration shown in fig1 with two power supplies. Rsource is the resistance associated with the source, vsource. Let Rsource= 100 Ohms. he output load is 2KΩ. Determine the

35 Module 1 : Biasing of BJ 35 resistor values of the bias circuitry, the maximum undistorted output voltage swing, and the stage voltage gain. Fig. 48 CE he maximum voltage across the amplifier is 10 V since the power supply can be visualized Solution: as a 10V power supply with a ground in the center. In this case, the ground has no significance to the operation of the amplifier since the input and output are isolated from the power supplies by capacitors. We will have to select the value for RC and we are really not given enough information to do so. Let choose RC = Rload. We don't have enough information to solve for RB we can't use the bias stability criterion since we don't have the value of RE either. We will have to (arbitrarily) select a value of RB or RE. If this leads to a contradiction, or bad component values (e.g., unobtainable resistor values), we can come back and modify our choice. Let us select a value for RE that is large enough to obtain a reasonable value of VBB, Selecting RE as 400Ω will not appreciably reduce the collector current yet it will help in maintaining a reasonable value of VBB. hus, RB = 0.1 β RE = 0.1 (200)(400) = 8 K Ω o insure that we have the maximum voltage swing at the output, we will use Note that we are carrying out our calculations to four places so that we can get accuracy to three places. he bias resistors are determined by

36 Since we designed the bias circuit to place the quiescent point in the middle of the ac load line, we can use Vout(undistorted p-p) 1.8 (2.94 x 10-3 ) (2 K Ω 2 K Ω ) =5.29 V Now we can determine the gain of the amplifier itself. Using voltage division, we can determine the gain of the overall circuit. he value of Rin can be obtained as hus the overall gain of the amplifier is his shows that the common-emitter amplifier provides high voltage gain. However, it is very noisy, it has a low input impedance, and it does not have the stability of the emitter resistor common emitter amplifier. Emitter-Resistor Amplifier Design Example-2 (Emitter-Resistor Amplifier Design) Design an emitter-resistor amplifier as shown in fig 2 to drive a 2 KΩ load using a pnp silicon transistor, VCC = -24V, β = 200, Av = -10, and VBE = -0.7 V. Determine all element values and calculate Ai, Rin, ICQ and the maximum undistorted symmetrical output voltage swing for three values of RC as given below: RC = Rload RC = 0.1 Rload RC = 10 Rload

37 Module 1 : Biasing of BJ 37 Solution: Fig. 49 CE We use the various equations derived in previous lecture in order to derive the parameters (a) RC = Rload of the circuit. From the voltage gain, we can solve for R'E. So R'E = re + RE = 100 Ω (13) We can find the quiescent value of the collector current IC form the collector-emitter loop using the equation for the condition of maximum output swing. herefore, his is small enough that we shall ignore it to find that RE = 100 Ω. Since we now know β and RE. We can use the design guideline. RB = 0.1 β RE = 2 k Ω As designed earlier, the biasing circuitry can be designed in the same manner and given by VBB = V R1 = 2.14 K Ω R2 = 3.6 K Ω he maximum undistorted symmetrical peak to peak output swing is then

38 Vout (P-P) = 1.8 ICQ (Rload RC ) = 13.5 V hus current gain Ai = -9.1 and input impedance Rin = 1.82 K Ω (b) RC = 0.1 Rload we repeat the steps of parts (a) to find RC =200 Ω ICQ =-57.4 ma r'e = 0.45 Ω Ri = 390 Ω R2 =4.7K Ω vout(p-p) = 18.7 V RB = 360 Ω Ai = VBB = V Rin = 327 Ω (C) RC =10 Rload Once again, we follow the steps of part (a) to find RC =20 K Ω ICQ =-1.07 ma r'e = 24.2 Ω R1 =3.28K Ω R2 = 85.6K Ω vout(p-p) = 3.9 V RB = 3.64K Ω Ai =-14.5 VBB = V Rin = 2.91K W We now compare the results obtained able-i for the purpose of making the best choice for RC. ICQ Ai Rin vout(p-p) RC = Rload -7.5 ma K W 13.5 V RC = 0.1 Rload ma W 20.8 V RC = 10 Rload -1.07mA W 3.9 V able - 1 Comparsion for the three selections of RC It indicates that of the three given ratios of RC to Rload, RC = Rload has the most desirable performance in the CE amplifier stage. It can be used as a guide to develop a reasonable designs. In most cases, this choice will provide performance that meets specifications. In some applications, it may be necessary to do additional analysis to find the optimum ratio of RC to Rlo

39 Module 1 : Biasing of BJ 39 Capacitor-Coupled Emitter-Resistor Amplifier Design Example- 3 (Capacitor-Coupled Emitter-Resistor Amplifier Design) Design an emitter-resistor amplifier as shown in fig 3 with AV =-10, β =200 and R load = 1K Ω. A pnp transistor is used and maximum symmetrical output swing is required. Solution: CE Fig. 50 As designed earlier, we shall chose RC = Rload = 10 kω. he voltage gain is given by Substituting AV, Rload and RC in this equation, we find R'E= 50 Ω. where R'E= RE + r'e. We need to know the value of r'e to fine RE. We first find Rac and Rdc, and then calculate the Q point as follows (we assume r'e is small, so RE = R'E) Rac = RE + RC Rload = 550 Ω Rdc = RE + RC = 1050 Ω Now, the first step is to calculate the quiescent collector current needed to place the Q-point into the center of the ac load line (i.e., maximum swing). he equation is he quantity, r'e, is found as follows hen RE = 50 - re = Ω

40 If there were a current gain or input resistance specification for this design, we would use it to solve for the value of RB. Since is no such specification, we use the expression RB =0.1 β RE = 0.1 (200) (46.6) = 932 Ω hen continuing with the design steps, and he last equality assumes that ro is large compared to RC. he maximum undistorted peak to peak output swing is given by 1.8 ICQ ( RC Rload )=1.8 ( ) ( 500 ) = 6.75 V he power delivered into the load and the maximum power dissipated by the transistor are found as he load lines for this circuit are shown in (14) Fig Differential Amplifier

41 Module 1 : Biasing of BJ : First (vacuum tube) op-amp An op-amp, defined as a general-purpose, DC-coupled, high gain, inverting feedback amplifier, is first found in U.S. Patent 2,401,779 "Summing Amplifier" filed by Karl D. Swartzel Jr. of Bell labs in his design used three vacuum tubes to achieve a gain of 90 db and operated on voltage rails of ±350 V. It had a single inverting input rather than differential inverting and non-inverting inputs, as are common in today's op-amps. hroughout World War II, Swartzel's design proved its value by being liberally used in the M9 artillery director designed at Bell Labs. his artillery director worked with the SCR584 radar system to achieve extraordinary hit rates (near 90%) that would not have been possible otherwise. CE Fig. 52 GAP/R's K2-W: a vacuum-tube op-amp (1953) 1947 : First op-amp with an explicit non-inverting input In 1947, the operational amplifier was first formally defined and named in a paper by Professor John R. Ragazzini of Columbia University. In this same paper a footnote mentioned an op-amp design by a student that would turn out to be quite significant. his op-amp, designed by Loebe Julie, was superior in a variety of ways. It had two major innovations. Its input stage used a long-tailed triode pair with loads matched to reduce drift in the output and, far more importantly, it was the first op-amp design to have two inputs (one inverting, the other non-inverting). he differential input made a whole range of new functionality possible, but it would not be used for a long time due to the rise of the chopper-stabilized amplifier : First chopper-stabilized op-amp

42 In 1949, Edwin A. Goldberg designed a chopper-stabilized op-amp. his set-up uses a normal op-amp with an additional AC amplifier that goes alongside the op-amp. he chopper gets an AC signal from DC by switching between the DC voltage and ground at a fast rate (60 Hz or 400 Hz). his signal is then amplified, rectified, filtered and fed into the op-amp's non-inverting input. his vastly improved the gain of the op-amp while significantly reducing the output drift and DC offset. Unfortunately, any design that used a chopper couldn't use their non-inverting input for any other purpose. Nevertheless, the much improved characteristics of the chopper-stabilized op-amp made it the dominant way to use op-amps. echniques that used the non-inverting input regularly would not be very popular until the 1960s when op-amp ICs started to show up in the field. In 1953, vacuum tube op-amps became commercially available with the release of the model K2-W from George A. Philbrick Researches, Incorporated. he designation on the devices shown, GAP/R, is a contraction for the complete company name. wo nine-pin 12AX7 vacuum tubes were mounted in an octal package and had a model K2-P chopper add-on available that would effectively "use up" the non-inverting input. his op-amp was based on a descendant of Loebe Julie's 1947 design and, along with its successors, would start the widespread use of op-amps in industry : First discrete IC op-amps Fig. 53 GAP/R's model P45: a solid-state, discrete op-amp (1961). With the birth of the transistor in 1947, and the silicon transistor in 1954, the concept of ICs became a reality. he introduction of the planar process in 1959 made transistors and ICs stable enough to be commercially useful. By 1961, solid-state, discrete op-amps were being produced. hese op-amps were effectively small circuit boards with packages such as edgeconnectors. hey usually had hand-selected resistors in order to improve things such as

43 Module 1 : Biasing of BJ 43 voltage offset and drift. he P45 (1961) had a gain of 94 db and ran on ±15 V rails. It was intended to deal with signals in the range of ±10 V : First op-amps in potted modules Fig. 54 GAP/R's model PP65: a solid-state op-amp in a potted module (1962) By 1962, several companies were producing modular potted packages that could be plugged into printed circuit boards. hese packages were crucially important as they made CE the operational amplifier into a single black box which could be easily treated as a component in a larger circuit : First monolithic IC op-amp In 1963, the first monolithic IC op-amp, the μa702 designed by Bob Widlar at Fairchild Semiconductor, was released. Monolithic ICs consist of a single chip as opposed to a chip and discrete parts (a discrete IC) or multiple chips bonded and connected on a circuit board (a hybrid IC). Almost all modern op-amps are monolithic ICs; however, this first IC did not meet with much success. Issues such as an uneven supply voltage, low gain and a small dynamic range held off the dominance of monolithic op-amps until 1965 when the μa709 was released : First varactor bridge op-amps Since the 741, there have been many different directions taken in op-amp design. Varactor bridge op-amps started to be produced in the late 1960s. hey were designed to have extremely small input current and are still amongst the best op-amps available in terms of common-mode rejection with the ability to correctly deal with hundreds of volts at their inputs : Release of the μa741 he popularity of monolithic op-amps was further improved upon the release of the LM101 in 1967, which solved a variety of issues, and the subsequent release of the μa741 in he μa741 was extremely similar to the LM101 except that Fairchild's facilities allowed

44 them to include a 30 pf compensation capacitor inside the chip instead of requiring external compensation. his simple difference has made the 741 the canonical op-amp and many modern amps base their pin out on the 741s.he μa741 is still in production, and has become ubiquitous in electronics many manufacturers produce a version of this classic chip, recognizable by part numbers containing 741. Fig. 55 A Signetics μa741 operational amplifier 1970 : First high-speed, low-input current FE design In the 1970s high speed, low-input current designs started to be made by using FEs. hese would be largely replaced by op-amps made with MOSFEs in the 1980s. During the 1970s single sided supply op-amps also became available : Single sided supply op-amps being produced A single sided supply op-amp is one where the input and output voltages can be as low as the negative power supply voltage instead of needing to be at least two volts above it. he result is that it can operate in many applications with the negative supply pin on the opamp being connected to the signal ground, thus eliminating the need for a separate negative power supply. he LM324 (released in 1972) was one such op-amp that came in a quad package (four separate op-amps in one package) and became an industry standard. In addition to packaging multiple op-amps in a single package, the 1970s also saw the birth of op-amps in hybrid packages. hese op-amps were generally improved versions of existing monolithic op-amps. As the properties of monolithic op-amps improved, the more complex hybrid ICs were quickly relegated to systems that are required to have extremely long service lives or other specialty systems. Fig. 56 ADI's HOS-050: a high speed hybrid IC op-amp (1979)

45 Module 1 : Biasing of BJ 45 Recent trends Recently supply voltages in analog circuits have decreased (as they have in digital logic) and low-voltage opamps have been introduced reflecting this. Supplies of ±5V and increasingly 5V are common. o maximize the signal range modern op-amps commonly have rail-to-rail outputs and sometimes rail-to-rail inputs (the input signals can range from the lowest supply voltage to the highest). Differential Input Resistance: Fig. 57 An op-amp in a modern DIP CE Differential input resistance is defined as the equivalent resistance that would be measured at either input terminal with the other terminal grounded. his means that the input resistance Ri1 seen from the input signal source v1 is determined with the signal source v2 set at zero. Similarly, the input signal v1 is set at zero to determine the input resistance Ri2 seen from the input signal source v2. Resistance RS1 and RS2 are ignored because they are very small. Substituting ie1, Similarly,

46 he factor of 2 arises because the re' of each transistor is in series. o get very high input impedance with differential amplifier is to use Darlington transistors. Another ways is to use FE. Output Resistance: Output resistance is defined as the equivalent resistance that would be measured at output terminal with respect to ground. herefore, the output resistance RO1 measured between collector C1 and ground is equal to that of the collector resistance RC. Similarly the output resistance RO2 measured at C2 with respect to ground is equal to that of the collector resistor RC. RO1 = RO2 = RC (E-5) he current gain of the differential amplifier is undefined. Like CE amplifier the differential amplifier is a small signal amplifier. It is generally used as a voltage amplifier and not as current or power amplifier. Example - 1 he following specifications are given for the dual input, balanced-output differential amplifier: RC = 2.2 kω, RB = 4.7 kω, Rin 1 = Rin 2 = 50Ω, +VCC= 10V, -VEE = -10 V, βdc =100 and VBE = 0.715V. Determine the voltage gain. Determine the input resistance Determine the output resistance. Solution: (a). he parameters of the amplifiers are same as discussed in example-1 of lecture-1. he operating point of the two transistors obtained in lecture-1 are given below ICQ = ma VCEQ=8.54V he ac emitter resistance

47 Module 1 : Biasing of BJ 47 herefore, substituting the known values in voltage gain equation (E-2), we obtain b). he input resistance seen from each input source is given by (E-3) and (E-4): (c) he output resistance seen looking back into the circuit from each of the two output terminals is given by (E-5) Ro1 = Ro2 = 2.2 k Ω Example - 2 For the dual input, balanced output differential amplifier of Example-1: CE (a) In Example-1 we have determined the voltage gain of the dual input, balanced output Determine the output voltage (vo) if vin 1 = 50mV peak to peak (pp) at 1 khz and vin 2 = 20 mv pp at 1 khz. What is the maximum peal to peak output voltage without clipping? Solution: differential amplifier. Substituting this voltage gain (Ad = 86.96) and given values of input voltages in (E-1), we get (b) Note that in case of dual input, balanced output difference amplifier, the output voltage vo is measured across the collector. herefore, to calculate the maximum peak to peak output voltage, we need to determine the voltage drop across each collector resistor: Substituting IC = ICQ = ma, we get his means that the maximum change in voltage across each collector resistor is ± 2.17 (ideally) or 4.34 VPP. In other words, the maximum peak to peak output voltage with out clipping is (2) (4.34) = 8.68 VPP. A dual input, balanced output difference amplifier circuit is shown in fig. 1.

48 Fig. 58 Inverting & Non inverting Inputs: In differential amplifier the output voltage vo is given by VO = Ad (v1 v2) When v2 = 0, vo = Ad v1 & when v1 = 0, vo = - Ad v2 herefore the input voltage v1 is called the non inventing input because a positive voltage v1 acting alone produces a positive output voltage vo. Similarly, the positive voltage v2 acting alone produces a negative output voltage hence v2 is called inverting input. Consequently B1 is called noninverting input terminal and B2 is called inverting input terminal. Common mode Gain: A common mode signal is one that drives both inputs of a differential amplifier equally. he common mode signal is interference, static and other kinds of undesirable pickup etc. he connecting wires on the input bases act like small antennas. If a differential amplifier is operating in an environment with lot of electromagnetic interference, each base picks up an unwanted interference voltage. If both the transistors were matched in all respects then the balanced output would be theoretically zero. his is the important characteristic of a differential amplifier. It discriminates against common mode input signals. In other words, it refuses to amplify the common mode signals. he practical effectiveness of rejecting the common signal depends on the degree of matching between the two CE stages forming the differential amplifier. In other words, more closely are the currents in the input transistors, the better is the common mode signal rejection e.g. If v1 and v2 are the two input signals, then the output of a practical op-amp

49 Module 1 : Biasing of BJ 49 cannot be described by simply v0 = Ad (v1 v2 ) In practical differential amplifier, the output depends not only on difference signal but also upon the common mode signal (average). vd = (v1 vd ) and vc = ½ (v1 + v2 ) he output voltage, therefore can be expressed as vo = A1 v1 + A2 v2 Where A1 & A2 are the voltage amplification from input 1(2) to output under the condition that input 2 (1) is grounded. CE he voltage gain for the difference signal is Ad and for the common mode signal is AC. he ability of a differential amplifier to reject a common mode signal is expressed by its common mode rejection ratio (CMRR). It is the ratio of differential gain Ad to the common mode gain AC. Date sheet always specify CMRR in decibels CMRR = 20 log CMRR. herefore, the differential amplifier should be designed so that It is equal to first term. Hence for an amplifier with V difference of potential between two inputs gives the same output as 1mV signal applied with the same polarity to both inputs.

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