CHAPTER 3 DIODES. NTUEE Electronics L. H. Lu 3 1

Transcription

1 CHAPER 3 OE Chapter Outline 3.1 he eal ioe 3.2 erminal Characteristics of Junction ioes 3.3 Moeling the ioe Forwar Characteristics 3.4 Operation in the Reerse Breakown Region Zener ioes 3.5 Rectifier Circuits 3.6 Limiting an Clamping Circuits NUEE Electronics L. H. Lu 3 1

2 3.1 eal ioe eal ioe characteristics An ioe is a two terminal eice: Anoe: the positie terminal Cathoe: the negatie terminal Forwar biase turne on short Reerse biase turne off open Circuit applications Y = A B C Y = A B C NUEE Electronics L. H. Lu 3 2

3 3.2 erminal Characteristics of Junction ioes V characteristics of junction ioes ioe current: i / ( e 1) (saturation current): proportional to ioe area n (ieality factor): between 1 an 2 V (thermal oltage) 25 mv at room temperature he forwar bias region, etermine by 0 he reerse bias region, etermine by 0 he breakown region, etermine by V ZK Forwar bias region he simplifie forwar bias V relationship: For a gien forwar oltage: i e / For a gien forwar current: ln( / ue to the exponential V relationship i 0 for < 0.5V (cut in oltage) Fully conuction for 0.6V < < 0.8V V on = 0.7V emperature epenence oubles for eery 5C rise in temperature Voltage ecreases 2mV/C for a gien current Current increases with temperature for a gien oltage ) NUEE Electronics L. H. Lu 3 3

4 Reerse bias region Reerse current: i eally, the reerse current is inepenent of reerse bias n reality, reerse current is larger than an also increases somewhat with the reerse bias emperature epenence: reerse current oubles for eery 10C rise in temperature Breakown region he knee of the V cure is specifie as breakown oltage V ZK for Zener breakown mechanism n breakown region, the reerse current increases rapily with a small increase in the reerse bias Normally, the reerse current is specifie by external circuitry to assure the power issipation within a safe range (non estructie operation) NUEE Electronics L. H. Lu 3 4

5 Circuit analysis 3.3 Moeling the ioe Forwar Characteristics etermine the ioe current an oltage V for circuit analysis he equation require for the analysis: = exp(v / ) oie V characteristics = (V V )/R Kirchhoff loop equation Nee to sole non linear equations Graphical analysis Plot the two equations in the same V coorination he straight line is known as loa line he intersect is the solution for an V teratie analysis et initial alue V = V 0 Use = (V V )/R to obtain 1 Use V = ln ( / ) to obtain V 2 Repeat until it conerges ( 3, V 4, 5, V 6 ) terations are neee to sole the nonlinear circuit NUEE Electronics L. H. Lu 3 5

6 he nee for rapi analysis Rapi analysis using simplifie moels for initial esign Accurate analysis (iteratie analysis or computer program) for final esign Rapi analysis (): ieal ioe moel he most simplifie moel use when supply oltage is much higher than the ioe oltage ioe on: = 0 V an i > 0 ioe off: i = 0 an < 0 V Equialent circuit moel as an ieal ioe Rapi analysis (): constant oltage rop moel he most wiely use moel in initial esign an analysis phases ioe on: = 0.7 V an i > 0 ioe off: i = 0 an < 0.7 V Equialent circuit moel as an ieal ioe with a 0.7 V oltage source NUEE Electronics L. H. Lu 3 6

7 mall signal approximation he ioe is operate at a c bias point an a small ac signal is superimpose on the c quantities: Uner small signal conition: / <<1 associates with V c operating point Q i associates with small signal response he ioe exhibits linear V characteristics uner small signal conitions ( 10mV) ioe small signal resistance an conuctance at operating point Q: he ioe small signal moel Choose proper c analysis technique or moel to obtain the operation point Q he small signal moel is etermine once Q is proie he small signal moel is use for circuit analysis when the ioe is operating aroun Q NUEE Electronics L. H. Lu 3 7 r g i / i i g ] [ i i r ] 1/[ V V e e e e e t i t V t / / / )/ ( / ) ( ) ( ) ( i t i ) (1 ) (

8 Circuit analysis techniques for total quantities (AC+C) Eliminate all the time arying signals (ac oltage an current sources) for operation point analysis Use rapi analysis or accurate analysis to obtain c oltage an current at operating point Q etermine the parameters of small signal moels from Q Replace the eices with small signal moels an eliminate all the c sources Circuit analysis uner small signal approximation he complete response of the circuit is obtaine by superposition of the c an ac components Voltage regulator by ioe forwar rop A regulator is to proie a constant c oltage regarless changes in loa an power supply oltage he forwar oltage rop remains almost constant at 0.7 V within a wie current range Multiple ioes in series to achiee the require oltage rop Better regulation can be proie for higher bias current an smaller r Example 3.5 (extbook) Example 3.6 (extbook) Exercise 3.14 (extbook) NUEE Electronics L. H. Lu 3 8

9 3.4 Operation in the Reerse Breakown Region Zener ioes ymbol an circuit moel for the Zener ioe n breakown region, a reerse bias (V Z ) beyon the knee oltage (V ZK ) leas to a large reerse current ( Z ). he ioe in breakown region is gien by V Z = V Z0 +r z z he breakown ioe is moele by a oltage source V Z0 in series with an incremental resistance r z ncremental oltage ersus current: V = r z he simplifie moel is only ali for Z > ZK (knee current) Equialent r z increases as Z ecreases ioe types: ioe: only forwar an reerse regions are consiere Zener ioe: forwar, reerse an breakown regions NUEE Electronics L. H. Lu 3 9

10 esign of the Zener shunt regulator Output oltage of the regulator: V O R R r z V Z 0 rz R r Z V RrZ R r Z L Line regulation: Loa regulation: V V O V O L rz R r Z RrZ R r Z Line an loa regulation shoul be minimize For r z << R, line regulation can be minimize by choosing small r z Loa regulation can be minimize by choosing small r z an large R here is an upper limit on the alue of R to ensure sufficiently high current Z (r z increases if Z is too low) R shoul be selecte from Example 3.7 (extbook) Exercise 3.16 (extbook) Exercise 3.17(extbook) Exercise 3.18 (extbook) V R min VZ 0 rz Z min Lmax Z min NUEE Electronics L. H. Lu 3 10

11 3.5 Rectifier Circuits Block iagram of a c power supply C power supply Generate a c oltage from ac power sources he ac input is a low frequency large signal oltage Power transformer tep the line oltage own to require alue an proies electric isolation ioe rectifier Conerts the input sinusoial to a unipolar output Can be iie to half wae an full wae rectifiers Filter Reuces the magnitue ariation for the rectifier output Equialent to time aerage operation of the input waeform Voltage Regulator Further stabilizes the output to obtain a constant c oltage Can be implemente by Zener ioe circuits NUEE Electronics L. H. Lu 3 11

12 he half wae rectifier Voltage transfer cure: V V 0 O 0 0 O V 0 Rectifier ioe specifications: Current hanling capability: the largest current the ioe is expecte to conuct Peak inerse oltage (PV): the largest reerse oltage the ioe can stan without breakown PV = V s (input oltage swing) an the ioe breakown oltage is selecte at least 50% higher NUEE Electronics L. H. Lu 3 12

13 目前無法顯示此圖像 he full wae rectifier (center tappe transformer) Voltage transfer cure: V 0 0 O V V 0 O 0 ransformer seconary wining is center tappe Peak inerse oltage (PV) = 2V s V 0 Rectifie output waeform for both positie an negatie cycles NUEE Electronics L. H. Lu 3 13

14 Full wae rectifier (Brige rectifier) Voltage transfer cure: 2V 0 0 2V 0 O 2V 0 O 2V 0 O 2V 0 oes not require a center tappe transformer Higher turn on oltage (2V 0 ) Peak inerse oltage (PV) = V s V 0 Most popular rectifier circuit configuration Exercise 3.19 (extbook) Exercise 3.20(extbook) Exercise 3.21 (extbook) NUEE Electronics L. H. Lu 3 14

15 Rectifier with a filter capacitor the peak rectifier Output unloae case: Output loae case: NUEE Electronics L. H. Lu 3 15

16 Precision half wae rectifier the superioe uperioe is compose of a op amp an a ioe uperioe works as an ieal ioe with zero turn on oltage Positie input oltage: ioe turns on Close loop op amp with irtual short at input Output oltage follows input oltage Negatie input oltage: ioe turns off Op amp in open loop Output oltage is 0 V Rectifier with superioe can emonstrates better efficiency NUEE Electronics L. H. Lu 3 16

17 3.6 Limiting an Clamping Circuits Limiter circuits For input in a certain range, the limiter acts as a linear circuit. For input excees the threshol, the output oltage swing is limite. Classification: Base on transfer characteristics: har limiter an soft limiter Base on the polarity: single limiter an ouble limiter A ariety of limiting circuits by ioes: NUEE Electronics L. H. Lu 3 17

18 Clampe capacitor or C restorer Output unloae case: Output loae case: NUEE Electronics L. H. Lu 3 18