Table of Contents. iii

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1 Table of Contents Subject Page Experiment 1: Diode Characteristics... 1 Experiment 2: Rectifier Circuits... 7 Experiment 3: Clipping and Clamping Circuits 17 Experiment 4: The Zener Diode 25 Experiment 5: Light Emitting Diodes Experiment 6: Characteristics of Bipolar Junction Transistors. 41 Experiment 7: Transistor DC Biasing Circuits. 53 Experiment 8: Logic Gate Circuits Experiment 9: The Common Emitter Amplifier Experiment 10: The Common Base Amplifier. 83 Experiment 11: The Emitter Follower.. 89 Experiment 12: Amplifier Frequency Response.. 95 Experiment 13: JFET Characteristics Experiment 14: The Common Source Amplifier Appendix-A: Resistor Color Code Chart Appendix-B: Data Sheets for Active Components iii

2 Experiment 1 Diode Characteristics Experiment 1 Diode Characteristics Objectives The purpose of this experiment is to measure and plot the forward and reverse IV characteristics of a silicon diode, and to measure the DC and AC (dynamic) resistances of the diode. Required Parts and Equipments 1- DC Power Supply 2- Digital Multimeters 3- Electronic Test Board 4- Small Signal Silicon Diode 1N Resistors, 470 Ω, 1 MΩ 6- Leads and wires 1. Theory When a P-type and N-type semiconductor materials are effectively made on the same crystal base, a diode is formed. The P-type side of the diode is called the anode, and the N-type side is called the cathode. When the diode s anode is at a higher potential than the cathode, the diode is forward-biased, and current will flow through the diode from anode to cathode. On the other hand, if the anode is at a lower potential than the cathode, the diode is said to be reverse-biased, and only a very small reverse current flows from cathode to anode until breakdown occurs at a very high reverse voltage V BR, and a successive current may flow in the reverse direction. The breakdown voltage V BR is above 50V for typical diodes. Unlike a resistor, in which the current is directly (linearly) proportional to the voltage across it, the diode is a nonlinear device. When the diode is forward-biased, a small voltage drop occurs across it. This voltage drop is called the barrier potential with an approximate value of 0.3V for germanium diodes, and 0.7V for silicon diodes. Fig.1 presents the IV characteristics curve for a typical semiconductor diode. This characteristic curve can be approximately estimated in the forward-bias region from the equation: V / = ( D VT I I e 1) (1) D S Where: I D : is the diode current V D : is the diode voltage I S : is the diode reverse saturation current V T : is the thermal voltage, which is approximately 26 mv at room temperature - 1 -

3 Experiment 1 Diode Characteristics Figure 1: Diode IV Characteristics The diode forward static (or DC) resistance at a particular DC operating point (Q) is given by: VDQ R DC = RD = (2) I DQ Where V DQ is the diode bias voltage, and I DQ is the diode operating current. The diode dynamic (or AC) resistance can be found from the characteristic curve at the Q- Point as: r ac V D = rd = (3) I D Where V D is a small increment in diode voltage around V DQ, and I D is a small increment in diode current around I DQ as depicted in Fig.2.. The dynamic resistance depends on the operating point, and can be calculated approximately from the equation: V T r d = (4) I DQ Where V T is the thermal voltage, and I DQ is the diode operating current. Fig.2 shows the determination of the dynamic resistance graphically

4 Experiment 1 Diode Characteristics 2. Procedure Figure 2: Graphical Determination of the Diode Dynamic Resistance 1- Connect the diode circuit shown in Fig.3. Figure 3: Diode Forward-Biased Circuit 2- Set the DC supply voltage V in at 0V, and increase it gradually. Record diode voltage V D and current I D in each step according to Table 1 below. Table 1: Recorded Data for the Forward-Biased Diode Circuit I D (ma) V D (V) - 3 -

5 Experiment 1 Diode Characteristics 3- Connect the reverse-biased diode circuit shown in Fig.4. Set the DC power supply voltage V in at 0V, and increase it gradually in several steps and record diode reverse voltage V R and reverse current I R as indicated in Table 2. Figure 4: Diode Reverse-Biased Circuit Table 2: Recorded Data for the Reverse-Biased Circuit V R (V) I R (µa) 3. Calculations and Discussion 1- Plot the diode forward characteristics from the results obtained, and determine the cutin voltage V γ from the sketch. 2- From the sketched characteristic curve determine the static resistance of the diode R DC at I DQ = 10mA. Determine also the diode dynamic resistance at I DQ = 10mA, and compare it with the theoretical value obtained from equation Plot the diode reverse characteristic, and estimate an approximate value for the reverse saturation current I S. 4- From the results obtained in this experiment, compute the maximum power dissipated in the diode. 5- Explain how you could use an ohmmeter to identify the cathode of an unmarked diode. 6- Explain why a series resistor is necessary when a diode is forward-biased

6 Experiment 1 Diode Characteristics 7- In a certain silicon diode, it was found that the diode current is 15mA when the diode voltage is 0.64V at room temperature. Determine the diode current when the voltage across it becomes 0.68V. Use the approximate diode characteristic equation. 8- From the approximate diode characteristic equation, derive an expression for the dynamic resistance r d

7 Experiment 1 Diode Characteristics This page is left intentionally blank - 6 -

8 Experiment 2 Rectifier Circuits Experiment 2 Rectifier Circuits Objectives The purpose of this experiment is to demonstrate the operation of three different diode rectifier circuits which are the half-wave rectifier, center-tapped full-wave rectifier, and the bridge full-wave rectifier. In addition to that, the operation of a capacitor filter connected to the output of the rectifier will also be demonstrated. Required Parts and Equipments 1- Digital Multimeters 2- Electronic Test Board 3- Step-down center-tapped transformer (220V/12Vr.m.s) 4- Dual-Channel Oscilloscope 5- General Purpose Silicon Diodes 1N Resistor 100kΩ 7- Capacitors 2.2µF, 10µF 8- Leads and BNC Adaptors 1. Theory The rectifier is circuit that converts the AC input voltage into a pulsed waveform having an average (or DC) value. This waveform can then be filtered to remove the unwanted variations. Rectifiers are widely used in power supplies which provide the DC voltage necessary for electronic circuits. The three basic rectifier circuits are the half-wave, the center-tapped fullwave, and the full-wave bridge rectifier circuits. The most important parameters for choosing diodes for these circuits are the maximum forward current, and the peak inverse voltage rating (PIV) of the diode. The peak inverse voltage is the maximum voltage the diode can withstand when it is reverse-biased. The amount of reverse voltage that appears across a diode depends on the type of circuit in which it is connected. Some characteristics of the three rectifier circuits will be investigated in this experiment. 1.1 Half-Wave Rectifier Figure 1 shows a schematic diagram of a transformer coupled half-wave rectifier circuit. The transformer is useful in electrically isolating the diode rectifier circuit from the 220V AC source, and also is used to step-down the input line voltage into a suitable value according to the turns ratio. The transformer s turns ratio is defined by: V pr( r. m. s) n = (1) V s( r. m. s) Where V pr(r.m.s) is the r.m.s value of the transformer primary winding voltage, and V s(r.m.s) is the r.m.s value of the transformer secondary winding voltage. In the circuit of Fig.1, V pr(r.m.s) = 220V

9 Experiment 2 Rectifier Circuits Figure 1: Half-Wave Rectifier with Transformer-Coupled Input Voltage The peak value of the secondary winding voltage V sp is related to the r.m.s value by the relation: V = (2) sp 2. V s ( r. m. s) When the sinusoidal voltage across the secondary winding of the transformer goes positive, the diode is forward-biased and conducts current through the load resistor R L. Thus, the output voltage across R L has the same shape as the positive half-cycle of the input voltage. When the secondary winding voltage goes negative during the second half of its cycle, the diode is reverse-biased. There is no current in this case, so the voltage across the load resistor is 0V. The net result is that only the positive half-cycles of the AC input voltage on the secondary winding appear across the load as shown in Fig.2. Since the output does not change polarity, it is a pulsating DC voltage with frequency equals to that of the input AC voltage. Figure 2: Waveforms of the Half-Wave Rectifier Circuit When taking the voltage drop across the diode into account, the peak value of the output voltage is given by: V V 0.7 (3) op = sp In equation (3), it was assumed that the voltage drop across the silicon diode is 0.7V when it conducts

10 Experiment 2 Rectifier Circuits It can be verified that the average (or DC) value of the output voltage is given by: Vop Vsp 0.7 V dc = = (4) π π The peak inverse voltage (PIV) of the diode for this circuit equals the peak value of the secondary winding voltage: PIV V sp = V (5) = op 1.2 Center-Tapped Full-Wave Rectifier The full-wave center-tapped rectifier uses two diodes connected to the secondary of a centertapped transformer as shown in Fig.3. Figure 3: The Center-Tapped Full-Wave Rectifier Circuit The Input voltage is coupled through the transformer to the center-tapped secondary. For the positive half cycle of the input signal, the polarities of the secondary winding voltages are shown in Fig.3. This makes the upper diode D 1 conducting and the lower diode D 2 to be reverse-biased. The current path is through D 1 and the load resistor R L. For the negative half cycle of the input voltage, the voltage polarities on the secondary winding of the transformer will be reversed causing D 2 to conduct, while reverse-biasing D 1.The current path is through D 2 and R L. Because the output current during both the positive and negative portions of the input cycle is in the same direction through the load, the output voltage developed across the load resistor is a full-wave rectified DC voltage as shown in Fig.4. Figure 4: Waveforms of the Full-Wave Rectifier - 9 -

11 Experiment 2 Rectifier Circuits The DC output voltage of the full-wave rectifier is given by: 2V op 2( Vsp 0.7) V dc = = (6) π π The peak inverse voltage (PIV) of each diode in this circuit is obtained as: PIV 2 V sp 0.7 = 2V (7) = op The frequency of the output voltage equals twice the line frequency as shown from the waveform of the output voltage. 1.3 Full-Wave Bridge Rectifier The full-wave bridge rectifier uses four diodes as shown in Fig.5. When the input cycle is positive, diodes D 1 and D 2 are forward biased and conduct current. A voltage is developed across R L which looks like the positive half of the input cycle. During this time, diodes D 3 and D 4 are reverse-biased. When the input cycle is negative, diodes D 3 and D 4 become forward-biased and conduct current in the same direction through R L as during the positive half-cycle. During the negative half-cycle, D 1 and D 2 are reverse biased. A full-wave rectified output voltage appears across R L as a result of this action. Figure 5: The Full-Wave Bridge Rectifier Circuit In this circuit, two diodes are always in series with the load resistor during both the positive and negative half-cycles. If these diode drops are taken into account, the output peak voltage is: V V 1.4 (8) op = sp The DC output voltage is given by: 2V op 2( Vsp 1.4) V dc = = (9) π π The peak inverse voltage of each diode in the circuit is given by: PIV V sp 0.7 = V (10) = op

12 Experiment 2 Rectifier Circuits 1.4 Capacitor Filter As stated previously, the filter is used to reduce the ripples in the pulsating waveform of the rectifier. A half-wave rectifier with a capacitor filter is shown in Fig.6. Figure 6: Half-Wave Rectifier with a Capacitor Filter During the positive first quarter-cycle of the input signal, the diode is forward-biased, allowing the capacitor to charge to within 0.7V of the peak value of the secondary winding voltage. When the input begins to decrease below its peak, the capacitor retains its charge and the diode becomes reverse-biased because the cathode is more positive than the anode. During the remaining part of the cycle, the capacitor can discharge only through the load resistance at a rate determined by the R L C time constant, which is normally long compared to the period of the input signal. Figure 7 shows the output voltage of the filter circuit. Figure 7: Output Waveform of the Capacitor Filter Connected with the Half-Wave Rectifier The variation in the capacitor voltage due to the charging and discharging is called the ripple voltage as illustrated in Fig.7. Generally, ripple is undesirable. Thus, the smaller the ripple, the better the filtering action. For a half-wave rectified capacitor filter, the approximate value of the peak-to-peak ripple voltage is given by: V 1 r ( pp) Vop (11) frlc Where f is the frequency of the input signal, and V op is the measured peak value of the output waveform

13 Experiment 2 Rectifier Circuits The DC voltage of the output waveform can be approximated by: V dc Vr ( pp) = Vop (12) 2 Or, V dc 1 Vop frlc 1 (13) 2 For the full-wave rectifier, the output frequency is twice that of the half-wave rectifier. This makes a full-wave rectifier easier to filter because of the shorter time between peaks. The peak-to-peak ripple voltage for the full-wave rectified capacitor filter is given by: V 1 2 r ( pp) Vop (14) frlc The DC voltage of the output waveform for the full-wave rectified capacitor filter can be approximated by: V dc 1 Vop frlc 1 (15) 4 The ripple factor is an indication of the effectiveness of the filter and is defined as: r V r( pp) = (16) V dc The lower the ripple factor, the better the filter. The ripple factor can be lowered by increasing the value of the filter capacitor or increasing the load resistance. 2. Procedure 1. Connect the half-wave rectifier circuit shown in Fig.8. Measure the DC output voltage, peak value of the secondary winding voltage, and the peak value of the output voltage as tabulated in Table 1. Sketch the output waveform. Figure 8: The Practical Half-Wave Rectifier Circuit

14 Experiment 2 Rectifier Circuits Table 1: Recorded Data for the Half-wave Rectifier Circuit Quantity Measured Value Calculated Value V sp V op V dc 2. Connect a capacitor filter at the output of the half-wave rectifier as shown in Fig.9, and measure the DC output voltage and peak-to-peak ripple voltage in the output. Figure 9: Practical Capacitor Filter Connected to the Half-Wave Rectifier Table 2: Recorded Data for the Half-wave Rectifier and Filter Circuit Quantity Measured Value Calculated Value V dc V r(pp) 3. Repeat step 2 after replacing the filter capacitor with another one of value 10µF. 4. Connect the full-wave center-tapped transformer rectifier circuit shown in Fig.10. Measure the DC output voltage, peak value of the secondary winding voltage, and the peak value of the output voltage as tabulated in Table 3. Sketch the output waveform in this case. Figure 10: Practical Circuit for the Center-Tapped Full-Wave Rectifier

15 Experiment 2 Rectifier Circuits Table 3: Recorded Data for the Center-Tapped Rectifier Circuit Quantity Measured Value Calculated Value V sp V op V dc 5. Connect a capacitor filter at the output of the full-wave rectifier as shown in Fig.11, and measure the DC output voltage and peak-to-peak ripple voltage at the output. Figure 11: Practical Circuit for the Center-Tapped Full-Wave Rectifier with the Capacitor Filter Table 4: Recorded Data for the Full-wave Center-Tapped Rectifier and Filter Circuit Quantity Measured Value Calculated Value V dc V r(pp) 6. Replace the filter capacitor with another one of value 10µF and repeat step Connect the full-wave bridge rectifier circuit shown in Fig.12. Measure the DC output voltage, and the peak value of the output voltage as tabulated in Table 5. Sketch the output waveform in this case. It should be noted that the secondary winding waveform in this case is similar to that of the center-tapped full-wave rectifier. Figure 12: The Practical Full-Wave Bridge Rectifier Circuit

16 Experiment 2 Rectifier Circuits Table 5: Recorded Data for the Full-Wave Bridge Rectifier Circuit Quantity Measured Value Calculated Value V op V dc 8. Connect a capacitor filter at the output of the full-wave bridge rectifier as shown in Fig.13, and measure the DC output voltage and peak-to-peak ripple voltage at the output. Figure 13: Practical Circuit for the Full-Wave Bridge Rectifier with the Capacitor Filter Table 6: Recorded Data for the Full-wave Bridge Rectifier and Filter Circuit Quantity Measured Value Calculated Value V dc V r(pp) 9. Replace the filter capacitor with another one of value 10µF and repeat step Calculations and Discussion 1. Calculate the theoretical output DC voltage of the half-wave rectifier circuit and compare it with measured value. For the capacitive filter, obtain the theoretical values of the DC output voltage and the ripple voltage and compare these values with the measured quantities. Determine also the practical and theoretical values of the ripple factor. 2. Calculate the theoretical output DC voltage of the center-tapped full-wave rectifier circuit and compare it with measured value. For the capacitive filter, obtain the theoretical values of the DC output voltage and the ripple voltage and compare these values with the measured quantities. Determine also the practical and theoretical values of the ripple factor. 3. Repeat the calculations for the full-wave bridge rectifier and filter circuit. 4. Determine the peak inverse voltage (PIV) on each diode in the three rectifier circuits

17 Experiment 2 Rectifier Circuits 5. If diode D 4 in the bridge rectifier circuit of Figure 5 was removed or burned, explain the operation of the circuit in this case and sketch the predicted waveform of the output. 6. Explain the effect of increasing the filter capacitance on the output voltage in the halfwave rectifier and filter circuit. 7. Compare the DC output voltages of the three rectifier circuits. Which circuit has the highest output? On the other hand, which circuit has the lowest peak inverse voltage on each diode? 8. What value of filter capacitor is required to produce 1% ripple factor for a full-wave rectifier having a load resistance of 1.5kΩ? Assume that the peak value of the output voltage is 18V

18 Experiment 3 Clipping and Clamping Circuits Experiment 3 Clipping and Clamping Circuits Objectives The purpose of this experiment is to demonstrate the operation of diode clipping and clamping circuits. Required Parts and Equipments 1. Function Generator 2. Dual-Channel Oscilloscope 3. DC Power Supply 4. Electronic Test Board 5. Resistors 1KΩ, 68KΩ 6. Silicon Diode 1N Leads and Adaptors 1. Theory In addition to the use of diodes as rectifiers, there are a number of other interesting applications. For example, diodes are frequently used in applications such as wave-shaping, detectors, voltage multipliers, switching circuits, protection circuits, and mixers. In this experiment, we will investigate two widely used applications of diode circuits, namely diode clipping circuits and diode clamping circuits. 1.1 Clipping Circuits Diode clipping circuits are wave-shaping circuits that are used to prevent signal voltages from going above or below certain levels. The clipping level may be either equal to the diode s barrier potential or made variable with a DC voltage source (or bias voltage). Because of this limiting capability, the clipper is also called a limiter. There are, in general, two types of clipping circuits: parallel clippers and series clippers. In parallel clippers, the diode is connected in a branch parallel to the load, while in series clippers, the diode is connected in series with the load. Fig.1 presents a simple diode clipping circuit. This circuit is known as the unbiased parallel diode clipper, and is used to clip or limit the positive part of the input voltage. As the input voltage goes positive, the diode becomes forward-biased. The anode of the diode in this case is at a potential of 0.7V with respect to the cathode. So, the output voltage will be limited to 0.7V when the input voltage exceeds this value. When the input voltage goes back below 0.7V, the diode is reverse-biased and appears as an open circuit. The output voltage will look like the negative part of the input voltage

19 Experiment 3 Clipping and Clamping Circuits Figure 1: Simple Unbiased Parallel Diode Clipping Circuit The level to which an AC voltage is limited can be adjusted by adding a bias voltage V B in series with the diode as shown in Fig.2. Figure 2: Biased Parallel Diode Clipping Circuit In this circuit, the input voltage must equal V B + 0.7V before the diode will become forwardbiased and conduct. Once the diode begins to conduct, the output voltage is limited to V B + 0.7V so that all input voltage above this level is clipped off. In Fig.3, a simple series diode clipping circuit is presented. Its action is actually similar to that of the half-wave rectifier. Figure 3: Simple Unbiased Series Diode Clipping Circuit When the input signal goes positive and exceeds 0.7V, the diode becomes forward-biased and the output voltage is V in 0.7V. When the input voltage becomes less than 0.7V, the diode becomes reverse-biased and no current flows in the circuit, resulting in zero output voltage

20 Experiment 3 Clipping and Clamping Circuits Fig.4 shows a biased series clipping circuit. Figure 4: Biased Series Diode Clipping Circuit When the input voltage is less than V B + 0.7V, the diode does not conduct and no current flows through the load, and hence the output voltage will be 0V. If the input signal becomes larger than V B + 0.7V, the diode will conduct and the output voltage becomes V in (V B + 0.7). The output voltage waveform will be as shown in Fig Clamping Circuits Diode clamping circuits are used to shift the DC level of a waveform. If a signal has passed through a capacitor, the DC component is blocked. A clamping circuit can restore the DC level. For this reason these circuits are sometimes called DC restorers. There are two kinds of clamping circuits, positive clampers and negative clampers. Fig.5 shows a positive diode clamper that inserts a positive DC level in the output waveform. Figure 5: Unbiased Positive Clamping Circuit During the negative half cycle, the diode conducts and the capacitor charges to V p volts (assuming ideal diode). In the positive half cycle, the capacitor which was charged initially, discharges through the resistor by a time constant R L C. This happens only if R L C time constant is much less than half the time period of the waveform. Hence if R L C is larger than half the time period, it will not discharge through R L. Now C acts as a DC battery of V p volt

21 Experiment 3 Clipping and Clamping Circuits Hence during the positive half cycle, the diode is reverse biased by (V in + V p ) volts, which appears across it. The magnitude of R L and C must be chosen such that the time constant τ = R L C is large enough to ensure the voltage across the capacitor does not discharge significantly during the interval of the diode when it is non-conducting ( τ >> T). So, for an acceptable approximation we have: R L. C 10T (1) Where T is the time period of the input signal. Biased clamping circuits produce an output waveform which is clamped by a variable level defined by a bias voltage source connected in series with the diode. If a battery of value V B is added to forward bias the diode of Fig.5 then the clamping level of the output waveform is raised from V p to V p + V B volts. Consider Fig.6, where a biased positive clamper circuit is presented. The capacitor gets charged to V p + V B volts assuming an ideal diode. In the positive half cycle the same C acts as a battery of V p + V B volts, and hence the output is ( V in + V p + V B ) volts. 2. Procedure Figure 6: Biased Positive Clamping Circuit 1. Connect the clipping circuit shown in Fig.7, and apply a 20V pp sinusoidal input waveform with frequency of 1 khz at the input. Display and sketch both input and output signals. Figure 7: Practical Unbiased Parallel Clipping Circuit

22 Experiment 3 Clipping and Clamping Circuits 2. Connect the biased parallel clipping circuit shown in Fig.8, and apply a 20V pp sinusoidal input waveform with frequency of 1 khz at the input. Display and sketch the input and the output waveforms. Figure 8: Practical Biased Parallel Clipping Circuit 3. Connect the series clipping circuit shown in Fig.9, and apply a 20V pp sinusoidal input waveform with frequency of 1 khz at the input. Display and sketch the input and the output waveforms. Figure 9: Practical Unbiased Series Clipping Circuit 4. Connect the biased series clipping circuit shown in Fig.10, and apply a 20V pp sinusoidal input waveform with frequency of 1 khz at the input. Display and sketch the input and the output waveforms. Figure 10: Practical Biased Series Clipping Circuit

23 Experiment 3 Clipping and Clamping Circuits 5. Connect the clamping circuit shown in Fig.11, and apply a 10V pp sinusoidal input waveform with frequency of 1 khz at the input. Display and sketch the input and the output waveforms. Figure 11: Practical Unbiased Positive Clamping Circuit 6. Repeat step 5 after applying a square wave of 10V pp amplitude and 1 khz frequency. 7. Connect the biased positive clamping circuit shown in Fig.12, and apply a 10V pp sinusoidal input waveform with frequency of 1 khz at the input. Display and sketch the input and the output waveforms. Figure 12: Practical Biased Positive Clamping Circuit 8. Repeat step 7 after applying a square wave of 10V pp amplitude and 1 khz frequency. 3. Discussion 1. What is the effect of the diode voltage drop on the output of the clipping circuit in Fig.4? Compare the waveforms with those obtained when assuming ideal diodes. 2. If the diode in the circuit of Fig.2 was reversed, then sketch the output waveform in this case and explain briefly the operation of the circuit

24 Experiment 3 Clipping and Clamping Circuits 3. Design a clipping circuit that will limit the output voltage to 5V when applying an input sinusoidal waveform with a peak value of 10V. Assume available diodes with voltage drop of 0.5V. Sketch the output waveform of the circuit. 4. Sketch the output waveform for the clipping circuit of Fig.1 if a load resistance R L of value 1 kω is connected at the output terminals in parallel with the diode. 5. Discuss how diode limiters and diode clampers differ in terms of their function. 6. Design a clamper circuit that shifts the DC level of an input sinusoidal waveform by +6V if the peak value of the input signal is 3V, and its frequency is 500 Hz. Assume diode voltage drop is 0.6V. 7. What is the effect of reducing the load resistor on the output of the clamper circuit shown in Fig.5 if the input signal is a square wave? 8. What is the difference between a positive clamper and a negative clamper? Explain with the aid of circuit diagrams and output waveforms

25 Experiment 3 Clipping and Clamping Circuits This page is left intentionally blank

26 Experiment 4 The Zener Diode Experiment 4 The Zener Diode Objectives The purposes of this experiment are to demonstrate the characteristics of a zener diode and its use as a simple voltage regulator. Required Parts and Equipments 1. Variable DC Power Supply. 2. Digital Multimeters. 3. Zener Diode, BZX55C5V1 (5.1V, 0.5W). 4. Carbon Resistors 330Ω (2W), 1kΩ (2W). 5. Variable Box Resistor. 6. Leads and Wires. 1. Theory The zener diode is a silicon PN junction device that differs from rectifier diodes because it is designed to operate in the reverse-breakdown region. The breakdown voltage of the zener diode is set by carefully controlling the doping level during the manufacturing process. Fig.1 shows the zener diode s symbol and current-voltage characteristic. Figure 1: Zener Diode Symbol and IV Characteristic

27 Experiment 4 The Zener Diode As shown from Fig.1b, as the reverse voltage V R is increased, the reverse current I R remains extremely small up to the knee of the curve. At this point, the breakdown effect begins and the zener breakdown voltage V Z remains approximately constant as the zener current I Z increases. The reverse current in this region is actually called the zener current. A zener diode operating in breakdown acts as a voltage regulator because it maintains a nearly constant voltage across its terminals over a specified range of reverse current values. The minimum value of reverse current required to maintain the zener diode in breakdown for voltage regulation is known as the knee current I ZK as illustrated in Fig.1b. When the reverse current is reduced below I ZK, the voltage decreases drastically and regulation is lost. On the other hand, the maximum current that the diode can withstand is abbreviated as I ZM, and is defined as the zener current above which the diode may be damaged due to excessive power dissipation. This current can be determined from: P ZM I ZM = (1) VZ Where P ZM represents the maximum DC power dissipation of the zener diode, which is usually specified in the datasheet. So, the practical operating range of the zener diode current should be maintained between I ZK and I ZM for proper voltage regulation. Fig.2 shows the ideal and practical models of the zener diode in the reverse breakdown region. Figure 2: Zener Diode Equivalent Circuit Models The ideal model of the zener diode shown in Fig.2a has a constant voltage drop equal to the nominal zener voltage. This constant voltage drop is represented by a DC voltage source which indicates that the effect of reverse breakdown is simply a constant voltage across the zener terminals. Fig.2b represents the practical model of the zener diode, in which the internal zener resistance r z is included. Since the actual voltage curve is not ideally vertical, a change in zener current I Z produces a small change in zener voltage V Z as illustrated in Fig.3. By Ohm s law, the ratio of V Z to I Z is the zener diode internal resistance as expressed in the following equation:

28 Experiment 4 The Zener Diode r z V I Z = (2) Z In most cases, we can assume that r z is constant over the full linear range of the zener diode current values. Figure 3: Reverse Characteristic of a Zener Diode Showing the Determination of the Internal Resistance r z 1.1 The Zener Diode as a Voltage Regulator The zener diode is often used as a voltage regulator in DC power supplies. Fig.4 presents a simple voltage regulator circuit. In this circuit, the zener diode should maintain a constant output voltage against variations in input voltage V in, or load resistance R L. Resistor R S is used as a series current limiting resistor. Figure 4: Simple Zener Diode Voltage Regulator

29 Experiment 4 The Zener Diode The analysis of the circuit depends on the state of the zener diode if it enters the zener breakdown region or not. To determine the state of the zener diode, we can remove it from the circuit temporarily and calculate the voltage across the open circuit. The load voltage in this case can be obtained from the voltage divider rule: V L = RL. Vin R + R S L (3) If V L V Z, then the zener diode is ON, and the appropriate equivalent model can be substituted. On the other hand, if V L < V Z, the zener diode is OFF, and it is substituted with an open circuit. When the zener diode operates in its zener breakdown region, it can be substituted simply with a constant voltage source V Z. In this case: V L = V Z (4) The source current I S can be found from the equation: I S V V R in Z = (5) S The load current is calculated as the ratio of load voltage to load resistance: V L I L = (6) RL The zener current is obtained by applying Kirchhoff s current law: I Z = I S I L (7) The power dissipated by the zener diode is determined from: P = V. I (8) Z Z Z This value of P Z must be less than the maximum power rating of the diode P ZM in order to avoid damaging the zener diode. 1.2 Zener Voltage Regulator with a Variable Load Resistance Fig.5 shows a zener voltage regulator with a variable load resistor across the output terminals. The zener diode maintains a nearly constant voltage across R L as long as the zener current is greater than I ZK and less than I ZM. This is called load regulation. When the output terminals of the zener regulator are open (R L = ), the load current is zero and the entire source current I S passes through the zener diode. When a load resistor R L is connected, part of the source current passes through the zener diode, and part through R L. As

30 Experiment 4 The Zener Diode R L is decreased, the load current I L increases and I Z decreases. The source current passing through R S remains essentially constant. Figure 5: Zener Regulator with Variable Load Resistance and Fixed Input Voltage To determine the minimum load resistance that will turn on the zener diode, we simply calculate the value of R L that will result in a load voltage V L = V Z. Assuming I ZK =0, we have from voltage divider rule: V L = V Z = V R L in. RL + R S Solving for R L yields: R R. V S Z L(min) = (9) Vin VZ 1.3 Zener Voltage Regulator with a Variable Input Voltage Fig.6 illustrates how a zener diode can be used to regulate a varying input DC voltage. This is called input or line regulation. Figure 6: Zener Regulator with Variable Input Voltage and Fixed Load Resistance

31 Experiment 4 The Zener Diode For fixed values of R L, the input voltage must be sufficiently large to turn on the zener diode. Neglecting I ZK, the minimum turn-on voltage is determined by: V L = V Z = V R L in. RL + R S Solving for V in, we have: V in(min) ( R + R R L S Z = (10) L ). V The maximum value of V in is limited by the maximum zener current I ZM. We have: I + S (max) = I ZM I L (11) I L is given by: V V I = L Z L = (12) RL RL Therefore, the maximum input voltage is given by: V = I. R + V in(max) S (max) S Z Or, V V + Z in(max) = ( I ZM + ). RS VZ (13) RL 2. Procedure 1. Connect the zener diode test circuit shown in Fig.7. Increase the input voltage gradually in several steps from 0 to 15V, and record V Z and I Z according to Table 1. Figure 7: Practical Circuit Used to Obtain the Characteristics of the Zener Diode

32 Experiment 4 The Zener Diode Table 1: Recorded Data for the Circuit of Figure 7 V in (V) V Z (V) I Z (ma) Connect the voltage regulator circuit shown in Fig.8, and vary the load resistor R L in several steps as shown in Table 2. Record V L, I S, I Z, and I L where I L = I S -I Z. Figure 8: Practical Circuit for Zener Diode Voltage Regulator with Variable Load Resistor 3. Connect the voltage regulator circuit shown in Fig.9, and vary the input voltage in several steps from 0 to 15V as shown in Table 3. Record V L, I S, I Z, and I L where I L = I S -I Z

33 Experiment 4 The Zener Diode Table 2: Recorded Data for the Voltage Regulator Circuit of Figure 8 R L (Ω) V L (V) I S (ma) I Z (ma) I L (ma) k 1.5k 2.0k 2.5k 5.0k Figure 9: Practical Circuit for Zener Diode Voltage Regulator with Variable Input Voltage Table 3: Recorded Data for the Voltage Regulator Circuit of Figure 9 V in (V) V L (V) I S (ma) I Z (ma) I L (ma)

34 Experiment 4 The Zener Diode 4. Calculations and Discussion 1. Plot the characteristic curve of the zener diode in the reverse-breakdown region from the results obtained in step 1 of the procedure. 2. Determine the internal resistance r z of the zener diode from your data. Do this calculation only on the straight-line breakdown region of the characteristic curve plotted in step 1 above. 3. Determine the power dissipation in the zener diode for the maximum zener current flowing through it from the obtained data of step1 in the procedure, and compare it with P ZM. 4. For the zener diode voltage regulator circuit of Fig.8, sketch the relation between V L and I L (V L versus I L ). Plot the relation between I S and R L. Sketch also the relation between I Z and I L. Comment on the resulting curves. 5. Calculate the theoretical minimum value of R L required for putting the zener diode in the zener breakdown region for the regulator circuit of Fig.8. What value of load resistance results in the maximum zener current? Determine the maximum zener current I Z(max) in this case and compare it with I ZM. 6. Plot the relation between V L and V in for the voltage regulator circuit in Fig.9, and comment on the resulting sketch. From this sketch, determine the minimum value of input voltage required to turn-on the zener diode. 7. Calculate the theoretical minimum value of V in required to turn-on the zener diode in the voltage regulator circuit of Fig.9. Determine also the maximum permissible value of V in knowing that the maximum DC power dissipation of the BZX55C5V1 zener diode is 0.5W. 8. Explain the difference between line regulation and load regulation

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36 Experiment 5 Light Emitting Diodes Experiment 5 Light Emitting Diodes Objectives The purpose of this experiment is to determine and plot the characteristics of the light emitting diode in the forward-bias region, and to compare between different colored diodes. Required Parts and Equipments 1. Variable DC Power Supply. 2. Digital Multimeters. 3. Electronic Test Board. 4. Light Emitting Diodes (LEDs) with different colors (Red, Yellow, and Green). 5. Resistor (470Ω, 1W). 6. Leads and Wires. 1. Theory The Light-Emitting Diode (LED) is a semiconductor PN junction diode that emits visible light or near-infrared radiation when forward biased. LEDs switch off and on rapidly, are very rugged and efficient, have a very long lifetime, don t heat up, and are easy to use. They are used as indicators, displays, and as light transmitters. Various impurities are added during the doping process to vary the color output. The LED is basically just a specialized type of PN junction diode, made from a very thin layer of fairly heavily doped semiconductor material. Fig.1 depicts the construction of the light emitting diode. Figure 1: LED Construction

37 Experiment 5 Light Emitting Diodes When the diode is forward biased, electrons from the semiconductors conduction band recombine with holes from the valence band releasing sufficient energy to produce photons which emit a monochromatic (single color) of light. Because of this thin layer a reasonable number of these photons can leave the junction and radiate away producing a colored light output. Then we can say that when operated in a forward biased direction Light Emitting Diodes are semiconductor devices that convert electrical energy into light energy. Fig.2 shows the LED external package and its electronic symbol. Figure 2: The LED Package and Symbol As shown from Fig.1, the cathode is the short lead and there may be a slight flat on the body of round LEDs. Light emitting diodes are available in a wide range of colors with the most common being RED, ORANGE, YELLOW and GREEN, and are thus widely used as visual indicators and as moving light displays. Visible LEDs emit relatively narrow bands of green, yellow, orange, or red light. Infrared LEDs emit in one of several bands just beyond red light. Light Emitting Diodes are made from special semiconductor compounds such as Gallium Arsenide (GaAs), Gallium Phosphide (GaP), Gallium Arsenide Phosphide (GaAsP), Silicon Carbide (SiC) or Gallium Indium Nitride (GaInN) all mixed together at different ratios to produce a distinct wavelength of color. Silicon and germanium are not used because they are heat producing materials and are very poor in producing light. Thus, the actual color of a light emitting diode is determined by the wavelength of the light emitted, which in turn is determined by the actual semiconductor compound used in forming the PN junction during the manufacturing process. Therefore, the color of an LED is determined by the semiconductor material, not by the coloring of the 'package' (the plastic body). Table 1 below shows typical technical data for some LEDs with diffused packages. Table 1: Some Important Characteristics of Typical LEDs Type Color I D max. V D typ. V D max. Wavelength Standard Red 30mA 1.7V 2.1V 660nm Standard Bright red 30mA 2.0V 2.5V 625nm Standard Yellow 30mA 2.1V 2.5V 590nm Standard Green 25mA 2.2V 2.5V 565nm High intensity Blue 30mA 4.5V 5.5V 430nm

38 Experiment 5 Light Emitting Diodes When an LED is forward biased to the threshold of conduction, its current increases rapidly and must be controlled to prevent destruction of the device. The light output is quite linearly proportional to the forward LED current as shown in Fig.3. Figure 3: LED Bias Circuit and Power Output Characteristic A series resistor (R s ) should be used to limit the current through the LED to a safe value. The LED diode voltage drop ranges from about 1.3V to about 3.6V. This resistor is calculated from: R S V I V S D = (1) D(max) Where V S is the source bias voltage, V D is the LED voltage drop, and I D(max) is the maximum current of the LED. Fig.4 shows the IV characteristics in the forward bias region for some typical diodes with different colored packages. Figure 4: LED I-V Characteristics Curves Showing the Different Colors Available

39 Experiment 5 Light Emitting Diodes 2. Procedure 1. Connect the circuit shown in Fig.5, and increase the input DC voltage from 0V to 15V in several steps. Use red LED and record V D and I D according to Table 2. Figure 5: The LED Test Circuit Table 2: Recorded Data of the LED Test Circuit V in (V) V D (V) I D (ma) Repeat step 1 after replacing the red LED with a yellow colored one. 3. Repeat step 1 after replacing the LED with a green colored one. 3. Discussion 1. Plot the forward characteristics of each LED on the same graph. 2. From the sketched curves, determine the threshold voltage for each LED. Determine also the forward static resistance at 10mA for each diode. 3. Which factor determines the color of the emitted light of the LED?

40 Experiment 5 Light Emitting Diodes 4. A certain LED has a typical forward voltage of 2.2V, and a maximum current of 30mA. If this diode is to be connected to a voltage source of 15V, determine the suitable value of the current limiting resistor. Find the current flowing in the LED when the input voltage is reduced to 8V. Assume the voltage drop across the diode remains constant. 5. Determine the minimum input voltage required to turn on the zener diode in the following circuit. 6. What are the features of LEDs over conventional bulbs? Name some applications for LEDs. 7. A yellow colored LED with a forward voltage drop of 2.1V is to be connected to a 5.0V stabilized DC power supply. Calculate the value of the series resistor required to limit the forward current to less than 10mA. Also calculate the current flowing through the diode if a 100Ω series resistor is used instead of the calculated first. 8. How can you connect two LED diodes with different colors in parallel to the same DC power supply? Sketch the circuit diagram and justify the method of wiring

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42 Experiment 6 Characteristics of Bipolar Junction Transistors Experiment 6 Characteristics of Bipolar Junction Transistors Objectives The purpose of this experiment is to determine and graph the input and output characteristics of a bipolar junction transistor (BJT) in the common emitter configuration, and to measure its h-parameters at a given DC bias point. Required Parts and Equipments 1. Dual DC Power Supply. 2. Digital Multimeters. 3. Electronic Test Board. 4. NPN Silicon Transistor 2N Resistors 56 KΩ, 120Ω. 6. Leads and Wires. 1. Theory A bipolar junction transistor (BJT) is a three-terminal device capable of amplifying a small AC signal. The three terminals are called the base, emitter, the collector. BJTs consist of a very thin base material sandwiched between two of the opposite type materials. Bipolar transistors are available in two forms, either NPN or PNP. The middle letter indicates the type of material used for the base, while the outer letters indicate the emitter and collector terminals. The emitter is heavily doped, the base is lightly doped, and the collector is intermediately doped. Fig.1 shows BJT transistor construction and symbols. Figure 1: Types of BJT Transistors

43 Experiment 6 Characteristics of Bipolar Junction Transistors As shown in Fig.1, two P-N junctions are formed when a transistor is made, the junction between the base and emitter, and the junction between the base and collector. These two junctions form two diodes, the emitter-base diode and the collector-base diode. There are three configurations in connecting the BJT depending on which of the three terminals is used as the common terminal. These configurations are the common emitter (CE), the common base (CB), and the common collector (CC). Common emitter configuration is most effective because of its high current gain, high voltage gain and power gain. In common emitter configuration, emitter terminal is made common to both input and output circuits as shown in Fig.2. Input junction (Emitter-Base Junction) is forward biased and output junction (Collector-Base Junction) is reverse biased so that the input junction is having low resistance (since it is forward biased) and the output junction is having high resistance (since it is reverse biased). Figure 2: Common Emitter Transistor Configuration Bipolar transistors are primarily current amplifiers. In the CE configuration, a small base current is amplified to a larger current in the collector circuit. The ratio of the DC collector current I C to the DC base current I B is called the DC beta (β dc ) of the transistor. Thus: I = C β dc (1) I B Typical values of β dc range from 20 to 250 or higher. β dc is usually designated as h FE in transistor datasheets. Hence: hfe = β (2) dc Another useful parameter in bipolar transistors is the DC alpha (α dc ). It is defined as the ratio of the DC collector current I C to the DC emitter current I E. Thus: I C α dc = (3) I E Typically, values of α dc range from 0.95 to 0.99, but α dc is always less than Common Emitter Input and Output Characteristics Two sets of characteristics are necessary to describe fully the behavior of the common emitter configuration: the input (or base) characteristics, and the output (or collector)

44 Experiment 6 Characteristics of Bipolar Junction Transistors characteristics. Input characteristics of a transistor are curves showing the variation of input (base) current I B as a function of input (base-emitter) voltage V BE, when the output (collectoremitter) voltage V CE is kept constant. Fig.3 depicts the input characteristics for a typical transistor. Figure 3: Typical Input Characteristics of a Silicon NPN Transistor in the Common Emitter Configuration As shown from Fig.3, the input characteristics are similar to that of a forward-biased diode since the emitter-base junction is forward-biased. Note also the slight shift in the curves when increasing V CE. Output characteristics of a transistor are curves showing the variation of the output current I C as a function of output voltage V CE, when the input current I B is kept constant. Fig.4 depicts the output characteristics for a typical transistor. Figure 4: Typical Output Characteristics of a Silicon NPN Transistor in the Common Emitter Configuration

45 Experiment 6 Characteristics of Bipolar Junction Transistors As shown from Fig.4, for very small values of V CE the collector-base junction is forward biased and the transistor is in the saturation region. In this portion of the curves, I C is increased linearly with V CE. As V CE increases, the collector-base junction becomes reversebiased and the transistor goes into the active region. In this portion of the curves, I C remains essentially constant (for a given value of I B ) as V CE continues to increase. Actually, I C increases very slightly as V CE increases due to widening of the collector-base depletion region. For this portion of the characteristic curves, the value of I C is only determined by the expression I C = β dc I B. Fig.5 shows a common emitter circuit that can be used to generate the input and output characteristic curves. The purpose of R B in this circuit is to limit the base current to a safe level. 1.2 Transistor h-parameters Figure 5: Test Circuit used to generate the Common Emitter Input and Output Characteristics In order to analyze transistor amplifier operation, an AC small signal model for the BJT is required. The most widely used equivalent circuit model to describe the transistor behavior at low and mid-band frequencies is the h-parameter model. For the common emitter configuration, when the transistor is considered as a linear two port network, the input small signal AC voltage (v be ) and the output small signal AC current (i c ) can be expressed in terms of the input current (i b ) and output voltage (v ce ) by the following equations: v = h. i + h. v (4.a) c be fe ie b b oe re ce ce i = h. i + h. v (4.b) The common emitter hybrid parameters in equation 4 are defined as: h ie = input resistance = v i be b =0 v ce h re = reverse transfer voltage ratio = v v be ce =0 i b (5) (6)

46 Experiment 6 Characteristics of Bipolar Junction Transistors h fe = forward transfer current ratio = h oe = output conductance = i v c ce =0 i b i i c b =0 v ce (7) (8) The unit of h ie is the Ohm, and that of h oe is the Siemens, while h fe and h re are unit-less. This versatility in the units is the reason behind the name of the hybrid parameters. Fig.6 shows the small-signal AC equivalent circuit of the transistor in the common emitter configuration. Figure 6: Common Emitter Transistor Hybrid Equivalent Circuit Model The h-parameters of the transistor can be determined graphically from its input and output characteristics. The parameters h ie and h re are determined from the input (or base) characteristics, while the parameters h fe and h oe are obtained from the output (or collector) characteristics. Fig.7 presents the method of finding the input resistance h ie graphically at the specified Q- point of the transistor. It should be noted that h-parameters depend on the specific operating point (Q-Point) of the transistor. As observed from the figure, h ie is determined from the equation: h ie V I BE = (9) B V CE = const. The small increments I B and V BE should be taken around the Q-point as depicted in Fig.7. The parameter h re can also be obtained from the input characteristics as shown in Fig.8. In this case: h re V V BE = (10) CE I = const. B The base current I B should be taken as the Q-point operating value I BQ. The parameter h re is very low and can be ignored in most practical cases

47 Experiment 6 Characteristics of Bipolar Junction Transistors Figure 7: Graphical Determination of h ie from the Input Characteristics Figure 8: Graphical Determination of h re from the Input Characteristics The small signal current gain h fe can be determined from the output characteristics of the transistor as shown in Fig.9. As shown from this figure, h fe can be found from:

48 Experiment 6 Characteristics of Bipolar Junction Transistors h fe I I C = (11) B V CE = const. Actually, h fe represents the AC beta of the transistor: hfe = β (12) ac Figure 9: Graphical Determination of h fe from the Output Characteristics If I C is plotted against I B for a given V CE, then an approximate linear relation can be obtained in the active region of the transistor as shown in Fig.10. Figure 10: I C versus I B for a Typical Transistor in the Active Region The output conductance h oe can also be gotten from the output characteristics of the transistor at a specific Q-point as shown in Fig.11. In this case:

49 Experiment 6 Characteristics of Bipolar Junction Transistors h oe I V C = (13) CE I = const. B 2. Procedure Figure 11: Graphical Determination of h oe from the Output Characteristics 1. Connect the common emitter test circuit shown in Fig.12. Try to identify the leads of the 2N3904 transistor correctly. It is built in a TO-92 package as depicted in Fig.12. Figure 12: Transistor Test Circuit Used to obtain the Input Characteristics

50 Experiment 6 Characteristics of Bipolar Junction Transistors 2. Set V CE = 0V, and increase the base current I B in several steps from 0 to 100µA by varying the DC supply voltage V BB, and record V BE in each step as shown in Table Reduce V BB to 0V and set V CE = 5V by adjusting the DC power supply V CC. Increase I B from 0 to 100µA (by slowly increasing V BB ) in several steps and record V BE. V CE should be kept constant at 5V in each step by adjusting V CC. Table-1: Recorded Data for the Transistor Input Characteristics V CE = 0V V CE = 5V I B (µa) V BE (V) I B (µa) V BE (V) Connect the circuit shown in Fig.13 to obtain the output characteristics of the transistor. Figure 13: Transistor Test Circuit Used to obtain the Output Characteristics 5. Start with both power supplies set to 0V. Slowly increase V BB until I B = 20µA. Now slowly increase V CC in several steps and record V CE and I C in each step as shown in Table

51 Experiment 6 Characteristics of Bipolar Junction Transistors 6. Repeat step 5 for base current values of 40µA, and 60µA respectively. Record data as illustrated in Table-2. Table-2: Recorded Data for the Transistor Output Characteristics I B = 20µA I B = 40µA I B = 60µA V CE (V) I C (ma) V CE (V) I C (ma) V CE (V) I C (ma) Calculations and Discussion 1. From the obtained data in Table-1, plot the input characteristic curves of the transistor. 2. Sketch the three output characteristic curves of the transistor from the results obtained in Table Find the h-parameters of the transistor at I B = 40µA and V CE = 5V from the plotted input and output characteristics. 4. Use the plotted characteristic curves to determine the DC current gain β dc for the transistor at V CE = 3.0V and base current of 20µA, 40µA, and 60µA respectively. Repeat for V CE = 5.0V. Tabulate your results as illustrated in Table-3 below. Table-3 DC Current Gain β dc V CE I B = 20µA I B = 40µA I B = 60µA 3.0V 5.0V 5. Does the experimental data indicate that β dc is constant at all points? Does this have any effect on the linearity of the transistor? What effect would a higher β dc have on the characteristic curves you measured?

52 Experiment 6 Characteristics of Bipolar Junction Transistors 6. What is the maximum power dissipated in the transistor for the data taken in the experiment? 7. Show that the DC alpha of the transistor is given by: α dc βdc = β +1 dc Compute α dc for your transistor at V CE = 5.0V and I B = 40µA. 8. What value of V CE would you expect if the base terminal of the transistor is opened? Explain your answer

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54 Experiment 7 Transistor DC Biasing Circuits Experiment 7 Transistor DC Biasing Circuits Objectives The purpose of this experiment is to determine the DC operating point (Q-Point) for the transistor fixed-bias circuit, and the voltage divider bias circuit, and also to compare between their bias stabilities against changes in the transistor beta. Required Parts and Equipments 1. Electronic Test Board. 2. DC Power Supply. 3. Digital Multi-meters. 4. NPN Transistors (BC107, 2N2222). 5. Resistors (470 KΩ, 10 KΩ, 5.6 KΩ, 1 KΩ). 6. Leads and Wires. 1. Theory The analysis or design of a transistor amplifier requires knowledge of both the DC and the AC response. The analysis or design of any amplifier therefore has two components: the DC portion and the AC portion. In fact, the improved output AC power level is the result of a transfer of energy from the applied DC supplies. The term biasing refers to the application of DC voltages to establish a fixed level of current and voltage. For transistor amplifier, the resulting DC current and voltage establish an operating point on the characteristics that define the region that will be employed for the amplification of the applied signal. Because the operating point is a fixed point on the characteristics, it is also called the quiescent point (Q-point). The biasing circuit should be designed to set the device operation at a Q-point within the active region. For the BJT to be biased in the active region, the following must be verified: 1- The base-emitter junction must be forward-biased, with a resulting forward-bias voltage of about 0.6 to 0.7V. 2- The base-collector junction must be reverse-biased, with the reverse-bias voltage being any value within the maximum limits of the device. -53-

55 Experiment 7 Transistor DC Biasing Circuits 1.1 The Fixed-Bias Circuit The Fixed-Bias circuit of Fig.1 is the simplest DC bias configuration. In the base-emitter loop, applying KVL yields: V = I. R + V CC B B BE Solving for I B, we have: I BQ V V R CC BE = (1) B Figure 1: The Fixed -Bias Transistor Circuit The collector current is related to base current by: I = β. (2) CQ I BQ Therefore, I ( V V ) CC BE CQ = β. (3) RB In the collector-emitter loop, we have: V = V + I. R CC CEQ CQ C Solving for V CE yields: V = V I. R (4) CEQ CC CQ C -54-

56 Experiment 7 Transistor DC Biasing Circuits The transistor operating point is I CQ, V CEQ. To sketch the DC load line, the saturation and cut-off limits should be obtained. I C( sat ) V V CC CE( sat) = (5) R C V = V CE ( off ) CC (6) Although the fixed-bias circuit is very simple in construction, it has poor stability, and the Q- point may change or shift considerably if the transistor parameters (β and V BE ) change with temperature. This will result in change in the characteristics of the amplifier circuit. The value of V BE can be taken as 0.7V theoretically for silicon transistors. However, the measured practical value may be slightly different from the theoretical value. 1.2 The Voltage-Divider Bias Circuit In the fixed bias circuit, the bias current I CQ and voltage V CEQ are functions of the current gain β of the transistor. However, because β is temperature sensitive, especially for silicon transistors, this may result in change in bias current and voltage. Therefore, it would be desirable to develop a bias circuit that is independent of the transistor beta. The voltage divider circuit shown in Fig.2 is such a circuit. Voltage-Divider bias circuit is often used because the base current is made small compared to the currents through the two base (voltage-divider) resisters. Consequently, the base voltage and therefore the collector current are stabilized against changes in the transistor beta. Figure 2: The Voltage-Divider Bias Circuit -55-

57 Experiment 7 Transistor DC Biasing Circuits The approximate analysis of the voltage divider bias circuit can be established by neglecting the base current I B when compared to the current flowing in resistor R 2.This is justified by assuming that the input resistance seen from the base is much greater than R 2 ( Ri = β RE >> R 2 ). Thus, the necessary condition for the approximate analysis of the circuit is: β. R E 10R (7) 2 In this case, the base voltage is given by: V B V. R R + R CC 2 = (8) 1 2 The DC emitter voltage is given by: V E = V B V BE (9) Quiescent DC collector current can be found from: V I = E CQ I EQ (10) RE Collector voltage is found as: V = V I. R (11) C CC CQ C The quiescent DC collector-to-emitter voltage is calculated from: V = V I ( R + RE ) (12) CEQ CC CQ C The collector saturation current in this case is given by: I V V CC CE( sat) C( sat ) = (13) RC + RE V CE(sat) is approximately equal to 0.2V for silicon transistors. The collector-emitter voltage at cut-off is: V = CE ( off ) VCC (14) -56-

58 Experiment 7 Transistor DC Biasing Circuits 2. Procedure 1- Connect the circuit shown in Fig.3. Use the NPN transistor BC107. Figure 3: Practical Fixed Bias Transistor Circuit 2- Measure the DC voltages V C and V B using digital multi-meters. Determine the quiescent base current, collector current, and collector- emitter voltage, where: I I V V CC B BQ = (15) RB V V CC C CQ = (16) RC V CEQ = V C V BEQ = V B 3- Measure the transistor current gain as follows: I = CQ β dc (19) I BQ 4- Calculate the expected values of I BQ, I CQ, and V CEQ. Use the value of β determined in step 3 above. Assume that V BE = 0.7 theoretically. Tabulate you results as shown in Table 1. Table 1: Measured and Calculated Transistor Parameters for the Fixed Bias Circuit Transistor 1 (BC107) Quantity Measured Calculated V B V C V BEQ I BQ I CQ V CEQ β dc (17) (18) -57-

59 Experiment 7 Transistor DC Biasing Circuits 5. Replace the BC107 transistor with a 2N2222 NPN transistor and repeat steps 1 to 4. Tabulate the results as in Table 2. Table 2: 2N2222 Transistor Parameters in the Fixed Bias Circuit Transistor 2 (2N2222) Quantity Measured Calculated V B V C V BEQ I BQ I CQ V CEQ β dc 6- Determine the drift in the measured Q- point: I = I I (20) CQ CEQ CQ2 CQ1 V = V V (21) CEQ2 CEQ1 7- Connect the voltage-divider bias circuit shown in Fig.4. Figure 4: Practical Voltage-Divider Transistor Bias Circuit 8- Measure the DC voltages V B, V E, and V C using digital multi-meters. Determine the quiescent point of the transistor as follows: -58-

60 Experiment 7 Transistor DC Biasing Circuits V I = V V E CQ I EQ (22) RE CEQ BEQ = V C = V B V V E E (23) (24) 9- Calculate the expected Q-point of the transistor. Tabulate your results as shown in Table 3. Table 3: Measured and Calculated Transistor Parameters for the Voltage Divider Bias Circuit Transistor 1 (BC107) Quantity Measured Calculated V B V C V E V BEQ I CQ V CEQ 10- Replace the BC 107 transistor with a 2N2222 NPN transistor and repeat steps 7 to 9. Table 4: Measured and Calculated Transistor Parameters of the Voltage Divider Bias Circuit for the 2N2222 transistor Transistor 2 (2N2222) Quantity Measured Calculated V B V C V E V BEQ I CQ V CEQ 11- Find the drift in the measured Q-Point resulting from replacing the transistor. Use equations 20 and Calculations and Discussion 1. Perform the theoretical calculations to determine the Q-point for both circuits and for each transistor, and compare them with the measured values. 2. Determine the drift in the Q-point for the two biasing circuits and therefore compare their bias stabilities. -59-

61 Experiment 7 Transistor DC Biasing Circuits 3. Sketch the DC load line for the fixed bias circuit for each transistor case and place the Q-point on it. 4. Sketch the DC load line for the voltage divider bias circuit for each transistor case and place the Q-point on it. Is there a difference between the load lines in this case? 5. What is the effect of increasing resistor R 2 in the voltage-divider bias circuit on I CQ? How should we select its practical value for better stability considerations? 6. What is the effect of decreasing resistor R B on I CQ for the fixed bias circuit? What is its minimum value to ensure that the transistor is working in the active region? 7. For the fixed bias circuit of Fig.3, if the minimum β of the transistor is specified in the datasheet as 50, and the maximum value is 250, then determine the range of the Q- point of the transistor. 8. Sketch the circuit diagram of the collector-feedback bias circuit and compare its stability with that of the voltage-divider bias circuit. -60-

62 Experiment 8 Logic Gate Circuits Experiment 8 Logic Gate Circuits Objectives The purpose of this experiment is to implement the basic logic gate circuits and verify their operation practically. Required Parts and Equipments 1. Experimental Test Board. 2. 5V DC Power Supply. 3. Digital Voltmeter. 4. Two BC107 NPN Silicon Transistors. 5. Resistors (10KΩ and 1KΩ). 6. Two 1N4007 Silicon Diodes. 1. Theory A logic gate is a switching circuit with two or more inputs and whose output will be either a high voltage or a low voltage, depending on the voltages on the various inputs. Logic gates are widely used in computers and in all types of digital circuits and systems. Digital circuits are characterized by the fact that they contain voltages that exist at either of two levels, for example 0V and 5V. In other words, at any instant of time each circuit input and output voltage will either be at some LOW voltage (V L ) or some HIGH voltage (V H ). In practice, the LOW level is actually a range of voltages, as is the HIGH level. For example, between 0V and 0.8V might be the low level, and between 2V and 5V might be the HIGH level. The range of voltages between 0.8V and 2V is not allowed except during transitions between V H and V L. This concept is illustrated in Fig.1. Figure1: Typical Voltage Levels in a Digital System

63 Experiment 8 Logic Gate Circuits There are several types of logic gates, and many different ways to construct each type using discrete components. The basic logic gates are the OR gate, AND Gate, NOT gate, NOR gate, and NAND gate. 1.1 Diode OR Gate An OR gate is a circuit that has two or more inputs and whose output is equal to the OR sum (Logical Addition) of the inputs. Fig.2 shows the logic symbol and truth table of a two input OR gate. A B Y = A + B Figure 2: The Logic Symbol and Truth Table of the OR Gate The OR gate operates such that its output is HIGH (Logic 1) if either input A or B or both are at a logic -1 level. The OR gate output will be LOW (logic 0) only if all its inputs are at logic- 0. Fig.3 presents a discrete circuit for the OR gate using two diodes and a resistor. Each input can be at either 0V or 5V, so there are four possible input combinations. V 1 V 2 V o 0V 0V 0V 0V 5V 4.3V 5V 0V 4.3V 5V 5V 4.3V Figure 3: Two-input OR Gate Circuit Examination of the truth table shows that the output will be at a HIHG level when either V 1 or V 2 or both are at a HIHG level. The value of V o is LOW only when both inputs are at a LOW level

64 Experiment 8 Logic Gate Circuits Consider first the case where V 1 = V 2 = 0V. In this case neither diode will conduct; thus, no current flows in the circuit, and the output voltage is zero. When V 1 = 0V and V 2 = 5V then diode D 2 will be forward biased because its anode is made positive relative to its cathode. Thus, current will flow through D 2 and R. If the diodes are assumed to be silicon, the forward voltage drop across D 2 will be 0.7V, so V 0 must equal 5V - 0.7V = 4.3V. Diode D 1 is reversebiased because its cathode is at +4.3 V relative to ground, and its anode is at 0V. The third case, where V 1 = 5V and V 2 = 0V,will obviously be the same as the second case except that D 1 will be ON, and D 2 will be OFF. In the final case, where both V 1 and V 2 are 5V, both diodes are ON, so each will have a 0.7V drop. Again, the output will be 4.3V. 1.2 Diode AND Gate The second logic gate is the AND gate. Its symbol and truth table are presented in Fig.4. The output is equal to the AND product of the logic inputs (Logical Multiplication). The AND gate operates such that its output is HIGH only when all its inputs are HIGH. For all other cases the AND gate output is LOW. A B Y = A. B Figure 4: The Logic Symbol and Truth Table of the AND Gate The electronic circuit for the AND gate is shown in Fig.5. Consider the first case when V 1 = V 2 = 0V. In this case both diodes will be forward-biased and conduct current. V 1 V 2 V o 0V 0V 0.7V 0V 5V 0.7V 5V 0V 0.7V 5V 5V 5V Figure 5: Two-input AND Gate Circuit

65 Experiment 8 Logic Gate Circuits The output voltage in this case will equal the voltage drop across the diodes, which is 0.7V. When V 1 = 0V and V 2 = 5V, diode D 1 will have its cathode at 0V, and thus will be forward - biased. So, current will flow from the 5V supply through R and D 1. Diode D 2 is OFF, since its cathode is at +5V. The output voltage V 0 will be 0.7V, which is the voltage drop across D 1. In the third case when V 1 = 5V and V 2 = 0V, diode D 1 will be OFF and D 2 will be ON and V 0 will equal the voltage drop across D 2 which is 0.7V. Finally, when V 1 = V 2 = 5V, both diodes will be OFF and thus no current will flow through resistor R resulting in a zero voltage across R and 5V across the output (V 0 = V CC -V R = 5V - 0 = 5V). 3. The NOT Gate Circuit The NOT gate has a single input and output. The output equals the inverse of the input or the complement of the input. Fig.6 shows the symbol for the NOT gate, which is also called an inverter. A Y = A Figure 6: The Logic Symbol and Truth Table for the NOT Gate The most widely used inverter circuit uses a bipolar transistor in the common-emitter configuration as shown in Fig.7. The input signal is applied to the base and the output is taken from the collector. V i 0V 5V V o 5V 0V Figure 7: Transistor Inverter Circuit

66 Experiment 8 Logic Gate Circuits The circuit operates so that when V i = 0V, the transistor is OFF. Therefore, I C is zero and no current flows through R C. This means that the voltage drop across R C is zero and the collector is at +5V above ground, producing V 0 = 5V. When V i = 5V, the transistor becomes ON and enters the saturation region when I B is large enough. So, the collector voltage will be V CE(sat), and this produces V 0 = V CE(sat) 0V. 1.4 The NOR Gate Circuit Figure 8 shows the logic symbol for a two-input NOR gate. The operation of the NOR gate is equivalent to the OR gate followed by an inverter. A B Y = A + B Figure 8: The Logic Symbol and Truth Table for the NOR Gate Figure 9 shows a practical electronic circuit for implementing the NOR gate. It consists of two transistors connected in parallel. V 1 V 2 V o 0V 0V 5V 0V 5V 0V 5V 0V 0V 5V 5V 0V Figure 9: The NOR Gate Circuit When V 1 = V 2 = 0V, both transistors are in the cut-off region (OFF), and hence no current flows in resistor R C. Therefore, the output voltage V 0 equals V CC and is +5V.When V 1 =0 and V 2 =5V, transistor Q 1 will be OFF and transistor Q 2 will now be ON and enters the saturation

67 Experiment 8 Logic Gate Circuits region. In this case, the current will flow in R C through transistor Q 2. The output voltage will equal the saturation voltage of Q 2 and is approximately 0V (V o =V CE2(sat) 0V). When V 1 = 5V and V 2 = 0V, the situation will be opposite to the previous case and V o = V CE2(sat) 0V. Finally, when V 1 = V 2 = 5V, both transistors will conduct, and the output voltage will equal the saturation voltage of the transistors and hence is approximately 0V (V o = V CE (sat) 0V). 5. The NAND Gate Circuit Figure 10 shows the logic symbol and the truth table of a two-input NAND gate. The operation of the NAND gate can be understood as being constituted from an AND gate followed by an inverter. A B Y = A B Figure 10: The Logic Symbol and Truth Table for the NAND Gate In Figure 11, an electronic circuit representing a NAND gate is depicted. This circuit is constituted from two transistors connected in series with two different inputs. V 1 V 2 V o 0V 0V 5V 0V 5V 5V 5V 0V 5V 5V 5V 0V Figure 11: The NAND Gate Circuit

68 Experiment 8 Logic Gate Circuits When V 1 = V 2 = 0V, both transistors are OFF and no-current flows through R C and therefore V o = V CC = 5V. When V 1 =0, and V 2 =5V transistor Q 2 will be ON, but Q 1 is OFF, and therefore no-current will flow through resistor R C and V 0 is HIGH and equals 5V. In the third case, when V 1 = 5V, and V 2 = 0V, transistor Q 1 becomes ON and Q 2 will be OFF and no current flows through R C, and hence V 0 = V CC = 5V. Finally, when V 1 = V 2 = 5V, both transistors will be ON and enter the saturation region. So, V 0 = 2V sat 0V and will be LOW. 2. Procedure 1- Connect the OR gate circuit shown in Fig.12 and verify its operation. V 1 V 2 V o 0V 0V 0V 5V 5V 0V 5V 5V Figure 12: Practical OR Gate circuit 2- Connect the AND gate circuit shown in Fig.13 and verify its truth table. V 1 V 2 V o 0V 0V 0V 5V 5V 0V 5V 5V Figure 13: Practical AND Gate Circuit

69 Experiment 8 Logic Gate Circuits 3- Connect the inverter circuit shown in Fig.14 and verify its operation. When V i = 5V (HIGH), try to measure V BE and V CE of the transistor at saturation. V i V o 0V 5V Figure 14: Practical Inverter Circuit 4- Connect the NOR gate circuit shown in Fig.15 and verify its truth table. V 1 V 2 V o 0V 0V 5V 5V 0V 5V 0V 5V Figure 15: Practical NOR Gate Circuit 5- Connect the NAND gate circuit shown in Fig.16 and verify its truth table

70 Experiment 8 Logic Gate Circuits V 1 V 2 V o 0V 0V 0V 5V 5V 0V 5V 5V Figure 16: Practical NAND Gate Circuit 3. Discussion 1- Determine the current flowing in each diode in the practical OR logic circuit of Fig.12 when both inputs are HIGH (5V). 2- What is the maximum current rating that each diode should have in the logic circuit shown below? Assume that the voltage drop across the silicon diode is 0.7V when it conducts. 3- For the inverter circuit of Fig.14, prove that the transistor is working deeply in saturation when V i = 5V. Assume that β = 150 for the BC107 NPN transistor

71 Experiment 8 Logic Gate Circuits 4- In the logic circuit shown below, what is the minimum R L that the inverter can drive without causing the output to drop below 4V when V i = 0V? 5- What is the function of the digital circuit shown below? Describe its operation briefly and find its truth table. 6- Design a NAND Gate digital circuit using an AND gate and an inverter. Describe the operation of the circuit. 7- Design a NOR gate circuit using an OR gate circuit and an inverter. Describe briefly the operation of the circuit

72 Experiment 8 Logic Gate Circuits 8- Determine the truth table of the digital circuit shown in the figure below and explain its operation

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74 Experiment 9 The Common Emitter Amplifier Experiment 9 The Common Emitter Amplifier Objectives The purpose of this experiment is to demonstrate the operation of the small signal commonemitter amplifier and investigate the factors influencing the voltage gain as well as to determine the input and output impedances. Required Parts and Equipments 1. Experimental Test Board 2. Function Generator 3. DC Power Supply 4. Two-channel Oscilloscope 5. DC Multimeter 6. BC107 NPN Silicon Transistor 7. Resistors 10 KΩ, 3.3 KΩ, 2.7 KΩ, 1 KΩ, 120 Ω. 8. Capacitors 2.2 µf and 10 µf. 1. Theory The common-emitter amplifier is characterized by the application of the input signal to the base lead of the transistor while taking the output from the collector, which always gives 180 o phase shift between the input and output signals. Figure 1 presents a schematic diagram for a typical common-emitter amplifier using the voltage-divider bias configuration. Figure 1: Schematic Diagram for a Typical Common Emitter Amplifier Circuit

75 Experiment 9 The Common Emitter Amplifier The DC coupling capacitors C in and C out are used to block the DC current and thus to prevent the source internal resistance and the load resistance R L from changing the DC bias voltages at the base and collector. Capacitor C E is a bypass capacitor for the emitter resistor R E2. Resistor R E2 is used for bias stability, while R E1 is used to minimize the change in the emitter internal AC resistance r e due to temperature effects, and thereby to obtain a stable voltage gain. The base DC voltage can be calculated approximately from the following equation assuming that β.(r E1 +R E2 ) >> R 2 : R2. VCC VB (1) R1 + R2 The emitter DC voltage is therefore: VE = VB VBE (2) The emitter DC bias current can be obtained as: VE I EQ = ICQ RE1 + RE 2 Transistor AC emitter resistance is obtained from: V T r e = (4) I EQ Where V T = 26 mv at room temperature. The quiescent DC collector-emitter voltage is calculated from: V = V I ( R + R + R 2) (5) CEQ CC CQ C E1 E (3) 1.1 Voltage Gain Analysis Figure 2 presents the AC small-signal equivalent circuit for the common emitter amplifier. From this circuit, the amplifier voltage gain can be found as: vout RC RL Av = = vin RE1 + re If the load resistor R L is removed then the voltage gain will become: (6) A v RC = R + r E1 e (7) On the other hand if the bypass capacitor C E is removed, then the voltage gain will be modified as: A v = R E1 RC RL + R + r E 2 e (8)

76 Experiment 9 The Common Emitter Amplifier Figure 2: The Small-Signal AC Equivalent Circuit for the Common Emitter Amplifier 1.2 AC Load Line and Maximum Symmetrical Swing The AC load line of the amplifier circuit can be sketched to predict the swing of the output voltage and collector current. Figure 2 shows the AC and DC load lines of the circuit. Figure 3: DC and AC Load Lines and Collector Current and Voltage Swing As shown in Fig.2, both load lines intersect at the Q-point of the transistor. The slope of the AC load line is equal to -1/R ac, where R ac is the AC equivalent resistance seen between the collector and emitter terminals. R ac can be obtained from the amplifier s small signal equivalent circuit of Fig.2. The total collector current and voltage can be expressed as the sum of the quiescent values and the AC signal quantities as shown below:

77 Experiment 9 The Common Emitter Amplifier i = I + i (9) C CE CQ v = V + v CEQ c ce (10) It can be shown that i C(max) and v CE(max) in Fig.3 are given by: V i + CEQ C(max) = ICQ Rac (11) CE(max) = VCEQ + ICQ Rac (12) v. Where: R = R R R (13) ac + E1 C L Maximum symmetrical swing in the output signal can be obtained if the Q-point bisects the AC load line. The AC load line concept can be used to predict the maximum amplitude in the output signal before clipping. 1.3 Input and Output Impedances The input and output impedances of the amplifier can be found theoretically as the Thevenin equivalent impedances at the input and output terminals respectively. For the equivalent circuit of Fig.2, the input impedance (Z in ) of the amplifier seen by the source is: Z in = R1 R2 β ( re + RE1) (14) Similarly, the output impedance (Z out ) seen from the output terminals is: Z out = R C (15) The amplifier circuit can be represented as a two-port network as illustrated in Fig.4. In this figure, A vo represents the no-load voltage gain of the amplifier, Z in is the amplifier s input impedance, and Z out is the amplifier s output impedance. Resistor R S is the internal resistance of the signal source, while R L is the load resistance. Figure 4: The Amplifier as a Two-Port Network

78 Experiment 9 The Common Emitter Amplifier The overall voltage gain of the amplifier taking the effects of R S and R L into account can be expressed as: v in A v =. vs v v out in A v = Zin Z + R in S A. R R + Z vo L. (16) L out For the input port, when R S = Z in, we have: v in = Zin Z + R in S v S 1 = v 2 S Assuming that the amplifier is connected with no-load, we have: A v v = v in out. = S v v in 1 2 A vo Thus, the input impedance can be estimated practically by inserting a variable source resistor R S in series with the source and varying it until the voltage gain of the amplifier equals half the no-load gain A vo. This value of R S represents the input impedance Z in. For the output port, when R L = Z out, and assuming that R S = 0, then we have: A v v = v out in = Avo. R R + Z L L out = 1 2 A vo So that the output impedance can be estimated practically by connecting a variable load resistor R L and varying it until the voltage gain becomes equal to half the value of the no-load gain with R S = 0. This value of R L represents the output impedance Z out. 2. Procedure 1. Connect the circuit shown in Fig.5 and measure the DC voltages V B, V E, and V C. Try to measure the DC current gain of the BC107 transistor h FE using a multi-meter. Tabulate your results as illustrated in Table-1. Table-1: Measured Quantities for the DC Bias Circuit Parameter β V B V E V C I CQ V CEQ V BEQ r e Value

79 Experiment 9 The Common Emitter Amplifier Figure 5: The DC Bias Circuit of the Common Emitter Amplifier 2. Connect the amplifier circuit shown in Fig.6, and apply a sinusoidal source signal with peak amplitude of 0.1V and frequency of 10 KHz. Display both the input (source) and output (load) signals on the oscilloscope. Try to measure the voltage gain A v, where A v = V out /V s. Figure 6: The Practical Common Emitter Amplifier Circuit 3. Remove load resistor R L and re-measure the voltage gain

80 Experiment 9 The Common Emitter Amplifier 4. Remove the bypass capacitor C E and measure the voltage gain with the load resistor R L connected at the output. Tabulate your results as shown in Table-2. Table-2: Voltage Gain for Different Cases Case Voltage Gain Normal (R L =10KΩ) No-Load (R L = ) No Bypass Capacitor 5. Increase the amplitude of the source input signal gradually until clipping occurs in the output signal. Find the maximum peak amplitude for v out and v s at the edge of clipping for the three cases illustrated in Table-3. Table-3: Peak Input and Output Voltages before Clipping Case V s(max) V out(max) Normal No-Load No Bypass Capacitor 6. Connect the circuit shown in Fig.7, where R test is a variable resistor box. This circuit is used to measure the input impedance of the amplifier. Figure 7: Test Circuit to Measure the Input Impedance of the Amplifier

81 Experiment 9 The Common Emitter Amplifier 7. Set R test = 0 Ω initially, and measure the no-load voltage gain A vo. 8. Increase R test in steps until the voltage gain becomes equal to half the no-load gain. Record this value of R test as Z in. 9. Connect the circuit shown in Fig.8 to measure the output impedance of the amplifier. Resistor R test is inserted at the output terminals instead of R L. Figure 8: Test Circuit for Measuring the Output Impedance of the Amplifier 10. Vary R test in steps until the voltage gain becomes equal to half the no-load gain. Record this value of R test as Z out. 3. Calculations and Discussion 1. Calculate the theoretical DC voltages and currents for the transistor bias circuit and compare them with the practically measured values. 2. Calculate the theoretical values of the voltage gain for the three cases and compare them with the measured quantities. 3. Sketch the AC load line for the amplifier circuit and find the theoretical maximum symmetrical swing in collector voltage v ce before clipping when R L = 10 KΩ. Determine V out(max) before clipping and compare it with the measured value. 4. Determine the theoretical value of the input impedance and compare it with the measured value. 5. Calculate the theoretical value of the output impedance and compare it with the measured value

82 Experiment 9 The Common Emitter Amplifier 6. What is the role of resistor R E1 in the amplifier circuit? Derive two expressions for the voltage gain with and without the existence of R E1 and compare between them in terms of gain value and gain stability? 7. If resistor R 2 is opened (or removed) in the circuit of Fig.5, what is its effect on the transistor circuit? Determine the collector current I C and voltage V CE in this case. 8. Calculate the current gain A i of the amplifier circuit of Fig

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84 Experiment 10 The Common Base Amplifier Experiment 10 The Common Base Amplifier Objectives The purpose of this experiment is to test the common base amplifier circuit and evaluate its characteristics. Required Parts and Equipments 1. Experimental Test Board. 2. DC Power Supply. 3. Function Generator. 4. Two-Channel Oscilloscope. 5. Digital Multimeter. 6. NPN Silicon Transistor, 2N Resistors 10 kω, 3.3 kω, 1.5 kω, 1 kω. 8. Capacitors 2.2 µf, and 10 µf. 1. Theory The common base amplifier is shown in the schematic diagram of Fig.1. Figure 1: The Common Base Amplifier Topology The DC biasing circuit uses one power supply and is identical to that of the common emitter amplifier with voltage-divider biasing. Thus, the same technique used for β-independent operating point biasing in the common emitter amplifier will work for this application. As shown from this circuit, the input signal is coupled to the emitter of the transistor through the DC blocking capacitor C in, and the output signal is taken from the collector via the coupling capacitor C out. The base capacitor C B is used to bypass the base resistors R 1 and R 2, thereby putting the base at AC ground

85 Experiment 10 The Common Base Amplifier The Q-point point (V CBQ, I CQ ) of the transistor can be obtained by evaluating the base voltage, V B, assuming that I B is negligible when compared with the current flowing in resistor R 2. This condition can be justified if β.r E 10 R 2. On this basis, the DC voltage at the base is approximated by: V B R2. VCC = (1) R + R 1 2 The emitter voltage, V E, is given by: V E = V V (2) B BE The emitter quiescent current, I EQ, can be calculated from: V E I EQ = (3) RE ICQ I EQ (4) The collector voltage, V C, is determined from: V = V I. R (5) C CC CQ C On the other hand, the collector-base quiescent voltage, V CBQ, is determined from: V CBQ = V V (6) C B The emitter small signal AC resistance is found from: V T r e = (7) I EQ Where V T is the thermal voltage and equals to 26 mv at room temperature. The small signal AC equivalent circuit of the amplifier is presented in Fig.2. Figure 2: The Small Signal Equivalent Circuit of the Common Base Amplifier

86 Experiment 10 The Common Base Amplifier The theoretical value of the voltage gain can be estimated from the small signal equivalent circuit to be: A R R C L v (8) re As indicated from the voltage gain equation, the output signal is in-phase with the input signal. The input impedance seen from the signal source is determined as: Z = R r (9) in E e The output impedance seen from the load terminals is given by: Z out = R C (10) It is important to remember that the common base amplifier provides no current gain. On the other hand, the input impedance is very low which may load the signal source resulting in a reduction of the net input voltage delivered to the amplifier especially when the source resistance is significantly high. In this case, the overall voltage gain of the amplifier, taking the effect of source resistance R s into account, will be: A vs v v out out in C L in = =. =. (11) s v v in v v s R R r e Z Z + R in s 2. Procedure 1. Connect the DC bias circuit shown in Fig.3. Figure 3: The Practical Common Base Bias Circuit

87 Experiment 10 The Common Base Amplifier 2. Measure the DC voltages V B, V E, and V C using a digital voltmeter. Try to measure the transistor current gain β with the aid of a multi-meter. Tabulate your results as shown in Table-1. Table-1: Measured Bias Circuit Parameters Parameter β V B V E V C I CQ V CBQ V BEQ r e Value 3. Connect the amplifier circuit shown in Fig.4. Figure 4: The Practical Common Base Amplifier Circuit 4. Apply a sinusoidal source signal with 0.1V p-p amplitude, and frequency of 10 KHz (In this case V s(p-p) = 0.1V). Display the input signal at channel 1 of the oscilloscope, and the output signal at channel 2. Measure the amplitudes of both signals and determine the practical voltage gains A v and A vs as indicated in Table-2. Table-2: Voltage Gain Measurement Quantity Value V in(p-p) V out(p-p) A v = V out(p-p) /V in(p-p) A vs = V out(p-p) /V s(p-p)

88 Experiment 10 The Common Base Amplifier 3. Calculations and Discussion 1. Determine the theoretical bias point of the transistor and compare it with the measured value. 2. Calculate the theoretical voltage gain A v of the amplifier, and compare it with the measured value. 3. Justify the difference between the measured value of A v and that of A vs. 4. Determine the input impedance Z in and the output impedance Z out for the amplifier. 5. Estimate the value of the internal source resistance R s from A v and A vs. 6. Assume that the DC coupling capacitor C out in Fig.4 is shorted. What DC voltage will appear at the collector of the transistor in this case? 7. If capacitor C B in the circuit of Fig.4 is opened, what is its effect on the voltage gain and the input impedance of the amplifier? 8. What is the main disadvantage of the common base amplifier when compared to the common emitter amplifier?

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90 Experiment 11 The Emitter Follower Experiment 11 The Emitter Follower Objectives The purpose of this experiment is to examine the operation of the emitter follower and evaluate its characteristics. Required Parts and Equipments 1. Experimental Test Board. 2. DC Power Supply. 3. Function Generator. 4. Two-Channel Oscilloscope. 5. Digital Multimeter. 6. PNP Silicon Transistor, BC Resistors 10 kω, 2.2 kω. 8. Capacitors 10 µf. 1. Theory In the common collector amplifier, the output signal is taken from the emitter while the input signal is applied to the base of the BJT. This amplifier is usually referred to as an emitter follower. In this amplifier, the output voltage (emitter voltage) is always slightly less than the input voltage (base voltage) in magnitude, and is in-phase with it. The voltage gain is therefore approximately equal to unity. So, the emitter voltage always follows the base voltage and hence the circuit is well-known as the emitter follower. Figure 1 shows a schematic diagram for a typical emitter follower using a PNP transistor. Figure 1: Schematic Diagram for a Typical Emitter Follower Circuit

91 Experiment 11 The Emitter Follower The base bias voltage V B can be approximately calculated from: V B V. R R + R EE 2 (1) 1 2 The emitter DC voltage is thus given by: V = V + V (2) E B EB Where V EB = -V BE 0.7V for Silicon. In this case V E > V B. The emitter quiescent current I EQ is given by: I EQ V V R EE E = (3) E The collector current I C is approximately equal to emitter current I E. The emitter-collector voltage V EC is equal to the emitter voltage as the collector is grounded in this circuit. Thus: V EC = V E (4) Where V C = 0. Note that in PNP transistor biasing V E > V B > V C. The emitter small-signal resistance can be obtained from: V T r e = (5) I EQ Where V T is the thermal voltage and equals to 26 mv at room temperature. Figure 2 presents the small-signal equivalent circuit of the amplifier. Figure 2: The Small Signal Equivalent Circuit of the Emitter Follower

92 Experiment 11 The Emitter Follower The output signal v o is related with the input signal v i according to the relation: v = v + v (6) o i be Since v be is a very small signal, therefore v o follows v i in magnitude and phase. The voltage gain of the amplifier can be derived to be: A v v = v o i = RL RE R R + r L E e (7) In this case the signal generator internal resistance is neglected. The input impedance seen from the input terminal can be proved to be: Z i = R1 R2 ( β ( re + RE RL) ) (8) On the other hand, the output impedance seen from the load resistance after neglecting the internal resistance of the source generator is: Z = R r (9) o E e As indicated in the above equations, the emitter follower has large input impedance and very low output impedance and can therefore be used as a buffer stage between a high output impedance amplifier and a low resistance load. 2. Procedure 1. Connect the DC bias circuit shown in Figure 3. Figure 3: The Practical Emitter Follower Bias Circuit

93 Experiment 11 The Emitter Follower 2. Measure the DC voltages V B and V E using a digital voltmeter. Try to measure the transistor current gain β with the aid of a multi-meter. Tabulate your results as shown in Table-1. Table-1: Measured Bias Circuit Parameters Parameter β V B V E V EBQ V ECQ I EQ r e Value 3. Connect the amplifier circuit shown in Figure 4. Figure 4: The Practical Emitter Follower Circuit 4. Apply a sinusoidal signal with amplitude of 2V p-p and frequency of 10 KHz. Display the input signal on channel 1, and the output signal on channel 2. Try to measure the amplitude of the output signal before and after removing R L. 5. Tabulate your results as shown in Table-2. Table-2: Measured Voltage Gain R L = 10KΩ R L = V o(p-p) A v = V o(p-p) /V s(p-p)

94 Experiment 11 The Emitter Follower 3. Calculations and Discussion 1. Calculate the Q-Point parameters of the circuit and compare them with the measured values. 2. Sketch the DC load line of the transistor (I E versus V EC ) indicating the position of the Q-Point. 3. Evaluate the theoretical values of the voltage gain for both cases before and after removing the load resistor, and compare them with the measured quantities. 4. Determine the input and output impedances of the amplifier. 5. What is the effect of adding a collector resistor R C = 1KΩ on the Q-Point and the voltage gain of the amplifier? 6. Derive an equation for the emitter quiescent current I EQ if resistor R 1 in Figure 1 is removed. 7. Modify the circuit of Figure 1 if an NPN transistor is to be used instead of the PNP transistor. 8. Derive an equation for the current gain of the amplifier circuit shown in Figure

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96 Experiment 12 Amplifier Frequency Response Experiment 12 Amplifier Frequency Response Objectives The purpose of this experiment is to evaluate the frequency response of a common emitter amplifier. Required Parts and Equipments 1. Experimental Test Board 2. Signal Generator 3. Two-Channel Oscilloscope 4. Digital Multimeter 5. NPN Silicon Transistor BC Resistors 10 KΩ, 3.3 KΩ, 2.7 KΩ, 1 KΩ, 120 Ω. 7. Capacitors 2.2 µf and 10 µf. 1. Theory All amplifiers have a finite bandwidth. The low cutoff frequency can in some cases extend down to DC and is a parameter under direct control of the designer. The ultimate high frequency limit is determined by the physical characteristics of the components and the construction of the circuit. A typical BJT common emitter amplifier is shown in Fig.1. The input signal source and load resistor are capacitively coupled to the amplifier via capacitors C c1 and C c2 respectively. The coupling capacitors C c1 and C c2, emitter bypass capacitor C E, and internal transistor capacitances shape the frequency response of the amplifier. Figure 1: Typical Common Emitter Amplifier

97 Experiment 12 Amplifier Frequency Response A typical amplifier frequency response curve is shown in Fig.2. This curve presents the magnitude of the voltage gain versus frequency. The voltage gain in decibels is calculated as: Figure 2: Typical Amplifier Frequency Response A db) = 20log( A ) (1) v( v In Fig.2, A vm represents the mid-band (or mid range) gain of the amplifier. For the circuit of Fig.1, it is given by: ( RC RL ) Avm = (2) re + RE1 At the lower cut-off frequency f L and upper cut-off frequency f H, the voltage gain of the amplifier drops to of its mid-band value (or -3dB below the maximum value). The frequency f L is dependent on the coupling and bypass capacitors, while the frequency f H is determined by the transistor internal capacitances (mainly C bc and C be ). The bandwidth of the amplifier is the difference between f H and f L : BW = f H f L (3) As the signal frequency drops below mid-band, the impedances of the coupling and bypass capacitors will increase, resulting in a reduction of the voltage gain. In other words, the low frequency response of the amplifier is determined by the capacitors C c1, C c1, and C E. Each one of the three capacitors makes a contribution to the overall frequency response of the amplifier. Each capacitor behaves like a capacitor in a high pass filter. Therefore, each one will contribute with a cut-off frequency of its own. The cut-off frequency due to the input coupling capacitor C c1 is f L1, and is calculated from the following equation when ignoring the source resistance R s : 1 f = L1 2π. Zin. C (4) c1 Where Z in is the input impedance of the amplifier and is given by:

98 Experiment 12 Amplifier Frequency Response Z in = R1 R2 ( β ( re + RE1)) (5) The cut-off frequency due to the output coupling capacitor C c2 is f L2, and is given by: f L2 = 2 π ( R C 1 + R L ). C c2 (6) Finally, the cut-off frequency due to the emitter bypass capacitor C E is f L3, and is given by: f L3 1 = (7) 2π. Z. C e E Where Z e is the effective emitter impedance seen from the terminals of capacitor C E, and is given by: Z = + (8) e ( RE1 re ) RE 2 In equation (8), the source resistance R s is so small to be ignored. Among the three corner frequencies, f L3 will usually have the largest value. The low cut-off frequency of the amplifier can be approximated as the largest value of the three individual lower corner frequencies: f L = max( fl 1, fl2, fl3) (9) The high frequency response of the amplifier is determined by the internal parasitic capacitances of the transistor. These capacitances, C be and C bc, are proportional to the physical area of the junctions and inversely proportional to the width of the depletion region. This means that the capacitance is a function of bias conditions. A forward biased junction has relatively high capacitance (tens to over one hundred pico-farads) because the width of the depletion region is narrow. A reverse biased junction has relatively low capacitance (typically less than ten pico-farads) because the width of the depletion region is wide. Two corner frequencies are existed due to the total transistor parasitic capacitances at input (base) and output (collector). The first corner frequency f H1 is inversely proportional to C be +C M, where C M is known as the Miller capacitance and is given by: C = C 1+ A ) (10) M bc.( vm The second corner frequency f H2, on the other hand, is inversely proportional to C bc. The corner frequencies f H1 and f H2 can be determined from the high-frequency equivalent circuit of the amplifier. The high cut-off frequency of the amplifier can be approximated as the lowest value of the two individual upper corner frequencies:

99 Experiment 12 Amplifier Frequency Response f H = min( fh1, fh 2) (11) The frequency at which the amplifier s gain drops to 1 (or 0 db) is called the unity-gain frequency and is denoted by f T. The significance of f T is that it always equals the product of the mid-band gain times the bandwidth of the amplifier. f = A BW (12) T vm. 2. Procedure 1. Connect the circuit shown in Fig.3 and measure the DC voltages V B, V E, and V C. Try to measure the DC current gain of the BC107 transistor h FE using a multi-meter. Tabulate your results as illustrated in Table-1. Table-1: Measured Quantities for the DC Bias Circuit Parameter β V B V E V C I CQ V CEQ V BEQ r e Value Figure 3: The DC Bias Circuit of the Amplifier 2. Connect the amplifier circuit shown in Fig.4. Apply a sinusoidal source signal with peakto-peak amplitude of 0.2V and vary the frequency from 50 Hz to 10 MHz in several steps. Display both the input (source) and output (load) signals on the oscilloscope. Try to measure the amplitude of the output signal, and the amplifier gain as unit-less value, and in db as well. Tabulate your results as illustrated in Table

100 Experiment 12 Amplifier Frequency Response Figure 4: The Practical Amplifier Circuit Table-2: Measured Voltage Gain versus Frequency Frequency (Hz) V out(p-p) A v =V out /V s A v (db)=20log(a v ) K 2K 4K 8K 10K 20K

101 Experiment 12 Amplifier Frequency Response Table-2: Continued Frequency (Hz) V out(p-p) A v =V out /V s A v (db)=20log(a v ) 50K 100K 200K 500K 600K 800K 1M 2M 4M 6M 8M 10M 3. Calculations and Discussion 1. Sketch the frequency response of the amplifier on a semi-log paper. 2. From the frequency-response plot, determine the -3 db cut-off frequencies f L and f H of the amplifier, and find the bandwidth. 3. Calculate the lower break frequencies f L1, f L2, and f L3 due to the coupling and bypass capacitors. Find the dominant corner frequency and compare it with the measured value of f L. 4. From your plot, determine the unity-gain frequency f T. 5. Calculate the theoretical value of the mid-band gain, and compare it with the practically measured value. 6. State how you can reduce the overall bandwidth of the amplifier practically. 7. What is meant by Miller input capacitance, and what are the factors on which it depends? 8. What is meant by one decade, and one octave?

102 Experiment 13 JFET Characteristics Experiment 13 JFET Characteristics Objectives The purpose of this experiment is to determine and sketch the characteristics of the JFET and to find its parameters. Required Parts and Equipments 1. Experimental Test Board. 2. Dual Polarity Variable DC Power Supply 3. Digital Multimeters. 4. N-Channel JFET 2N Resistors 1 MΩ, 100 Ω. 1. Theory The Junction Field Effect Transistor (JFET) is a three-terminal device with one terminal (called the gate) capable of controlling the current between the other two terminals (drain and source). The primary difference between FET and BJT transistors is the fact that the BJT transistor is a current-controlled device, while the JFET transistor is a voltage-controlled device. The FET transistor is a unipolar device depending on either electron conduction (Nchannel JFET) or hole conduction (P-channel JFET). In contrast, the BJT transistor is a bipolar device, meaning that the conduction depends on two charge carriers (electrons and holes) in the same time. Another difference between two devices is the high input impedance of the JFET when compared with the BJT. The input impedance is usually larger than 1 MΩ. However, typical AC voltage gains for BJT amplifiers are greater than those for FET amplifiers. Furthermore, FETs are more temperature stable than BJTs and are usually smaller in size, making them particularly useful in integrated circuit chips. The basic construction of an N-channel JFET is shown in Fig.1 together with its symbol. Figure 1: N-Channel JFET Structure and Symbol

103 Experiment 13 JFET Characteristics The drain current (I D ) of the JFET is controlled by the application of reverse-biased voltage between gate and source terminals (V GS ). The relationship between I D and V GS is defined by the well-known Shockley s equation: 2 V 1 = GS I D I DSS (1) VP Where V P is called the pinch-off voltage and I DSS is known as the drain saturation current. When V GS = V P then I D = 0, and the FET is in the cut-off region. Equation (1) indicates that the FET is a square-law device. The relation between I D and V GS is also referred as the transfer characteristic of the JFET and is presented in Fig.2. This curve is obtained by varying the negative voltage V GS between V P and 0 and measuring I D for a given value of the drain to source voltage (V DS ). Equation (1) can approximate this curve to an acceptable level. Figure 2: The Transfer Characteristics of the JFET On most specification sheets, the pinch-off voltage is specified as V GS(off) rather than V P as shown in Fig.2. In this case, V GS(off) represents the cut-off voltage. The circuit used to obtain the JFET characteristics is shown in Fig.3. To obtain the transfer characteristic, the drain supply voltage V DD should be maintained at a certain value, and the gate supply voltage is adjusted to several negative values while recording I D in each step. Figure 3: A Test Circuit for Getting JFET Characteristics

104 Experiment 13 JFET Characteristics On the other hand, to sketch the drain characteristic, the gate-source voltage V GS must be kept at a certain level while varying V DS in several steps and recording I D in each step. Figure 4 shows the drain (or output) characteristics of the JFET. Figure 4: Typical JFET Drain Characteristics As shown from Fig.4, for small values of V DS (V DS < V P ) the drain current increases linearly with V DS. This region is called the linear or Ohmic region in which the JFET behaves as a voltage-controlled resistor. For larger values of V DS (V DS > V P ), the drain current (I D ) is approximately constant and enters the saturation region. The transconductance of the JFET (g m ) is defined as the change in drain current ( I D ) for a given change in gate-to-source voltage ( V GS ) with the drain-to-source voltage (V DS ) kept constant. It has the unit of siemens (S). g m I V D = (2) GS V DS = const. Because the transfer characteristic curve for a JFET is nonlinear, g m varies in value depending on the location on the curve as depicted in Fig.5. A datasheet normally gives the value of gm measured at V GS = 0, which is referred as g mo. Theoretically, gm can be calculated at any point on the transfer characteristic curve from the following equation: V = GS gm gmo 1 (3) VP Where g mo is found from:

105 Experiment 13 JFET Characteristics 2I DSS g mo = (4) V P 2. Procedure Figure 5: Graphical Determination of the JFET Transconductance 1. Connect the circuit shown in Fig.6. Figure 6: The Test Circuit for Getting JFET Characteristics 2. Adjust V DD so that V DS = 5V, and vary V GG to change V GS from 0V to -3V in different steps recording I D for each step. Repeat with V DS = 10V. Tabulate your results as shown in Table

106 Experiment 13 JFET Characteristics Table 1: Recorded Data for the JFET Transfer Characteristics V DS = 5V V DS = 10V V GS (V) I D (ma) V GS (V) I D (ma) Set V GG to 0V so that V GS = 0V and vary V DD so that V DS changes in several steps recording I D in each step. Repeat with V GS = -1V. Tabulate your results as illustrated in Table

107 Experiment 13 JFET Characteristics Table 2: Recorded Data for the JFET Drain Characteristics V GS = 0V V GS = -1V V DS (V) I D (ma) V DS (V) I D (ma) Calculations and Discussion 1. From the obtained data, sketch the transfer characteristics of the JFET. 2. Determine the values of V P and I DSS from the plot. 3. From the sketched curves, find the value of the JFET transconductance at V GS = -1V and V GS = -2V for V DS = 10V and compare between the two values. 4. Calculate theoretically the value of g m at V GS = -1V and V GS = -2V when V DS = 10V and compare them with the measured quantities. 5. Sketch the drain characteristics of the JFET from the obtained data. 6. From the linear region of the drain characteristic, determine the value of the drain to source resistance r ds when V GS = 0V. 7. Determine the value of r ds in the saturation region of the JFET drain characteristic when V GS = 0. Compare this value with that obtained in step Compare between the JFET and the BJT

108 Experiment 14 The Common Source Amplifier Experiment 14 The Common Source Amplifier Objectives The purpose of this experiment is to test the performance of the common source amplifier using the self-bias circuit. Required Parts and Equipments 1. Experimental Test Board. 2. Dual Polarity Variable DC Power Supply 3. Digital Multimeters. 4. Dual-Channel Oscilloscope. 5. Function Generator. 6. N-Channel JFET 2N Resistors 1 MΩ, 1 kω, 3.3 kω. 8. Capacitors 2.2 µf, 10 µf. 1. Theory The common source amplifier configuration is widely used amongst other JFET configurations and can provide both high voltage gain and large input impedance. In this configuration, the input signal is applied to the gate and the output signal is taken from the drain, while the source terminal being the reference or common. In order to work as an amplifier, the JFET should be properly biased by setting the gate-source voltage which results in the required drain current. The N-channel JFET requires that the gate-source voltage always be less negative than the pinch-off voltage, but less than zero. Since virtually no gate current flows due to the JFET s high input impedance, the gate voltage is essentially at ground level. Consequently, using only a drain-supply voltage, the required negative quiescent gate-source voltage is developed by the voltage drop across the source resistor of the self-bias circuit shown in Fig.1. This circuit is one of the simplest and practical bias circuits for JFET amplifiers in which a single power supply is used. In this circuit, the gate voltage is zero. V = 0 (1) G Thus, the gate-source voltage is given by: V = I. R (2) GS D S Where the drain current is given by: -107-

109 Experiment 14 The Common Source Amplifier Figure 1: The Self-Bias JFET Circuit 2 V 1 = GS I D I DSS (3) VP Solving equations (2) and (3) simultaneously will give both I DQ and V GSQ. The drain-source voltage is given by: V DS = VDD I D.( RD + RS ) (4) A typical common-source amplifier circuit is shown in Fig.2. In this circuit, capacitors C c1 and C c2 are DC blocking capacitors, while C S is a bypass capacitor for the source resistor R S. Figure 2: A Typical Common Source Amplifier -108-

110 Experiment 14 The Common Source Amplifier The small-signal approximate equivalent circuit for the amplifier of Fig.2 is presented in Fig.3. Figure 3: The Simplified Small-Signal Equivalent Circuit of the Amplifier The transconductance of the JFET at the Q-point is derived as: di D V gm = gmo 1 dvgs V = GS Q po int P (5) Where g mo is given by: g mo 2I V DSS = (6) P The voltage gain of the amplifier can be derived from the equivalent circuit of Fig.4: A v Vout = = gm.( RD RL ) (7) V S It can be shown that when the source bypass capacitor C S is removed, the voltage gain will become: A v g.( R R ) 1+ g. R m D L = (8) m S The input impedance of the amplifier seen from the gate terminal is: Z in = R G (9) And the output impedance seen from the output terminals is: Z out = R D (10) -109-

111 Experiment 14 The Common Source Amplifier 2. Procedure 1. Connect the test circuit shown in Fig.4 to measure I DSS. Increase the supply voltage until I D no longer increases. This level of drain current is recorded as I DSS. Figure 4: Test Circuit for Measuring I DSS 2. Connect the test circuit shown in Fig.5 to measure V P. The gate supply voltage V GG is adjusted from 0 to larger negative values until the drain current I D just reaches 0. The voltage V GS to just cause the drain current to reach 0 is the measured value of V P. Tabulate your results as shown in Table-1. Figure 5: Test Circuit for Measuring V P Table-1: Measured JFET Parameters Device Parameter I DSS V P Value -110-

112 Experiment 14 The Common Source Amplifier 3. Connect the JFET self-bias circuit shown in Fig.6 and measure the DC voltages V G, V S, and V D with the aid of a digital multi-meter. Determine V GSQ, I DQ, V DSQ, and g m at the Q-point. Tabulate your results as illustrated in Table-2. Figure 6: The Practical Bias Circuit of the Amplifier Table-2: Measured Bias Circuit Parameters Quantity V G V S V D V GS I D V DS g m Value 4. Connect the amplifier circuit shown in Fig.7. Sketch the input and output signals and determine the voltage gain of the circuit in three cases as illustrated in Table-3. Table-3: Measured Voltage Gain Conditions Case Voltage Gain (v out /v s ) Normal Case No-Load Condition No-Source Bypass Capacitor Condition -111-

113 Experiment 14 The Common Source Amplifier Figure 7: The Practical Common-Source Amplifier Circuit 3. Calculations and Discussion 1. Using the measured device parameters I DSS and V P, calculate the theoretical Q-point values of I DQ and V GSQ and compare them with the measured quantities. 2. Calculate the amplifier voltage gain theoretically for the three conditions and compare them with the measured values. 3. Derive an expression for the voltage gain when the source capacitor C S is removed. Sketch the small signal equivalent circuit of the amplifier in this case. 4. Indicate graphically the effect of increasing the source resistor R S on the Q-point of the JFET. 5. Determine the input and output impedance of the amplifier in both cases of holding and removing the source bypass capacitor C S. 6. Determine the DC power dissipation in the JFET connected in the amplifier circuit of Fig What is the effect of increasing the source resistance R S on the voltage gain of the amplifier circuit? 8. Suggest another bias circuit for the JFET and evaluate its performance

114 Appendix-A Resistor Color Code Chart

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116 Appendix-B Data Sheets for Active Components - The small signal silicon diode 1N The general purpose rectifier diode 1N The Zener diode BZX55C5V1 - The NPN general purpose transistor 2N The NPN general purpose transistor BC107 - The NPN switching transistor 2N The PNP general purpose transistor BC178 - The N-Channel JFET transistor 2N

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118 Diodes Switching diode 1N4148 / 1N4150 / 1N4448 / 1N914B This product is available only outside of Japan. 1N4148 / 1N4150 / 1N4448 / 1N914B!Applications High-speed switching!external dimensions (Units : mm)!features 1) Glass sealed envelope. (GSD) 2) High speed. 3) High reliability. C CATHODE BAND (BLACK) Type No. A 29±1 3.8±0.2 29±1 φ 0.5±0.1 φ 1.8±0.2!Construction Silicon epitaxial planar ROHM : GSD EIAJ : JEDEC : DO-35!Absolute maximum ratings (Ta = 25 C) Type VRM (V) VR (V) IFM (ma) IO (ma) IF (ma) IFSM 1µs (A) P (mw) Tj ( C) Topr ( C) Tstg ( C) 1N ~ ~+200 1N ~ ~+200 1N4448 (1N914B) ~ ~+200!Electrical characteristics (Ta = 25 C) 10mA VF 200mA 1N N N (IN914B) The upper figure is the minimum VF and the lower figure is the maximum VF 250mA BV (V) Min. IR (µa) Max. Cr (pf) @25 C VR=6V VR=0 IF=10mA 5µA 100µA VR (V) VR (V) f=1mhz RL=100Ω

119 Diodes 1N4148 / 1N4150 / 1N4448 / 1N914B!Electrical characteristic curves (Ta = 25 C) FORWARD CURRENT : IF (ma) Ta=125 C Ta=75 C Ta=25 C Ta= 25 C FORWARD VOLTAGE : VF (V) Fig. 1 Forward characteristics REVERSE CURRENT : IR (na) C 70 C 50 C Ta=25 C REVERSE VOLTAGE : VR (V) Fig. 2 Reverse characteristics CAPACITANCE BETWEEN TERMINALS : CT (pf) f=1mhz REVERSE VOLTAGE : VR (V) Fig. 3 Capacitance between terminals characteristics REVERSE RECOVERY TIME : trr (ns) 2 1 VR=6V Irr=1/10IR SURGE CURRENT : Isurge (A) PULSE Single pulse FORWARD CURRENT : IF (ma) Fig. 4 Reverse recovery time characteristics PULSE WIDTH : Tw (ms) Fig. 5 Surge current characteristics 0.01µF D.U.T. PULSE GENERATOR OUTPUT 50Ω 5Ω 50Ω SAMPLING OSCILLOSCOPE INPUT 100ns OUTPUT trr 0 IR 0.1IR Fig. 6 Reverse recovery time (trr) measurement circuit

120 1N4001-1N4007 1N4001-1N4007 Features Low forward voltage drop. High surge current capability. DO-41 COLOR BAND DENOTES CATHODE General Purpose Rectifiers (Glass Passivated) Absolute Maximum Ratings* T A = 25 C unless otherwise noted Symbol Parameter Value Units V RRM Peak Repetitive Reverse Voltage V I F(AV) Average Rectified Forward Current,.375 " lead T A = 75 C 1.0 A I FSM Non-repetitive Peak Forward Surge Current 30 A 8.3 ms Single Half-Sine-Wave T stg Storage Temperature Range -55 to +175 C T J Operating Junction Temperature -55 to +175 C *These ratings are limiting values above which the serviceability of any semiconductor device may be impaired. Thermal Characteristics Symbol Parameter Value Units P D Power Dissipation 3.0 W R θja Thermal Resistance, Junction to Ambient 50 C/W Electrical Characteristics T A = 25 C unless otherwise noted Symbol Parameter Device Units V F Forward 1.0 A 1.1 V I rr Maximum Full Load Reverse Current, Full 30 µa Cycle T A = 75 C I R Reverse rated V R T A = 25 C T A = 100 C µa µa C T Total Capacitance V R = 4.0 V, f = 1.0 MHz 15 pf 2001 Fairchild Semiconductor Corporation 1N4001-1N4007, Rev. C

121 Typical Characteristics Average Rectified Forward Current, I F [A] SINGLE PHASE HALF WAVE 60HZ RESISTIVE OR INDUCTIVE LOAD.375" 9.0 mm LEAD LENGTHS Ambient Temperature [ºC] Figure 1. Forward Current Derating Curve General Purpose Rectifiers (Glass Passivated) (continued) Forward Current, I F [A] T J = 25 º C Pulse Width = 300µS 2% Duty Cycle Forward Voltage, V F [V] Figure 2. Forward Voltage Characteristics 1N4001-1N4007 Peak Forward Surge Current, I FSM [A] Number of Cycles at 60Hz Figure 3. Non-Repetitive Surge Current Reverse Current, I R [ma] T J = 150 º C T J = 100 º C T J = 25 º C Percent of Rated Peak Reverse Voltage [%] Figure 4. Reverse Current vs Reverse Voltage 2001 Fairchild Semiconductor Corporation 1N4001-1N4007, Rev. C

122 BZX55C 3V3 - BZX55C 33 Series N Discrete POWER & Signal Technologies BZX55C 3V3-33 Series Half Watt Zeners Absolute Maximum Ratings* TA = 25 C unless otherwise noted Tolerance: C = 5% Parameter Value Units Storage Temperature Range -65 to +200 C Maximum Junction Operating Temperature C Lead Temperature (1/16 from case for 10 seconds) C Total Device Dissipation 500 mw Derate above 25 C 4.0 mw/ C Surge Power** 30 W *These ratings are limiting values above which the serviceability of the diode may be impaired. **Non-recurrent square wave PW= 8.3 ms, TA= 50 degrees C. DO-35 NOTES: 1) These ratings are based on a maximum junction temperature of 200 degrees C. 2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations. Electrical Characteristics TA = 25 C unless otherwise noted Device BZX55C 3V3 BZX55C 3V6 BZX55C 3V9 BZX55C 4V3 BZX55C 4V7 BZX55C 5V1 BZX55C 5V6 BZX55C 6V2 BZX55C 6V8 BZX55C 7V5 BZX55C 8V2 BZX55C 9V1 BZX55C 10 BZX55C 11 BZX55C 12 BZX55C 13 BZX55C 15 BZX55C 16 BZX55C 18 BZX55C 20 BZX55C 22 BZX55C 24 BZX55C 27 BZX55C 30 BZX55C 33 V Z (V) MIN MAX Z Z (Ω) ZT Z I ZT V I R I (ma) (Ω) (ma) (V) (µa) (µa) T A= 150 C V F Foward Voltage = 1.0 V I F = 100 ma for all BZX 55 series T C (%/ C) I ZM (ma)

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124 2N3904 / MMBT3904 / PZT3904 NPN General Purpose Amplifier Features This device is designed as a general purpose amplifier and switch. The useful dynamic range extends to 100 ma as a switch and to 100 MHz as an amplifier. EBC 2N3904 MMBT3904 PZT3904 Absolute Maximum Ratings* T a = 25 C unless otherwise noted C TO-92 SOT-23 B SOT-223 Mark:1A October 2011 Symbol Parameter Value Units V CEO Collector-Emitter Voltage 40 V V CBO Collector-Base Voltage 60 V V EBO Emitter-Base Voltage 6.0 V I C Collector Current - Continuous 200 ma T J, T stg Operating and Storage Junction Temperature Range -55 to +150 C * These ratings are limiting values above which the serviceability of any semiconductor device may be impaired. NOTES: 1) These ratings are based on a maximum junction temperature of 150 degrees C. 2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations. E C B C E 2N3904 / MMBT3904 / PZT3904 NPN General Purpose Amplifier Thermal Characteristics T a = 25 C unless otherwise noted Symbol P D Parameter Total Device Dissipation Derate above 25 C Max. 2N3904 *MMBT3904 **PZT3904 * Device mounted on FR-4 PCB 1.6" X 1.6" X 0.06". ** Device mounted on FR-4 PCB 36 mm X 18 mm X 1.5 mm; mounting pad for the collector lead min. 6 cm , Units mw mw/ C R θjc Thermal Resistance, Junction to Case 83.3 C/W R θja Thermal Resistance, Junction to Ambient C/W 2011 Fairchild Semiconductor Corporation 2N3904 / MMBT3904 / PZT3904 Rev. B0 1