1 UNIT 4 BIASING AND STABILIZATION TRANSISTOR BIASING: To operate the transistor in the desired region, we have to apply external dec voltages of correct polarity and magnitude to the two junctions of the transistor. This is known as biasing of the transistor. Since DC voltages are used to bias the transistor, it is called as DC biasing. DC OPERATING POINT (OR) QUIESCENT POINT: Application of DC voltages (bias) establishes a fixed level of current and voltage. For transistor amplifiers the resulting DC current and voltage establish an operating point on the characteristics that define the region that will be employed for amplification of the applied signal. Since the operating point is a fixed point on the characteristics, it is called as Quiescent point (Q - Point). Note: Quiescent Still inactive and quiet. NEED FOR BIASING: To operate the transistor in the desired region. The DC sources supplies the power to the transistor circuit, to get the output signal power greater than the input signal power. LOAD LINE: It is a straight line drawn on the characteristic curve with two end points A and B. It is used to fixed the operating point of a transistor. TYPES OF LOAD LINE: DC load line AC load line
2 DC LOAD LINE: Consider the common emitter amplifier circuit shown.
3 For that, Apply KVL to the collector circuit. W.k.t the equation for straight line is Here 1 From equation (1), 2 A: A is a point on X-axis Put Y = 0, ie in equation 2 =0mA B: B is a point of Y axis Put X = 0, ie in equation 2 Finally plot the points A & B on the curve. Step(4): Select the curve so as to find the Q point. : Apply KVL to base circuit. For silicon transistor If is known, the value of can be found.
4 Example:,, Conclusion: Thus the intersection of DC load line and curve is called as Q Point. Problem:
5 Solution: Step(i): Remove the AC source and redraw the circuit. Step(2): A & B points: A & B: Apply KVL to collector circuit. From CKT, Since A is a point of X-axis, =0 (Point A) Since B is a point of Y-axis,
6 (Point B) Step (3): curve. Apply KVL to base circuit. ) Step (4): SELECTION OF OPERATING POINT FOR A.C INPUT SIGNAL: The operating point can be selected at three different positions on the DC load line: Near saturation region Near cut-off region At the centre ie. Active region
7 Case (1): NEAR SATURATION REGION: If the biasing circuit is designed to fix the Q point (P) very near to saturation region, the collector current is clipped at the positive half cycle. Thus because of the distortions present at the collector current, point P is not the suitable operating point. Case(ii): NEAR CUT-OFF REGION: If the biasing circuit is designed to fix the Q point (R) near cut-off region, the collector current is clipped at the negative half cycle. Thus Q-point R is also not a suitable operating point.
8 Case(iii): AT ACTIVE REGION: If the Q point is fixed at the centre of the active region, the output signal is sinusoidal waveform without any distortion. Thus the point Q is the best operating point. Bias stabilization: While designing the biasing circuit, case should be taken so that the operating point will not shift into an undesirable region (ie into cut-off or saturation region) Factors to be considered while designing the basing circuit: Temperature dependent factors ( ) Transistor current gain The flow of current in the circuit produces heat at the junctions. This heat increases the temperature at the junctions. Since the minority carriers are temperature dependent ( gets doubled for energy 10 o C raise in temperature), they increase with the temperature. This in turn increase the and hence Q point gets shifted changes with temperature at the rate of 2.5mv o /c depends on Since = increase in Increase This in turn changes the operation point.
9 Transistor current gain : The transistor parameters among different units of same type, same number changes. Ie. If we take two transistor units of same type (ie. Same number, construction, parameter specified etc.) and we them in the circuit, there is change in the value in actual practice. The biasing circuit is designed according to the required value. Since changes, the operating point also shifts. REQUIREMENTS OF A BIASING CIRCUIT: The emitter-base junction must be forward biased and collector-base junction must be reversed biased. Ie. The transistors should be operated in the active region. The circuit design should provide a degree of temperature stability. The operating point should be made independent of transistor parameters (like ) Techniques used to maintain the Q point stable: STABILIZATION TECHNIQUE: This refers to the use of resistive biasing circuits which allow Relatively constant with variations in and to vary so as to keep COMPENSATION TECHNIQUE: This refers to the use of temperature sensitive devices such as diodes, transistors, thermistors, etc, which provide compensating voltages and current to maintain the operating point stable. STABILITY FACTORS: The stability factor is a measure of stability provided by the biasing circuit. Stability factor indicates the degree of change in operating point due to variation in temperature. Since there are 3 temperature dependent variables, there are 3 stability factors. (or)
10 (or) (or) Note: Ideally, stability factor should be perfectly zero to keep the operating point stable. Practically stability factor should have the value as minimum as possible. EXPRESSION FOR STABILITY FACTOR S: For a common emitter configuration collector current is given by WKT When changes by changes by changes by by If S =
11 TYPES OF BIASING CIRCUIT: Fixed bias circuit Collector to base bias circuit Voltage divider or self bias circuit. FIXED BIAS CIRCUIT: Apply KVL to the base circuit, 1 fixed, fixed and hence is fixed and the circuit is called as fixed bias circuit. Apply KVL to the Collector circuit, 2
12 From equation (2), 3 : WKT 4 : WKT, Sub in above equation, Diff. WRT to 5
13 : Diff WRT to relation between s and 6 To obtain in terms of S Multiply and divided by 7 relation between S and We have Multiply and divided by 8
14 ADVANTAGES OF FIXED BIAS CIRCUIT: Circuit is simple The operating point can be fixed anywhere in the active region by varying the value of Thus if provides maximum flexibility. DISADVANTAGES: Thermal stability is not provide by the circuit and so the Q point varies Circuit depends on Problem Since Q point varies Design a fixed bias circuit using a silicon transistor having value of 100, and DC bias condition are to be and Solution: Given: :
15 Applying KVL to collector circuit, WKT Applying KVL to input circuit, Design:
16 COLLECTOR TO BASE BIAS CIRCUIT: Since the resistor is connected between the collector and base, it is called as collector to base bias circuit. Applying KVL to input circuit, 1 Applying KVL to output circuit, Applying KVL to collector circuit, 2 3 WKT the basic equation for is
17 S: is obtained by diff. WRT 4 5 : As there is no term in the above equation WKT, Sub in above equation,
18 : From equation (6), 8 relation between s and Multiply and divided by
19 8.1 From equation (5), 9 By combining equation (9) & (8.1), 10 relation between S and We have Multiply and divided by we have 11 ADVANTAGES: Circuit is flexible to fix the operating point at the centre of an active region. Circuit is simple Fixed bias
20 For collector to base bias Thus S is small for collector to base bias circuit, hence this provides better stability than fixed bias circuit. Q- Point is stable: If, increases increases Drop across increases decrease [ ] decrease [ ] decrease [ ] Thus the original increase is compensated and Q Point remains stable.
21 VOLTAGE- DIVIDER BIAS CIRCUIT: [OR] SELF BIAS (OR) EMITTER BIAS CIRCUIT. Consider the closed loop shown in the circuit. 1 Applying KVL to the collector circuit.
22 2 Redrawing the original circuit as follow, thevenin s equivalent circuit:-
23 4 By voltage divided rule. So that the circuit becomes, Thus,
24 5 From equation (5) 6 7 WKT 8 From equation (7), Sub equation (7),
25 Let 9 s = 10 Differentiating equation (9), WRT Now multiply and divide by by equation (9) 11
26 Relation between S and Multiply and divide by 12 Relation between S and by equation (11) BIAS COMPENSATION: Compensation techniques use temperature sensitive devices such as diode, transistors, thermistors, sensistors etc. to maintain operating point constant. THERMISTOR COMPENSATION: Thermistors have a negative temperature co-efficient ie. Its resistance decrease exponentially with increase in temperature as shown below. Slope of this curve = Where temperature coefficient for thermistor. It is negative. Therefore, thermistors are said to have negative temperature coefficient of resistance (NTC).
27 FIRST TYPE: COMPENSATION TECHNIQUE: Consider the circuit shown below. Here in the circuit, is ( Thermistor resistor), which has NTC. Thus the original increase in is compensated and Q- Point is made stable.
28 SECOND TYPE: Explanation: Thus the original increase in is compensated and Q- Point is maintain. Sensistor compensation technique: Sensistors have a positive temperature co-efficient ie. Its resistance increase with increase in temperature as shown.
29 Where temperature co-efficient = is positive Thus the variation in is compensated.
30 DIODE COMPENSATION FOR Thus the variation in is cancelled due to
31 DIODE COMPENSATION FOR [ ] WKT, FET BIASING: The general relationship that can be applied to the DC analysis of all FET amplifiers are For JFETS and depletion type MOSFETS shockley s equation is applied to relate the input and output quantities: For enchancement type MOSFET S the following equation is applied:
32 Where Reverse saturation current Pinch of voltage FIXED BIAS CONFIGURATION Consider the configuration shown below which includes the AC levels v i and V O and the coupling capacitors (C 1 and C 2 ). For DC analysis, capacitors acts like open circuit ie. At DC, f = 0, capacitance = For AC analysis, capacitors acts like short circuits. The resistors R G is to ensure that V i appears at the input to the FET amplifier for AC analysis. For dc analysis, Replace by short circuit in the circuit.
33 Apply KVL to gate circuit, 1 Since is fixed DC supply the voltage is fixed in magnitude, resulting in the notation fixed bias configuration. is controlled by shockley s equation,
34 SELF BIAS CONFIGURATION This eliminates the need for two DC suppliers. DC analysis: For DC analysis, capacitors are replaced by open circuits and the resistors R G replaced by short circuit since I G = 0A. Therefore the circuit reduce to, apply KVL to gate circuit,
35 1 Function of and not fixed as in fixed bias. by shockley s equation, 2 Apply KVL to output circuit, 3 VOLTAGE DIVIDER BIASING: Consider the circuit shown.
36 DC analysis: Remove the AC source O.C all the capacitors. So that the circuit reduce to From the circuit, 1 By voltage divider sub apply KVL to gate circuit, Apply KVL to drain circuit, 2 3
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