Chapter 2 Review of the PWM Control Circuits for Power Converters

Transcription

1 Chapter 2 Review of the PWM Control Circuits for Power Converters 2. Voltage-Moe Control Circuit for Power Converters Power converters are electrical control circuits that transfer energy from a DC voltage source to the output loaing an regulate the output voltage to meet the user esign. Energy is transferre via electronic switches mae with transistors an ioes to an output filter an then transferre to the output loaing. These converters employ square-wave PWM to achieve voltage regulation. The output voltage is regulate by varying the uty cycle of the power semiconuctor switch riving signal. The voltage waveform across the switch an at the input of the filter is a square wave in nature an generally results in high switching losses when the switching frequency is increase. However, these converters are easy to control, are well unerstoo, an have a wie loa control range. These converters also operate at a fixe-frequency, variable uty cycle. This type of control signal is calle PWM control signal. Depening on the uty cycle, these converters can operate in either CCM or iscontinuous conuction moe (DCM). If the current through the output inuctor never reaches zero, then the converter operates in CCM. If the current through the output inuctor reaches zero, then the converter operates in DCM. The output voltage is equal to the average value in the switching cycle of the voltage applie at the output filter. For real switches with parasitic elements, efficiency epens on conuction an switching losses, but the efficiency of power converters remains higher than that of linear regulators such as DO. Power converters are wiely applie in portable electronic equipment an proucts, especially those esigne to reuce stanby power loss. They emonstrate high efficiency an present a fast transient response ue to system esign. The fixe-frequency PWM control scheme for power converters [ 24] is commonly use with current-moe an voltage-moe control circuits. Voltage-moe control circuit is the simplest circuit structure for PWM control scheme for power converters. The major characteristic of this esign is the presence Springer Nature Singapore Pte t. 208 W.-W. Chen an J.-F. Chen, Control Techniques for Power Converters with Integrate Circuit, Power Systems, 37

2 38 2 Review of the PWM Control Circuits for Power Converters Fig. 2. Circuit iagram of the voltage-moe control circuit for buck converter V IN V UG S V G V X S 2 I R CO V OUT I OUT Driver Ramp Generator R D V RAMP V COMP GM V FB R C V REF R D2 C C of a single voltage feeback path, with PWM performe by comparing the voltage error signal with a constant ramp waveform. Current limiting must be conucte separately. The avantages of voltage-moe control are as follows: the single feeback loop is easy to esign an analyze an a large-amplitue ramp waveform provies goo noise immunity for a stable moulation process. Figure 2. shows the circuit iagram of the voltage-moe control circuit for buck converter. S an S 2 are the power switches integrate on-chip, is the output inuctor. R CO is the ESR of output capacitor. Current source I OUT is the output loa current. The river circuit uses the input signal on-time with to generate two control signals V UG an V G, these two signals shoul be avoi to turn on at the same time, because this operation make this system to have a shoot through problem. The compensator of R C an C C shoul be esigne an optimization to increase the transient response. Only the feeback signal V FB an reference voltage V REF are built insie the IC. The output signal of comparator epens on the input signals V COMP an V RAMP results. The PWM three-terminal moel [23, 24] is a goo tool to analyze loop stability because power switches S an S 2 can be moele as equivalent circuits similar to a epenent voltage source, a epenent current source, an an ieal transformer. The PWM three-terminal moel with voltage-moe control circuit for the buck converter is shown in Fig In Fig. 2.2, a transfer function for control-to-output G CTO (s) is obtaine with Eqs. (2.) (2.7). Base on the G CTO (s) transfer function, the voltage-moe control circuit for the buck converter has one zero an two poles system, as shown in Fig The DC gain of control-to-output epens on the input voltage by Eq. (2.2), an a large input voltage has a large DC gain. The voltage-moe control circuit for the buck converter is unsuitable for a wie input voltage range. The zero S Z epens on output capacitor an ESR R CO of the output capacitor. With regar to output capacitor selection, tantalum capacitors are

3 2. Voltage-Moe Control Circuit for Power Converters 39 Fig. 2.2 PWM three-terminal moel with voltage-moe control circuit for buck converter a VIN D I D c i R CO i OUT R OUT V OUT p F m F C V COMP Fig. 2.3 Control-to-output with one zero an two poles system of voltage-moe control circuit for buck converter B F m V IN Q O -40B/ec -20B/ec S z ra/s a poor choice for output capacitors because tantalum capacitors usually fail to create a short circuit across their terminals, thereby raising the possibility of a fire hazar. Ceramic or aluminum electrolytic capacitors are preferre because they o not have this failure moe. Ceramic capacitors possessing small footprint, low profile, low ESR, low cost, an high reliability are wiely use in microprocessor ecoupling an power converter filtering applications. Thus, ceramic capacitors are a goo choice when the evaluation boar area, cost reuction, or component height is consiere. The low ESR of ceramic capacitors results in high performance an efficiency but may cause the system loop to become unstable. Generally, the ESR of a ceramic output is less than 0 mx, an the S Z zero location is set at a high frequency of the voltage-moe control circuit for the buck converter. Thus, the control-to-output G CTO (s) is change to a two poles system.

4 40 2 Review of the PWM Control Circuits for Power Converters G CTO ðsþ ¼ ^V OUT þ s=s Z ¼ F m V IN ^V COMP þ s=ðx O QÞþs 2 =x 2 O G CTO ð0þ ¼F m V IN x O ¼ pffiffiffiffiffiffiffiffiffiffiffiffi rffiffiffiffiffiffi Q ¼ R OUT F m ¼ V RAMP F C ¼ S Z ¼ R CO ð2:þ ð2:2þ ð2:3þ ð2:4þ ð2:5þ ð2:6þ ð2:7þ Table 2. lists the operation conitions of the voltage-moe control circuit for the buck converter. Accoring to Table 2., the comparison of MathCAD preictions an SIMPIS simulation results of the open-loop control-to-output boe plot for the buck converter is plotte in Fig In Fig. 2.4, the MathCAD preictions verify the SIMPIS simulation results. The re-colore line represents the MathCAD preictions, an the blue-colore ot represents the SIMPIS simulation results. The DC gain curve of the open-loop control-to-output boe plot is equal to 6.02 B as obtaine by Eq. (2.2). The two poles are locate at khz by Eq. (2.3). The two poles cause a sharp phase rop of 80, so the voltage-moe control circuit requires the aition of one zero to cancel the effect of the two poles. Base on these operation conitions using a large output capacitor, the zero is locate at 8.09 khz, so it can help increase the phase egree (30 ). In general, the output capacitor uses a ceramic capacitor with high switching frequency, an the capacitance of a single capacitor shoul be less than 50 lf. Thus, the zero is mainly locate at more than 300 khz with 0 mx of ESR. The zero at high frequency cannot help increase the phase egree. A buck converter can achieve step-own voltage from its input power supply to its output terminal, so it is also wiely use to convert a computer s main supply Table 2. Operation conitions in voltage-moe control circuit for buck converter V IN (V) 4.8 V F S (khz) 500 khz (lh) 4.7 lh V OUT (V).2 V R D (kx) 00 kx (lf) 880 lf I OUT (A) 5 A R D2 (kx) 40 kx R CO (mx) 0 mx V REF (V) 0.8 V V RAMP (V) 2.4 V

5 2. Voltage-Moe Control Circuit for Power Converters 4 (a) Gain (b) Phase Fig. 2.4 MathCAD preictions of open-loop control-to-output boe plot for buck converter voltage (often 2 V) own to lower voltages neee by USB, DRAM, an the CPU (.8 V or less), or the output voltage is esigne to be lower than the input power supply. A boost converter is ifferent from a buck converter because a boost converter achieves step-up voltage from its input power supply to its output terminal; hence, it is wiely use to convert a power supply voltage up to larger voltages neee by the isplay power river an ED river, or the output voltage is esigne to be larger than input power supply. Figure 2.5 shows a circuit iagram of the voltage-moe control circuit for boost converter. S an S 2 are the power switches integrate on-chip, is the output inuctor. R CO is the ESR of output capacitor. Current source I OUT is the output loa current. The river circuit uses the input signal on-time with to generate two control signals V UG an V G, these two signals shoul be avoi to turn on at the same time, because this operation make this system to have a shoot through problem. The compensator of R C an C C shoul be esigne an optimization to

6 42 2 Review of the PWM Control Circuits for Power Converters Fig. 2.5 Circuit iagram of the voltage-moe control circuit for boost converter V IN I V G VUG Driver V X S 2 S V UG Ramp Generator R CO V OUT I OUT R D V RAMP V COMP GM V FB R C V REF R D2 C C increase the transient response. Only the feeback signal V FB an reference voltage V REF are built insie the IC. The output signal of comparator epens on the input signals V COMP an V RAMP results. The PWM three-terminal moel [23, 24] with the voltage-moe control circuit for the boost converter is shown in Fig In Fig. 2.6, a transfer function for Fig. 2.6 PWM three-terminal moel with voltage-moe control circuit for boost converter i -V D OUT c D I p R CO i OUT R OUT V OUT a F m F C V COMP

7 2. Voltage-Moe Control Circuit for Power Converters 43 Fig. 2.7 Control-to-output with one zero, one RHP zero, an two poles system of voltage-moe control circuit for boost converter B F m (V IN /(- D) 2 ) Q O -40B/ec -20B/ec S z2 0B/ec S z2 ra/s control-to-output G CTO (s) can be obtaine by Eqs. (2.8) (2.6). Base on the G CTO (s) transfer function, the voltage-moe control circuit for the boost converter has one zero, one right-half-plane (RHP) zero, an two poles system as shown in Fig The DC gain of control-to-output epens not only on the input voltage but also on the uty cycle accoring to Eq. (2.9). A large uty cycle has a large DC gain. Given this effect, the voltage-moe control circuit for the boost converter is unsuitable for generating very large output voltages. For example, if the uty cycle is 0.9, the DC gain of control-to-output shoul be increase to 40 B with the same input voltage. A large DC gain of control-to-output makes it ifficult to esign an optimal compensator to ensure loop system stability. The first zero S Z epens on output capacitor an ESR R CO of the output capacitor. Ceramic capacitors possessing a small footprint, low profile, no failure moe, low ESR, low cost, an high reliability are wiely use in microprocessor ecoupling an power converter filtering applications. The low ESR of ceramic capacitors for output capacitors results in high performance an efficiency but may cause the system loop to become unstable. In general, the ESR of the ceramic output is less than 0 mx, an the first zero S Z location is set at a high frequency of the voltage-moe control circuit for the boost converter. Thus, the control-to-output G CTO (s) is change to two poles an one RHP zero system. The secon zero S Z2 is an RHP zero. RHP zero has the same 20 B/ecae rising gain magnitue as a conventional zero, but with a 90 phase lag instea of lea. This characteristic is ifficult, if not impossible, to compensate. The esigner is usually force to roll off the loop gain at a relatively low frequency. The crossover frequency may be a ecae or more below what it otherwise coul be, resulting in severe impairment of the ynamic response. In general, RHP zero is set at a frequency higher than two poles for the boost converter. The RHP zero phase rop starts a ecae earlier an negatively affects the potential phase margin of the converter s control loop. This is the nature of instability of a voltage-moe controlle boost converter running in CCM.

8 44 2 Review of the PWM Control Circuits for Power Converters G CTO ðsþ ¼ ^V OUT ¼ V IN ^V COMP ð DÞ 2 F m ð þ s=s ZÞ ð s=s Z2 Þ þ s=ðx O QÞþs 2 =x 2 O ð2:8þ G CTO ð0þ ¼ V IN ð DÞ 2 F m ð2:9þ x O ¼ pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi D rffiffiffiffiffiffi Q ¼ R OUT D F m ¼ V RAMP F C ¼ S Z ¼ R CO S Z2 ¼ R OUT D ð2:0þ ð2:þ ð2:2þ ð2:3þ ð2:4þ ð2:5þ D ¼ ð DÞ 2 ð2:6þ Table 2.2 lists the operation conitions of the voltage-moe control circuit for the boost converter. Accoring to Table 2.2, the comparison of MathCAD preictions an SIMPIS simulation results of the open-loop control-to-output boe plot for the boost converter is plotte in Fig In Fig. 2.8, the MathCAD preictions verify the SIMPIS simulation results. The re-colore line represents the MathCAD preictions, an the blue-colore ot represents the SIMPIS simulation results. The DC gain curve of the open-loop control-to-output boe plot is equal to B accoring to Eq. (2.9). The two poles are locate at 6.74 khz by Eq. (2.0). The two poles cause a sharp phase rop of 80, so the voltage-moe control circuit requires the aition of one zero to cancel the effect of the two poles. Base on this operation conition using the 44 lf output capacitor, the first zero S Z is locate at 36.7 khz by Eq. (2.4), an the secon zero S Z2 is locate at Table 2.2 Operation conitions in voltage-moe control circuit for boost converter V IN (V) 5 V F S (khz) 000 khz (lh) 2.2 lh V OUT (V) 2 V R D (kx) 20 kx (lf) 44 lf I OUT (A) 0.3 A R D2 (kx) 8.57 kx R CO (mx) 0 mx V REF (V) 0.8 V V RAMP (V).5 V

9 2. Voltage-Moe Control Circuit for Power Converters 45 (a) Gain (b) Phase Fig. 2.8 Comparison of MathCAD preictions an SIMPIS simulation results open-loop control-to-output boe plot for boost converter 502 khz by Eq. (2.5). Thus, the first zero S Z can cancel the effect of the secon zero S Z2. The phase of open-loop control-to-output maintains a two-pole behavior similar to a sharp phase rop of 80. Meanwhile, the RHP zero S Z2 epens on the output loaing an uty cycle, so the user nees to consier an optimal compensator at the worst conitions to ensure that the RHP zero S Z2 oes not affect the system loop stability. 2.2 Current-Moe Control Circuit for Power Converters The current-moe control circuit contains two feeback control signals an iffers from the voltage-moe control circuit. The output voltage is fe to an error amplifier to generate control signal V COMP. Inuctor current I is sample into voltage signal

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